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GET /api/patches/2216009/?format=api
{ "id": 2216009, "url": "http://patchwork.ozlabs.org/api/patches/2216009/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325164453.72127-12-pbonzini@redhat.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260325164453.72127-12-pbonzini@redhat.com>", "list_archive_url": null, "date": "2026-03-25T16:44:45", "name": "[PULL,11/19] target/i386: emulate: indirect access to CRs", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "92d8cf7bee593a70824b5abb6df25449f43951dc", "submitter": { "id": 2701, "url": "http://patchwork.ozlabs.org/api/people/2701/?format=api", "name": "Paolo Bonzini", "email": "pbonzini@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260325164453.72127-12-pbonzini@redhat.com/mbox/", "series": [ { "id": 497473, "url": "http://patchwork.ozlabs.org/api/series/497473/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497473", "date": "2026-03-25T16:44:34", "name": "[PULL,01/19] tests/functional: preserve PYTHONPATH entries", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497473/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2216009/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2216009/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) 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5iC1jPXivotzAfTLFW4RePAsQ5m1PrVj8DwL0VrCtyLdtghKNrBODueooAwkI26PvfwQt+vq7oe\n jWNdZPo35ro969jWzbBn8HJNM7790fAN8kUZet9Sq9amehY8hF9b7EyIR6xBfkoZ8yK5A8bwqEn\n b04I89tQtl9tUGZPI988eZ5HWe", "X-Received": [ "by 2002:a05:600c:4f48:b0:485:3d00:efd with SMTP id\n 5b1f17b1804b1-48715fbfc42mr67524635e9.7.1774457116122;\n Wed, 25 Mar 2026 09:45:16 -0700 (PDT)", "by 2002:a05:600c:4f48:b0:485:3d00:efd with SMTP id\n 5b1f17b1804b1-48715fbfc42mr67523955e9.7.1774457115522;\n Wed, 25 Mar 2026 09:45:15 -0700 (PDT)" ], "From": "Paolo Bonzini <pbonzini@redhat.com>", "To": "qemu-devel@nongnu.org", "Cc": "Mohamed Mediouni <mohamed@unpredictable.fr>", "Subject": "[PULL 11/19] target/i386: emulate: indirect access to CRs", "Date": "Wed, 25 Mar 2026 17:44:45 +0100", "Message-ID": "<20260325164453.72127-12-pbonzini@redhat.com>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260325164453.72127-1-pbonzini@redhat.com>", "References": "<20260325164453.72127-1-pbonzini@redhat.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=170.10.133.124;\n envelope-from=pbonzini@redhat.com;\n helo=us-smtp-delivery-124.mimecast.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, RCVD_IN_MSPIKE_H5=0.001, RCVD_IN_MSPIKE_WL=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nPrepare to have on-demand fetch of registers from the backend during\nfaults.\n\nFor x86_64 macOS, copy the function there too.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\nLink: https://lore.kernel.org/r/20260324151323.74473-9-mohamed@unpredictable.fr\nSigned-off-by: Paolo Bonzini <pbonzini@redhat.com>\n---\n target/i386/emulate/x86_emu.h | 3 +++\n target/i386/emulate/x86_helpers.c | 27 ++++++++++++++++-----------\n target/i386/emulate/x86_mmu.c | 8 ++------\n target/i386/hvf/x86.c | 11 +++++++++++\n 4 files changed, 32 insertions(+), 17 deletions(-)", "diff": "diff --git a/target/i386/emulate/x86_emu.h b/target/i386/emulate/x86_emu.h\nindex 4ed970bd536..a8d4c93098d 100644\n--- a/target/i386/emulate/x86_emu.h\n+++ b/target/i386/emulate/x86_emu.h\n@@ -28,6 +28,7 @@ struct x86_emul_ops {\n MMUTranslateResult (*mmu_gva_to_gpa) (CPUState *cpu, target_ulong gva, uint64_t *gpa, MMUTranslateFlags flags);\n void (*read_segment_descriptor)(CPUState *cpu, struct x86_segment_descriptor *desc,\n enum X86Seg seg);\n+ target_ulong (*read_cr) (CPUState *cpu, int cr);\n void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direction,\n int size, int count);\n void (*simulate_rdmsr)(CPUState *cs);\n@@ -45,6 +46,8 @@ void x86_emul_raise_exception(CPUX86State *env, int exception_index, int error_c\n \n target_ulong read_reg(CPUX86State *env, int reg, int size);\n void write_reg(CPUX86State *env, int reg, target_ulong val, int size);\n+target_ulong x86_read_cr(CPUState *cpu, int cr);\n+\n target_ulong read_val_from_reg(void *reg_ptr, int size);\n void write_val_to_reg(void *reg_ptr, target_ulong val, int size);\n bool write_val_ext(CPUX86State *env, struct x86_decode_op *decode, target_ulong val, int size);\ndiff --git a/target/i386/emulate/x86_helpers.c b/target/i386/emulate/x86_helpers.c\nindex ebbf40f2b05..c817015ef92 100644\n--- a/target/i386/emulate/x86_helpers.c\n+++ b/target/i386/emulate/x86_helpers.c\n@@ -206,15 +206,26 @@ bool x86_read_call_gate(CPUState *cpu, struct x86_call_gate *idt_desc,\n return true;\n }\n \n-bool x86_is_protected(CPUState *cpu)\n+target_ulong x86_read_cr(CPUState *cpu, int cr)\n {\n X86CPU *x86_cpu = X86_CPU(cpu);\n CPUX86State *env = &x86_cpu->env;\n- uint64_t cr0 = env->cr[0];\n+\n+ if (emul_ops->read_cr) {\n+ return emul_ops->read_cr(cpu, cr);\n+ }\n+ return env->cr[cr];\n+}\n+\n+bool x86_is_protected(CPUState *cpu)\n+{\n+ uint64_t cr0;\n+\n if (emul_ops->is_protected_mode) {\n return emul_ops->is_protected_mode(cpu);\n }\n \n+ cr0 = x86_read_cr(cpu, 0);\n return cr0 & CR0_PE_MASK;\n }\n \n@@ -245,9 +256,7 @@ bool x86_is_long_mode(CPUState *cpu)\n \n bool x86_is_la57(CPUState *cpu)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n- uint64_t is_la57 = env->cr[4] & CR4_LA57_MASK;\n+ uint64_t is_la57 = x86_read_cr(cpu, 4) & CR4_LA57_MASK;\n return is_la57;\n }\n \n@@ -259,18 +268,14 @@ bool x86_is_long64_mode(CPUState *cpu)\n \n bool x86_is_paging_mode(CPUState *cpu)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n- uint64_t cr0 = env->cr[0];\n+ uint64_t cr0 = x86_read_cr(cpu, 0);\n \n return cr0 & CR0_PG_MASK;\n }\n \n bool x86_is_pae_enabled(CPUState *cpu)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n- uint64_t cr4 = env->cr[4];\n+ uint64_t cr4 = x86_read_cr(cpu, 4);\n \n return cr4 & CR4_PAE_MASK;\n }\ndiff --git a/target/i386/emulate/x86_mmu.c b/target/i386/emulate/x86_mmu.c\nindex 670939acdba..ba0ebe4268d 100644\n--- a/target/i386/emulate/x86_mmu.c\n+++ b/target/i386/emulate/x86_mmu.c\n@@ -114,8 +114,6 @@ static bool get_pt_entry(CPUState *cpu, struct gpt_translation *pt,\n static MMUTranslateResult test_pt_entry(CPUState *cpu, struct gpt_translation *pt,\n int level, int *largeness, bool pae, MMUTranslateFlags flags)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n uint64_t pte = pt->pte[level];\n \n if (!pte_present(pte)) {\n@@ -130,7 +128,7 @@ static MMUTranslateResult test_pt_entry(CPUState *cpu, struct gpt_translation *p\n *largeness = level;\n }\n \n- uint32_t cr0 = env->cr[0];\n+ uint32_t cr0 = x86_read_cr(cpu, 0);\n /* check protection */\n if (cr0 & CR0_WP_MASK) {\n if (mmu_validate_write(flags) && !pte_write_access(pte)) {\n@@ -184,11 +182,9 @@ static inline uint64_t large_page_gpa(struct gpt_translation *pt, bool pae,\n static MMUTranslateResult walk_gpt(CPUState *cpu, target_ulong addr, MMUTranslateFlags flags,\n struct gpt_translation *pt, bool pae)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n int top_level, level;\n int largeness = 0;\n- target_ulong cr3 = env->cr[3];\n+ target_ulong cr3 = x86_read_cr(cpu, 3);\n uint64_t page_mask = pae ? PAE_PTE_PAGE_MASK : LEGACY_PTE_PAGE_MASK;\n MMUTranslateResult res;\n \ndiff --git a/target/i386/hvf/x86.c b/target/i386/hvf/x86.c\nindex 7fe710aca3b..bae2f30fa28 100644\n--- a/target/i386/hvf/x86.c\n+++ b/target/i386/hvf/x86.c\n@@ -143,6 +143,17 @@ bool x86_is_la57(CPUState *cpu)\n return false;\n }\n \n+target_ulong x86_read_cr(CPUState *cpu, int cr)\n+{\n+ X86CPU *x86_cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86_cpu->env;\n+\n+ if (emul_ops->read_cr) {\n+ return emul_ops->read_cr(cpu, cr);\n+ }\n+ return env->cr[cr];\n+}\n+\n bool x86_is_long64_mode(CPUState *cpu)\n {\n struct vmx_segment desc;\n", "prefixes": [ "PULL", "11/19" ] }