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GET /api/patches/2215981/?format=api
{ "id": 2215981, "url": "http://patchwork.ozlabs.org/api/patches/2215981/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260325-fix_pciatops-v6-1-10bf19d76dd1@linux.ibm.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260325-fix_pciatops-v6-1-10bf19d76dd1@linux.ibm.com>", "list_archive_url": null, "date": "2026-03-25T15:16:17", "name": "[v6,1/2] PCI: AtomicOps: Do not enable without support in root complex", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "449701443e785d17ceea749d7fa1808e0bcade26", "submitter": { "id": 85804, "url": "http://patchwork.ozlabs.org/api/people/85804/?format=api", "name": "Gerd Bayer", "email": "gbayer@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260325-fix_pciatops-v6-1-10bf19d76dd1@linux.ibm.com/mbox/", "series": [ { "id": 497465, "url": "http://patchwork.ozlabs.org/api/series/497465/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497465", "date": "2026-03-25T15:16:18", "name": "PCI: AtomicOps: Fix pci_enable_atomic_ops_to_root()", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/497465/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215981/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215981/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51103-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=fzVWslcD;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; 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a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc\n\t:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=pp1; bh=IZM9iV\n\tEJR8udFqcpjfNu4uqJ/KNL/9NB0MPaqhItBHo=; b=fzVWslcDl7abmHZw2dGyTb\n\tLK5cLGASnS0K1QOmsRqo3roSOtoDUuZryD3btddAreHhPGePrbw6sZYQ4Tt9a18M\n\tE2a2bpxwpAduPSUZnYp/xnzVDv+L9+q8WxTbhfpa0w8sG0Urx8LU00TG920edx/f\n\t+DS5kmh2CitTk/bShK5oOkhIHIiKE4cg2j5/2Ewzwm/mOo5r/Truw14eIHNn1ZUo\n\ts7B1xckGT7bMy2+MYGrKqUTH66ckr+cQee4qo8BvfNeTv/aTmJnQaQ7UaA/i3jzb\n\tmacqsmoUVGF5VHbsCCdzXoz7UHleykGepeocYqVLLwJrGYKD8EQWHB1+0lBcgISQ\n\t==", "From": "Gerd Bayer <gbayer@linux.ibm.com>", "Date": "Wed, 25 Mar 2026 16:16:17 +0100", "Subject": "[PATCH v6 1/2] PCI: AtomicOps: Do not enable without support in\n root complex", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260325-fix_pciatops-v6-1-10bf19d76dd1@linux.ibm.com>", "References": "<20260325-fix_pciatops-v6-0-10bf19d76dd1@linux.ibm.com>", "In-Reply-To": "<20260325-fix_pciatops-v6-0-10bf19d76dd1@linux.ibm.com>", "To": "Bjorn Helgaas <bhelgaas@google.com>, Jay Cornwall <Jay.Cornwall@amd.com>,\n Felix Kuehling <Felix.Kuehling@amd.com>,\n Christian Borntraeger <borntraeger@linux.ibm.com>,\n Niklas Schnelle <schnelle@linux.ibm.com>", "Cc": "Gerald Schaefer <gerald.schaefer@linux.ibm.com>,\n Heiko Carstens <hca@linux.ibm.com>, Vasily Gorbik <gor@linux.ibm.com>,\n Alexander Gordeev <agordeev@linux.ibm.com>,\n Sven Schnelle <svens@linux.ibm.com>,\n Leon Romanovsky <leon@kernel.org>,\n Alexander Schmidt <alexs@linux.ibm.com>, linux-s390@vger.kernel.org,\n linux-pci@vger.kernel.org, linux-kernel@vger.kernel.org,\n netdev@vger.kernel.org, linux-rdma@vger.kernel.org,\n Gerd Bayer <gbayer@linux.ibm.com>, stable@vger.kernel.org", "X-Mailer": "b4 0.14.2", "X-TM-AS-GCONF": "00", "X-Proofpoint-Reinject": "loops=2 maxloops=12", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMzI1MDEwNiBTYWx0ZWRfX98LmQ4B2W+DB\n Gv/WPBiDPwdfzl5bzCk5adAkUwh5VV5BbdhQK5B49PQUc8nBfhRp+9PD7fJSq+FB6A/fFJNkrOe\n uVZGeg3NQuxThg+5hZA1mhIyiQkbFkk5UeaWt5ED15h1VoHLOtF5Z3dkOnzr2Zt/m2K5lYT6lTj\n 3FCCMi/v848dty+N1CO7XwQjSi28Yj1HlOeH33zJr0uYsXY5TbgJGgfPSCqtoBu7Xz/NgItOPy7\n YPF22kN0rFKOJ1MrN6URjahJI81N/1XICJYlxVzO6SL3Cf1BYyi66VxY2evlz9Ae06kljBtofzs\n xjFi7hp+OhGsj+H8botRH1CVB2joV27ohhdVJiZGMi5cbaUOwmPF8J5CfIXWqs/EO0n/4YIyBHi\n wUSWw6QEVSfHB9XEw6QlwbvGF2sNHzVHE8BMXo22KEcs5iRa+9PgrSXB/pqRh3DEV/Q1RJh5eZO\n jWoICEj1n1m85QagFZw==", "X-Authority-Analysis": "v=2.4 cv=JK42csKb c=1 sm=1 tr=0 ts=69c3fc4d cx=c_pps\n a=bLidbwmWQ0KltjZqbj+ezA==:117 a=bLidbwmWQ0KltjZqbj+ezA==:17\n a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=RnoormkPH1_aCDwRdu11:22 a=V8glGbnc2Ofi9Qvn3v5h:22 a=VnNF1IyMAAAA:8\n a=VwQbUJbxAAAA:8 a=Hx5SdpTRtzwH465PzOMA:9 a=QEXdDO2ut3YA:10", "X-Proofpoint-ORIG-GUID": "rnuTNvRXxuHVYp6kF1wGfPuuu60UW4sL", "X-Proofpoint-GUID": "xhuNwk8t0ZsChDnOiSezc9PsQ1zgGuCj", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-03-25_04,2026-03-24_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n impostorscore=0 clxscore=1015 priorityscore=1501 malwarescore=0 adultscore=0\n spamscore=0 suspectscore=0 phishscore=0 lowpriorityscore=0 bulkscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603250106" }, "content": "When inspecting the config space of a Connect-X physical function in an\ns390 system after it was initialized by the mlx5_core device driver, we\nfound the function to be enabled to request AtomicOps despite the\nsystem's root-complex lacking support for completing them:\n\n1ed0:00:00.1 Ethernet controller: Mellanox Technologies MT2894 Family [ConnectX-6 Lx]\n\tSubsystem: Mellanox Technologies Device 0002\n [...]\n\tDevCtl2: Completion Timeout: 50us to 50ms, TimeoutDis-\n\t\t AtomicOpsCtl: ReqEn+\n\t\t IDOReq- IDOCompl- LTR- EmergencyPowerReductionReq-\n\t\t 10BitTagReq- OBFF Disabled, EETLPPrefixBlk-\n\nTurns out the device driver calls pci_enable_atomic_ops_to_root() which\ndefaulted to enable AtomicOps requests even if it had no information\nabout the root-port that the PCIe device is attached to. Similarly,\nAtomicOps requests are enabled for root complex integrated endpoints\n(RCiEPs) unconditionally.\n\nChange the logic of pci_enable_atomic_ops_to_root() to fully traverse the\nPCIe tree upwards, check that the bridge devices support delivering\nAtomicOps transactions, and finally check that there is a root port at\nthe end that does support completing AtomicOps - or that the support for\ncompleting AtomicOps at the root complex is announced through some other\narch specific way.\n\nIntroduce a new pcibios_connects_to_atomicops_capable_rc() function to\nimplement the check - and default to always \"true\". This leaves the\nsemantics for today's RCiEPs intact. Pass in the device in question and\nthe requested capabilities for future expansions.\nFor s390, override pcibios_connects_to_atomicops_capable_rc() to\nalways return \"false\".\n\nDo not change the enablement of AtomicOps requests if there is no\npositive confirmation that the root complex can complete PCIe AtomicOps.\n\nReported-by: Alexander Schmidt <alexs@linux.ibm.com>\nCc: stable@vger.kernel.org\nFixes: 430a23689dea (\"PCI: Add pci_enable_atomic_ops_to_root()\")\nSigned-off-by: Gerd Bayer <gbayer@linux.ibm.com>\n---\n arch/s390/pci/pci.c | 5 +++++\n drivers/pci/pci.c | 48 +++++++++++++++++++++++++++++++-----------------\n include/linux/pci.h | 1 +\n 3 files changed, 37 insertions(+), 17 deletions(-)", "diff": "diff --git a/arch/s390/pci/pci.c b/arch/s390/pci/pci.c\nindex 2a430722cbe415dd56c92fed2e513e524f46481a..a0bef77082a153a258fbe4abb1070b22e020888e 100644\n--- a/arch/s390/pci/pci.c\n+++ b/arch/s390/pci/pci.c\n@@ -265,6 +265,11 @@ static int zpci_cfg_store(struct zpci_dev *zdev, int offset, u32 val, u8 len)\n \treturn rc;\n }\n \n+bool pcibios_connects_to_atomicops_capable_rc(struct pci_dev *dev, u32 cap_mask)\n+{\n+\treturn false;\n+}\n+\n resource_size_t pcibios_align_resource(void *data, const struct resource *res,\n \t\t\t\t resource_size_t size,\n \t\t\t\t resource_size_t align)\ndiff --git a/drivers/pci/pci.c b/drivers/pci/pci.c\nindex 8479c2e1f74f1044416281aba11bf071ea89488a..006aa589926cb290de43f152100ddaf9961407d1 100644\n--- a/drivers/pci/pci.c\n+++ b/drivers/pci/pci.c\n@@ -3660,6 +3660,19 @@ void pci_acs_init(struct pci_dev *dev)\n \tpci_disable_broken_acs_cap(dev);\n }\n \n+static bool pci_is_atomicops_capable_rp(struct pci_dev *dev, u32 cap, u32 cap_mask)\n+{\n+\tif (!dev || !(pci_pcie_type(dev) == PCI_EXP_TYPE_ROOT_PORT))\n+\t\treturn false;\n+\n+\treturn (cap & cap_mask) == cap_mask;\n+}\n+\n+bool __weak pcibios_connects_to_atomicops_capable_rc(struct pci_dev *dev, u32 cap_mask)\n+{\n+\treturn true;\n+}\n+\n /**\n * pci_enable_atomic_ops_to_root - enable AtomicOp requests to root port\n * @dev: the PCI device\n@@ -3676,8 +3689,9 @@ void pci_acs_init(struct pci_dev *dev)\n int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask)\n {\n \tstruct pci_bus *bus = dev->bus;\n-\tstruct pci_dev *bridge;\n-\tu32 cap, ctl2;\n+\tstruct pci_dev *bridge = NULL;\n+\tu32 cap = 0;\n+\tu32 ctl2;\n \n \t/*\n \t * Per PCIe r5.0, sec 9.3.5.10, the AtomicOp Requester Enable bit\n@@ -3714,29 +3728,29 @@ int pci_enable_atomic_ops_to_root(struct pci_dev *dev, u32 cap_mask)\n \t\tswitch (pci_pcie_type(bridge)) {\n \t\t/* Ensure switch ports support AtomicOp routing */\n \t\tcase PCI_EXP_TYPE_UPSTREAM:\n-\t\tcase PCI_EXP_TYPE_DOWNSTREAM:\n-\t\t\tif (!(cap & PCI_EXP_DEVCAP2_ATOMIC_ROUTE))\n-\t\t\t\treturn -EINVAL;\n-\t\t\tbreak;\n-\n-\t\t/* Ensure root port supports all the sizes we care about */\n-\t\tcase PCI_EXP_TYPE_ROOT_PORT:\n-\t\t\tif ((cap & cap_mask) != cap_mask)\n-\t\t\t\treturn -EINVAL;\n-\t\t\tbreak;\n-\t\t}\n-\n-\t\t/* Ensure upstream ports don't block AtomicOps on egress */\n-\t\tif (pci_pcie_type(bridge) == PCI_EXP_TYPE_UPSTREAM) {\n+\t\t\t/* Upstream ports must not block AtomicOps on egress */\n \t\t\tpcie_capability_read_dword(bridge, PCI_EXP_DEVCTL2,\n \t\t\t\t\t\t &ctl2);\n \t\t\tif (ctl2 & PCI_EXP_DEVCTL2_ATOMIC_EGRESS_BLOCK)\n \t\t\t\treturn -EINVAL;\n+\t\t\tfallthrough;\n+\t\t/* All switch ports need to route AtomicOps */\n+\t\tcase PCI_EXP_TYPE_DOWNSTREAM:\n+\t\t\tif (!(cap & PCI_EXP_DEVCAP2_ATOMIC_ROUTE))\n+\t\t\t\treturn -EINVAL;\n+\t\t\tbreak;\n \t\t}\n-\n \t\tbus = bus->parent;\n \t}\n \n+\t/*\n+\t * Finally, last bridge must be root port and support requested sizes\n+\t * or firmware asserts support\n+\t */\n+\tif (!(pci_is_atomicops_capable_rp(bridge, cap, cap_mask) ||\n+\t pcibios_connects_to_atomicops_capable_rc(dev, cap_mask)))\n+\t\treturn -EINVAL;\n+\n \tpcie_capability_set_word(dev, PCI_EXP_DEVCTL2,\n \t\t\t\t PCI_EXP_DEVCTL2_ATOMIC_REQ);\n \treturn 0;\ndiff --git a/include/linux/pci.h b/include/linux/pci.h\nindex 1c270f1d512301de4d462fe7e5097c32af5c6f8d..ef90604c39859ea8e61e5392d0bdaa1b0e43874b 100644\n--- a/include/linux/pci.h\n+++ b/include/linux/pci.h\n@@ -692,6 +692,7 @@ void pci_set_host_bridge_release(struct pci_host_bridge *bridge,\n \t\t\t\t void *release_data);\n \n int pcibios_root_bridge_prepare(struct pci_host_bridge *bridge);\n+bool pcibios_connects_to_atomicops_capable_rc(struct pci_dev *dev, u32 cap_mask);\n \n #define PCI_REGION_FLAG_MASK\t0x0fU\t/* These bits of resource flags tell us the PCI region flags */\n \n", "prefixes": [ "v6", "1/2" ] }