Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2215935/?format=api
{ "id": 2215935, "url": "http://patchwork.ozlabs.org/api/patches/2215935/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260325143555.451852-22-herve.codina@bootlin.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260325143555.451852-22-herve.codina@bootlin.com>", "list_archive_url": null, "date": "2026-03-25T14:35:48", "name": "[v6,21/27] misc: lan966x_pci: Split dtso in dtsi/dtso", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "7bbe6f2ddbdc3be147ddb27b7c1678b4d77528b8", "submitter": { "id": 81983, "url": "http://patchwork.ozlabs.org/api/people/81983/?format=api", "name": "Herve Codina", "email": "herve.codina@bootlin.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260325143555.451852-22-herve.codina@bootlin.com/mbox/", "series": [ { "id": 497453, "url": "http://patchwork.ozlabs.org/api/series/497453/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497453", "date": "2026-03-25T14:35:27", "name": "lan966x pci device: Add support for SFPs", "version": 6, "mbox": "http://patchwork.ozlabs.org/series/497453/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215935/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215935/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51092-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=sSLi+gDn;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.105.105.114; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-51092-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com\n header.b=\"sSLi+gDn\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=185.171.202.116", "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=bootlin.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=bootlin.com" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org [172.105.105.114])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgqlG4Rg1z1y1K\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 26 Mar 2026 01:57:46 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id A2CB030405DB\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 25 Mar 2026 14:47:35 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 736B83E9596;\n\tWed, 25 Mar 2026 14:42:32 +0000 (UTC)", "from smtpout-04.galae.net (smtpout-04.galae.net [185.171.202.116])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id DBA463E557B;\n\tWed, 25 Mar 2026 14:42:29 +0000 (UTC)", "from smtpout-01.galae.net (smtpout-01.galae.net [212.83.139.233])\n\tby smtpout-04.galae.net (Postfix) with ESMTPS id 98AE8C580B1;\n\tWed, 25 Mar 2026 14:42:56 +0000 (UTC)", "from mail.galae.net (mail.galae.net [212.83.136.155])\n\tby smtpout-01.galae.net (Postfix) with ESMTPS id CD63D601E2;\n\tWed, 25 Mar 2026 14:42:28 +0000 (UTC)", "from [127.0.0.1] (localhost [127.0.0.1]) by localhost (Mailerdaemon)\n with ESMTPSA id 7054910451417;\n\tWed, 25 Mar 2026 15:42:09 +0100 (CET)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774449752; cv=none;\n b=V8zHhXU6ZFgE8vWKUdIdYt8vxhwOZTnfCdI3g8Kp3HiSD9xAez6opkmoII+d7nkPudvSfzgbgQYmxC1XvV7bG0RAW5iPESLvlQTHfQUMEvmmFfOPgXJ9/bp/n/3XWkSsWLFxZpfr3lg2W5+AocaTvj1gK5ViXvAfJd9cM77xZ0U=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774449752; c=relaxed/simple;\n\tbh=/I/gBBSQjoZsOjIL0B+Qyl0IZTqk8YHRpzEsG7bIEWg=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=YWZhuvdJEhk/pjzebqgtGzYEf0GaTVvesxPM6EtMri3tIDA/ycr7/65apBUjBfutIYBFLcEcqi2+bLYOOz+NUzbvvwQ72xVoUynzNAog+bwCiqEE2Qh2LUtmEgEFKex8zOiE3jdERq/G/YY7Ln1Teg0M4T6EcYeav8QbdEWDMwc=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=bootlin.com;\n spf=pass smtp.mailfrom=bootlin.com;\n dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com\n header.b=sSLi+gDn; arc=none smtp.client-ip=185.171.202.116", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1774449745; h=from:subject:date:message-id:to:cc:mime-version:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=yHQfhazYClBqFiWTBjKI2wJ8nGAA1W+1s1WNH3rEj08=;\n\tb=sSLi+gDngKhTCb3YbcmUiWbH3av4+qM9w25P1wNQ2+ZNTZDJDrQb16tU6NC3qDQvoP/B5p\n\tmrkZ/HdKSC3o2WNNqAGRtkxGDRLPYmMdm5ITEtoOOmonZnTH5DANIhpjRAjJhEVnMpal1F\n\tnOJi2AsHbEz2dSCDp0YHjMjWxAPWFca2GrhsxRXJVVLlyP47Gm+0gmV4E3XAaXdZmAFVSu\n\tWhobF2tbjCCdyJXDj/ANT1yl2i8YjDCmExGB85INBy26P+opFcWZL/Zdkxl8R5Pf1qx+Fy\n\tMUeFQVqLPz4V2siBhPKTcgCyegOhp5RWpivj5cyYdJkaL39M6cp109pgCWuNFA==", "From": "Herve Codina <herve.codina@bootlin.com>", "To": "Andrew Lunn <andrew@lunn.ch>,\n\tRob Herring <robh@kernel.org>,\n\tKrzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tGeert Uytterhoeven <geert+renesas@glider.be>,\n\tKalle Niemi <kaleposti@gmail.com>,\n\tMatti Vaittinen <mazziesaccount@gmail.com>,\n\tGreg Kroah-Hartman <gregkh@linuxfoundation.org>,\n\t\"Rafael J. Wysocki\" <rafael@kernel.org>,\n\tDanilo Krummrich <dakr@kernel.org>,\n\tFrank Li <Frank.Li@nxp.com>,\n\tSascha Hauer <s.hauer@pengutronix.de>,\n\tPengutronix Kernel Team <kernel@pengutronix.de>,\n\tFabio Estevam <festevam@gmail.com>,\n\tMichael Turquette <mturquette@baylibre.com>,\n\tStephen Boyd <sboyd@kernel.org>,\n\tAndi Shyti <andi.shyti@kernel.org>,\n\tWolfram Sang <wsa+renesas@sang-engineering.com>,\n\tPeter Rosin <peda@axentia.se>,\n\tArnd Bergmann <arnd@arndb.de>,\n\tHerve Codina <herve.codina@bootlin.com>,\n\tSaravana Kannan <saravanak@kernel.org>,\n\tBjorn Helgaas <bhelgaas@google.com>,\n\tCharles Keepax <ckeepax@opensource.cirrus.com>,\n\tRichard Fitzgerald <rf@opensource.cirrus.com>,\n\tDavid Rhodes <david.rhodes@cirrus.com>,\n\tLinus Walleij <linusw@kernel.org>,\n\tUlf Hansson <ulf.hansson@linaro.org>,\n\tMark Brown <broonie@kernel.org>,\n\tLen Brown <lenb@kernel.org>,\n\tAndy Shevchenko <andriy.shevchenko@linux.intel.com>,\n\tDaniel Scally <djrscally@gmail.com>,\n\tHeikki Krogerus <heikki.krogerus@linux.intel.com>,\n\tSakari Ailus <sakari.ailus@linux.intel.com>,\n\tDavidlohr Bueso <dave@stgolabs.net>,\n\tJonathan Cameron <jonathan.cameron@huawei.com>,\n\tDave Jiang <dave.jiang@intel.com>,\n\tAlison Schofield <alison.schofield@intel.com>,\n\tVishal Verma <vishal.l.verma@intel.com>,\n\tIra Weiny <ira.weiny@intel.com>,\n\tDan Williams <dan.j.williams@intel.com>,\n\tShawn Guo <shawnguo@kernel.org>", "Cc": "Wolfram Sang <wsa@kernel.org>,\n\tlinux-kernel@vger.kernel.org,\n\tdriver-core@lists.linux.dev,\n\timx@lists.linux.dev,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-clk@vger.kernel.org,\n\tlinux-i2c@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-pci@vger.kernel.org,\n\tlinux-sound@vger.kernel.org,\n\tpatches@opensource.cirrus.com,\n\tlinux-gpio@vger.kernel.org,\n\tlinux-pm@vger.kernel.org,\n\tlinux-spi@vger.kernel.org,\n\tlinux-acpi@vger.kernel.org,\n\tlinux-cxl@vger.kernel.org,\n\tAllan Nielsen <allan.nielsen@microchip.com>,\n\tHoratiu Vultur <horatiu.vultur@microchip.com>,\n\tSteen Hegelund <steen.hegelund@microchip.com>,\n\tLuca Ceresoli <luca.ceresoli@bootlin.com>,\n\tThomas Petazzoni <thomas.petazzoni@bootlin.com>", "Subject": "[PATCH v6 21/27] misc: lan966x_pci: Split dtso in dtsi/dtso", "Date": "Wed, 25 Mar 2026 15:35:48 +0100", "Message-ID": "<20260325143555.451852-22-herve.codina@bootlin.com>", "X-Mailer": "git-send-email 2.53.0", "In-Reply-To": "<20260325143555.451852-1-herve.codina@bootlin.com>", "References": "<20260325143555.451852-1-herve.codina@bootlin.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Last-TLS-Session-Version": "TLSv1.3" }, "content": "The lan966x_pci.dtso file contains descriptions related to both the\nLAN966x PCI device chip and the LAN966x PCI device board where the chip\nis soldered.\n\nSplit the file in order to have:\n - lan966x_pci.dtsi\n The description related to the PCI chip.\n\n - lan966x_pci.dtso\n The description of the PCI board.\n\nSigned-off-by: Herve Codina <herve.codina@bootlin.com>\nReviewed-by: Andrew Lunn <andrew@lunn.ch>\n---\n MAINTAINERS | 1 +\n drivers/misc/lan966x_pci.dtsi | 130 +++++++++++++++++++++++++\n drivers/misc/lan966x_pci.dtso | 175 +++++++---------------------------\n 3 files changed, 166 insertions(+), 140 deletions(-)\n create mode 100644 drivers/misc/lan966x_pci.dtsi", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex 55af015174a5..441fe74e7ef7 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -17305,6 +17305,7 @@ MICROCHIP LAN966X PCI DRIVER\n M:\tHerve Codina <herve.codina@bootlin.com>\n S:\tMaintained\n F:\tdrivers/misc/lan966x_pci.c\n+F:\tdrivers/misc/lan966x_pci.dtsi\n F:\tdrivers/misc/lan966x_pci.dtso\n \n MICROCHIP LAN969X ETHERNET DRIVER\ndiff --git a/drivers/misc/lan966x_pci.dtsi b/drivers/misc/lan966x_pci.dtsi\nnew file mode 100644\nindex 000000000000..170298084fa5\n--- /dev/null\n+++ b/drivers/misc/lan966x_pci.dtsi\n@@ -0,0 +1,130 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/*\n+ * Copyright (C) 2025 Microchip UNG\n+ */\n+\n+#include <dt-bindings/interrupt-controller/irq.h>\n+\n+cpu_clk: clock-600000000 {\n+\tcompatible = \"fixed-clock\";\n+\t#clock-cells = <0>;\n+\tclock-frequency = <600000000>; /* CPU clock = 600MHz */\n+};\n+\n+ddr_clk: clock-30000000 {\n+\tcompatible = \"fixed-clock\";\n+\t#clock-cells = <0>;\n+\tclock-frequency = <30000000>; /* Fabric clock = 30MHz */\n+};\n+\n+sys_clk: clock-15625000 {\n+\tcompatible = \"fixed-clock\";\n+\t#clock-cells = <0>;\n+\tclock-frequency = <15625000>; /* System clock = 15.625MHz */\n+};\n+\n+pci-ep-bus@0 {\n+\tcompatible = \"simple-bus\";\n+\t#address-cells = <1>;\n+\t#size-cells = <1>;\n+\n+\t/*\n+\t * map @0xe2000000 (32MB) to BAR0 (CPU)\n+\t * map @0xe0000000 (16MB) to BAR1 (AMBA)\n+\t */\n+\tranges = <0xe2000000 0x00 0x00 0x00 0x2000000\n+\t\t 0xe0000000 0x01 0x00 0x00 0x1000000>;\n+\n+\tswitch: switch@e0000000 {\n+\t\tcompatible = \"microchip,lan966x-switch\";\n+\t\treg = <0xe0000000 0x0100000>,\n+\t\t <0xe2000000 0x0800000>;\n+\t\treg-names = \"cpu\", \"gcb\";\n+\t\tinterrupt-parent = <&oic>;\n+\t\tinterrupts = <12 IRQ_TYPE_LEVEL_HIGH>,\n+\t\t\t <9 IRQ_TYPE_LEVEL_HIGH>;\n+\t\tinterrupt-names = \"xtr\", \"ana\";\n+\t\tresets = <&reset 0>;\n+\t\treset-names = \"switch\";\n+\t\tstatus = \"disabled\";\n+\n+\t\tethernet-ports {\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tport0: port@0 {\n+\t\t\t\treg = <0>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\n+\t\t\tport1: port@1 {\n+\t\t\t\treg = <1>;\n+\t\t\t\tstatus = \"disabled\";\n+\t\t\t};\n+\t\t};\n+\t};\n+\n+\tcpu_ctrl: syscon@e00c0000 {\n+\t\tcompatible = \"microchip,lan966x-cpu-syscon\", \"syscon\";\n+\t\treg = <0xe00c0000 0xa8>;\n+\t};\n+\n+\toic: oic@e00c0120 {\n+\t\tcompatible = \"microchip,lan966x-oic\";\n+\t\t#interrupt-cells = <2>;\n+\t\tinterrupt-controller;\n+\t\tinterrupts = <0>; /* PCI INTx assigned interrupt */\n+\t\treg = <0xe00c0120 0x190>;\n+\t};\n+\n+\treset: reset@e200400c {\n+\t\tcompatible = \"microchip,lan966x-switch-reset\";\n+\t\treg = <0xe200400c 0x4>, <0xe00c0000 0xa8>;\n+\t\treg-names = \"gcb\",\"cpu\";\n+\t\t#reset-cells = <1>;\n+\t\tcpu-syscon = <&cpu_ctrl>;\n+\t};\n+\n+\tgpio: pinctrl@e2004064 {\n+\t\tcompatible = \"microchip,lan966x-pinctrl\";\n+\t\treg = <0xe2004064 0xb4>,\n+\t\t <0xe2010024 0x138>;\n+\t\tresets = <&reset 0>;\n+\t\treset-names = \"switch\";\n+\t\tgpio-controller;\n+\t\t#gpio-cells = <2>;\n+\t\tgpio-ranges = <&gpio 0 0 78>;\n+\t\tinterrupt-parent = <&oic>;\n+\t\tinterrupt-controller;\n+\t\tinterrupts = <17 IRQ_TYPE_LEVEL_HIGH>;\n+\t\t#interrupt-cells = <2>;\n+\t};\n+\n+\tmdio1: mdio@e200413c {\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\t\tcompatible = \"microchip,lan966x-miim\";\n+\t\treg = <0xe200413c 0x24>,\n+\t\t <0xe2010020 0x4>;\n+\t\tresets = <&reset 0>;\n+\t\treset-names = \"switch\";\n+\t\tstatus = \"disabled\";\n+\n+\t\tlan966x_phy0: ethernet-lan966x_phy@1 {\n+\t\t\treg = <1>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\tlan966x_phy1: ethernet-lan966x_phy@2 {\n+\t\t\treg = <2>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\t};\n+\n+\tserdes: serdes@e202c000 {\n+\t\tcompatible = \"microchip,lan966x-serdes\";\n+\t\treg = <0xe202c000 0x9c>,\n+\t\t <0xe2004010 0x4>;\n+\t\t#phy-cells = <2>;\n+\t};\n+};\ndiff --git a/drivers/misc/lan966x_pci.dtso b/drivers/misc/lan966x_pci.dtso\nindex 94a967b384f3..3ad50abee72d 100644\n--- a/drivers/misc/lan966x_pci.dtso\n+++ b/drivers/misc/lan966x_pci.dtso\n@@ -3,10 +3,7 @@\n * Copyright (C) 2022 Microchip UNG\n */\n \n-#include <dt-bindings/clock/microchip,lan966x.h>\n #include <dt-bindings/gpio/gpio.h>\n-#include <dt-bindings/interrupt-controller/irq.h>\n-#include <dt-bindings/mfd/atmel-flexcom.h>\n #include <dt-bindings/phy/phy-lan966x-serdes.h>\n \n /dts-v1/;\n@@ -29,148 +26,46 @@ __overlay__ {\n \t\t\t#address-cells = <3>;\n \t\t\t#size-cells = <2>;\n \n-\t\t\tcpu_clk: clock-600000000 {\n-\t\t\t\tcompatible = \"fixed-clock\";\n-\t\t\t\t#clock-cells = <0>;\n-\t\t\t\tclock-frequency = <600000000>; /* CPU clock = 600MHz */\n-\t\t\t};\n-\n-\t\t\tddr_clk: clock-30000000 {\n-\t\t\t\tcompatible = \"fixed-clock\";\n-\t\t\t\t#clock-cells = <0>;\n-\t\t\t\tclock-frequency = <30000000>; /* Fabric clock = 30MHz */\n-\t\t\t};\n-\n-\t\t\tsys_clk: clock-15625000 {\n-\t\t\t\tcompatible = \"fixed-clock\";\n-\t\t\t\t#clock-cells = <0>;\n-\t\t\t\tclock-frequency = <15625000>; /* System clock = 15.625MHz */\n-\t\t\t};\n-\n-\t\t\tpci-ep-bus@0 {\n-\t\t\t\tcompatible = \"simple-bus\";\n-\t\t\t\t#address-cells = <1>;\n-\t\t\t\t#size-cells = <1>;\n-\n-\t\t\t\t/*\n-\t\t\t\t * map @0xe2000000 (32MB) to BAR0 (CPU)\n-\t\t\t\t * map @0xe0000000 (16MB) to BAR1 (AMBA)\n-\t\t\t\t */\n-\t\t\t\tranges = <0xe2000000 0x00 0x00 0x00 0x2000000\n-\t\t\t\t 0xe0000000 0x01 0x00 0x00 0x1000000>;\n-\n-\t\t\t\tswitch: switch@e0000000 {\n-\t\t\t\t\tcompatible = \"microchip,lan966x-switch\";\n-\t\t\t\t\treg = <0xe0000000 0x0100000>,\n-\t\t\t\t\t <0xe2000000 0x0800000>;\n-\t\t\t\t\treg-names = \"cpu\", \"gcb\";\n-\n-\t\t\t\t\tinterrupt-parent = <&oic>;\n-\t\t\t\t\tinterrupts = <12 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t\t\t\t <9 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\t\tinterrupt-names = \"xtr\", \"ana\";\n-\n-\t\t\t\t\tresets = <&reset 0>;\n-\t\t\t\t\treset-names = \"switch\";\n-\n-\t\t\t\t\tpinctrl-names = \"default\";\n-\t\t\t\t\tpinctrl-0 = <&tod_pins>;\n-\n-\t\t\t\t\tethernet-ports {\n-\t\t\t\t\t\t#address-cells = <1>;\n-\t\t\t\t\t\t#size-cells = <0>;\n-\n-\t\t\t\t\t\tport0: port@0 {\n-\t\t\t\t\t\t\tphy-handle = <&lan966x_phy0>;\n-\n-\t\t\t\t\t\t\treg = <0>;\n-\t\t\t\t\t\t\tphy-mode = \"gmii\";\n-\t\t\t\t\t\t\tphys = <&serdes 0 CU(0)>;\n-\t\t\t\t\t\t};\n-\n-\t\t\t\t\t\tport1: port@1 {\n-\t\t\t\t\t\t\tphy-handle = <&lan966x_phy1>;\n-\n-\t\t\t\t\t\t\treg = <1>;\n-\t\t\t\t\t\t\tphy-mode = \"gmii\";\n-\t\t\t\t\t\t\tphys = <&serdes 1 CU(1)>;\n-\t\t\t\t\t\t};\n-\t\t\t\t\t};\n-\t\t\t\t};\n-\n-\t\t\t\tcpu_ctrl: syscon@e00c0000 {\n-\t\t\t\t\tcompatible = \"microchip,lan966x-cpu-syscon\", \"syscon\";\n-\t\t\t\t\treg = <0xe00c0000 0xa8>;\n-\t\t\t\t};\n-\n-\t\t\t\toic: oic@e00c0120 {\n-\t\t\t\t\tcompatible = \"microchip,lan966x-oic\";\n-\t\t\t\t\t#interrupt-cells = <2>;\n-\t\t\t\t\tinterrupt-controller;\n-\t\t\t\t\tinterrupts = <0>; /* PCI INTx assigned interrupt */\n-\t\t\t\t\treg = <0xe00c0120 0x190>;\n-\t\t\t\t};\n-\n-\t\t\t\treset: reset@e200400c {\n-\t\t\t\t\tcompatible = \"microchip,lan966x-switch-reset\";\n-\t\t\t\t\treg = <0xe200400c 0x4>, <0xe00c0000 0xa8>;\n-\t\t\t\t\treg-names = \"gcb\",\"cpu\";\n-\t\t\t\t\t#reset-cells = <1>;\n-\t\t\t\t\tcpu-syscon = <&cpu_ctrl>;\n-\t\t\t\t};\n-\n-\t\t\t\tgpio: pinctrl@e2004064 {\n-\t\t\t\t\tcompatible = \"microchip,lan966x-pinctrl\";\n-\t\t\t\t\treg = <0xe2004064 0xb4>,\n-\t\t\t\t\t <0xe2010024 0x138>;\n-\t\t\t\t\tresets = <&reset 0>;\n-\t\t\t\t\treset-names = \"switch\";\n-\t\t\t\t\tgpio-controller;\n-\t\t\t\t\t#gpio-cells = <2>;\n-\t\t\t\t\tgpio-ranges = <&gpio 0 0 78>;\n-\t\t\t\t\tinterrupt-parent = <&oic>;\n-\t\t\t\t\tinterrupt-controller;\n-\t\t\t\t\tinterrupts = <17 IRQ_TYPE_LEVEL_HIGH>;\n-\t\t\t\t\t#interrupt-cells = <2>;\n+\t\t\t#include \"lan966x_pci.dtsi\"\n+\t\t};\n+\t};\n+};\n \n-\t\t\t\t\ttod_pins: tod_pins {\n-\t\t\t\t\t\tpins = \"GPIO_36\";\n-\t\t\t\t\t\tfunction = \"ptpsync_1\";\n-\t\t\t\t\t};\n+&gpio {\n+\ttod_pins: tod_pins {\n+\t\tpins = \"GPIO_36\";\n+\t\tfunction = \"ptpsync_1\";\n+\t};\n+};\n \n-\t\t\t\t\tfc0_a_pins: fcb4-i2c-pins {\n-\t\t\t\t\t\t/* RXD, TXD */\n-\t\t\t\t\t\tpins = \"GPIO_9\", \"GPIO_10\";\n-\t\t\t\t\t\tfunction = \"fc0_a\";\n-\t\t\t\t\t};\n-\t\t\t\t};\n+&lan966x_phy0 {\n+\tstatus = \"okay\";\n+};\n \n-\t\t\t\tmdio1: mdio@e200413c {\n-\t\t\t\t\t#address-cells = <1>;\n-\t\t\t\t\t#size-cells = <0>;\n-\t\t\t\t\tcompatible = \"microchip,lan966x-miim\";\n-\t\t\t\t\treg = <0xe200413c 0x24>,\n-\t\t\t\t\t <0xe2010020 0x4>;\n+&lan966x_phy1 {\n+\tstatus = \"okay\";\n+};\n \n-\t\t\t\t\tresets = <&reset 0>;\n-\t\t\t\t\treset-names = \"switch\";\n+&mdio1 {\n+\tstatus = \"okay\";\n+};\n \n-\t\t\t\t\tlan966x_phy0: ethernet-lan966x_phy@1 {\n-\t\t\t\t\t\treg = <1>;\n-\t\t\t\t\t};\n+&port0 {\n+\tphy-handle = <&lan966x_phy0>;\n+\tphy-mode = \"gmii\";\n+\tphys = <&serdes 0 CU(0)>;\n+\tstatus = \"okay\";\n+};\n \n-\t\t\t\t\tlan966x_phy1: ethernet-lan966x_phy@2 {\n-\t\t\t\t\t\treg = <2>;\n-\t\t\t\t\t};\n-\t\t\t\t};\n+&port1 {\n+\tphy-handle = <&lan966x_phy1>;\n+\tphy-mode = \"gmii\";\n+\tphys = <&serdes 1 CU(1)>;\n+\tstatus = \"okay\";\n+};\n \n-\t\t\t\tserdes: serdes@e202c000 {\n-\t\t\t\t\tcompatible = \"microchip,lan966x-serdes\";\n-\t\t\t\t\treg = <0xe202c000 0x9c>,\n-\t\t\t\t\t <0xe2004010 0x4>;\n-\t\t\t\t\t#phy-cells = <2>;\n-\t\t\t\t};\n-\t\t\t};\n-\t\t};\n-\t};\n+&switch {\n+\tpinctrl-names = \"default\";\n+\tpinctrl-0 = <&tod_pins>;\n+\tstatus = \"okay\";\n };\n", "prefixes": [ "v6", "21/27" ] }