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GET /api/patches/2215883/?format=api
{ "id": 2215883, "url": "http://patchwork.ozlabs.org/api/patches/2215883/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260325135811.148480-3-jonathanh@nvidia.com/", "project": { "id": 21, "url": "http://patchwork.ozlabs.org/api/projects/21/?format=api", "name": "Linux Tegra Development", "link_name": "linux-tegra", "list_id": "linux-tegra.vger.kernel.org", "list_email": "linux-tegra@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260325135811.148480-3-jonathanh@nvidia.com>", "list_archive_url": null, "date": "2026-03-25T13:58:10", "name": "[V3,2/3] dt-bindings: net: Fix Tegra234 MGBE PTP clock", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "1e4a0d158168326d9bf1e84c4c5ea0d505d25449", "submitter": { "id": 66273, "url": "http://patchwork.ozlabs.org/api/people/66273/?format=api", "name": "Jon Hunter", "email": "jonathanh@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-tegra/patch/20260325135811.148480-3-jonathanh@nvidia.com/mbox/", "series": [ { "id": 497451, "url": "http://patchwork.ozlabs.org/api/series/497451/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-tegra/list/?series=497451", "date": "2026-03-25T13:58:11", "name": "net: stmmac: Fix Tegra234 MGBE clock", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/497451/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215883/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215883/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-tegra+bounces-13231-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-tegra@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=Nvidia.com header.i=@Nvidia.com header.a=rsa-sha256\n header.s=selector2 header.b=Uu1Cd1s9;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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pr=C", "From": "Jon Hunter <jonathanh@nvidia.com>", "To": "Andrew Lunn <andrew+netdev@lunn.ch>, \"David S . Miller\"\n\t<davem@davemloft.net>, Eric Dumazet <edumazet@google.com>, Jakub Kicinski\n\t<kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>, Rob Herring\n\t<robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>, Conor Dooley\n\t<conor+dt@kernel.org>, Thierry Reding <thierry.reding@gmail.com>", "CC": "<netdev@vger.kernel.org>, <devicetree@vger.kernel.org>,\n\t<linux-tegra@vger.kernel.org>, Jon Hunter <jonathanh@nvidia.com>", "Subject": "[PATCH V3 2/3] dt-bindings: net: Fix Tegra234 MGBE PTP clock", "Date": "Wed, 25 Mar 2026 13:58:10 +0000", "Message-ID": "<20260325135811.148480-3-jonathanh@nvidia.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260325135811.148480-1-jonathanh@nvidia.com>", "References": "<20260325135811.148480-1-jonathanh@nvidia.com>", "Precedence": "bulk", "X-Mailing-List": "linux-tegra@vger.kernel.org", "List-Id": "<linux-tegra.vger.kernel.org>", "List-Subscribe": "<mailto:linux-tegra+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-tegra+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-NVConfidentiality": "public", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-NV-OnPremToCloud": "ExternallySecured", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "SN1PEPF0002BA4B:EE_|SA5PPFB1A5CE29A:EE_", "X-MS-Office365-Filtering-Correlation-Id": "002d67d1-3a1f-42ca-16ee-08de8a76a66d", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "\n\tBCL:0;ARA:13230040|376014|7416014|1800799024|82310400026|36860700016|18002099003|22082099003|56012099003;", "X-Microsoft-Antispam-Message-Info": "\n\t8xeRrq2xmibG78dOegg/WpV8+Tg7jlYFK0c6vTtH7AfTx739+Qa5qWPj3tEsz1EvBslxRCWWDPjewBqekxeAS/zTrOiRvPtAfr2zFjQYagIIZGMIIBVBny8h0aNGdgTO5Ai0tTvBxL3BXZ0vR5owmo8b71uc03AyBYIVy2f+axvyeI0148xNaKVIAZNtNkAb4EN40lN+xYJqgCgulDzVBZcPfvLNW/OSqMkPJVmXUyPWPq0di0YP83LwHA+7qjUSSZ6uj1+WG9SXvT+V+gfs7Anw3Tq43YVErc53ry5SxUTkuCU627RETQif2PTshGqCt8uYEKfkNuHT8eHr09KKM/2KA8Vj02WMaRjFq0kFDL+r73q7zUjyivScRK9DO47xGQk1/MGkPd3/0/PgeGjWxgXkbX4YcVXnLS7rl29lwvmKnXD/e4/w3rJZvXyf0ej+/T8l9GABbLl+UempvTHeO4P2tuL+gL/9RLi9qGrMoE1MlsgVK8dbPHvKA55iVFfrHTP+jUTCZczmemIXQH7tPFWxFcerglemrCJ2iA1Lt8LGIEoVVzwgSsim1IRndw9dbHTxNGVh44HDDrFwHpxnwzzSuOIr8YvO4vUL1yFjZiuxySXem1AhoXo9qI4EsNCMH7aiQZHLd3F5b9K3VXWxvGs3LsAG6QNuow60pDgI3VNONbdOFGAx5nUS4EfkLmW0LqWH+2LZI8ohdYMDnPK7rq8IYdXQa2UUVtcX8VFyGBVixSxscLqVhcFUBosz09pIV1w214HG3LPGRBL9L/tq6g==", "X-Forefront-Antispam-Report": "\n\tCIP:216.228.118.233;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc7edge2.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(1800799024)(82310400026)(36860700016)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\tCeRRzaziU9tAsQgEXwsJ8HLQKGluJz8HF0483ZLM3An5aKPkr1wN2CDBL8fQxTX9urj3+HqDm0Iac8+s/LmbWPCUOkj8uNfka6W2YfD7qE1kgY0wMC1u4G/GtkI9S3iIbmZZgySCTdYstUwht8VsoZKp0Q7dW+iKPF80DMu2R40CUwVNp79UcgOtCmSMhePORMQYtXMa7X2fA8ttWWcT+3nyYaI227e9Zd98F/kJzAZcANW4r6ZgCiiyoqveeKUuv42UhHrxSQTvzRaSPQ3V+HAnX8Y/ulxG3daj6Q3QVBuTq51jHEwA542LTymsULnvV6UFTjw4HK8GSuD/QsytYnRbHi+uX/Wz00U7FD6aEF67zA07BV3tkimLRk5GTK+hzh1u9ahTjHAuBw3+SLOMpKQW8/MwZhlKFAQIngNAzX1HMwyKi5W2nEVAowVngeEX", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "25 Mar 2026 13:58:53.4335\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 002d67d1-3a1f-42ca-16ee-08de8a76a66d", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.118.233];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tSN1PEPF0002BA4B.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "SA5PPFB1A5CE29A" }, "content": "The PTP clock for the Tegra234 MGBE device is incorrectly named\n'ptp-ref' and should be 'ptp_ref'. This is causing the following\nwarning to be observed on Tegra234 platforms that use this device:\n\n ERR KERN tegra-mgbe 6800000.ethernet eth0: Invalid PTP clock rate\n WARNING KERN tegra-mgbe 6800000.ethernet eth0: PTP init failed\n\nAlthough this constitutes an ABI breakage in the binding for this\ndevice, PTP support has clearly never worked and so fix this now\nso we can correct the device-tree for this device. Note that the\nMGBE driver still supports the legacy 'ptp-ref' clock name and so\nolder/existing device-trees will still work, but given that this\nis not the correct name, there is no point to advertise this in the\nbinding.\n\nFixes: 189c2e5c7669 (\"dt-bindings: net: Add Tegra234 MGBE\")\nSigned-off-by: Jon Hunter <jonathanh@nvidia.com>\n---\n .../devicetree/bindings/net/nvidia,tegra234-mgbe.yaml | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)", "diff": "diff --git a/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml b/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml\nindex 2bd3efff2485..215f14d1897d 100644\n--- a/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml\n+++ b/Documentation/devicetree/bindings/net/nvidia,tegra234-mgbe.yaml\n@@ -42,7 +42,7 @@ properties:\n - const: mgbe\n - const: mac\n - const: mac-divider\n- - const: ptp-ref\n+ - const: ptp_ref\n - const: rx-input-m\n - const: rx-input\n - const: tx\n@@ -133,7 +133,7 @@ examples:\n <&bpmp TEGRA234_CLK_MGBE0_RX_PCS_M>,\n <&bpmp TEGRA234_CLK_MGBE0_RX_PCS>,\n <&bpmp TEGRA234_CLK_MGBE0_TX_PCS>;\n- clock-names = \"mgbe\", \"mac\", \"mac-divider\", \"ptp-ref\", \"rx-input-m\",\n+ clock-names = \"mgbe\", \"mac\", \"mac-divider\", \"ptp_ref\", \"rx-input-m\",\n \"rx-input\", \"tx\", \"eee-pcs\", \"rx-pcs-input\", \"rx-pcs-m\",\n \"rx-pcs\", \"tx-pcs\";\n resets = <&bpmp TEGRA234_RESET_MGBE0_MAC>,\n", "prefixes": [ "V3", "2/3" ] }