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GET /api/patches/2215873/?format=api
{ "id": 2215873, "url": "http://patchwork.ozlabs.org/api/patches/2215873/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260325-vfio_pci_ism-v8-2-ddc504cde914@linux.ibm.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260325-vfio_pci_ism-v8-2-ddc504cde914@linux.ibm.com>", "list_archive_url": null, "date": "2026-03-25T13:31:24", "name": "[v8,2/3] vfio/ism: Implement vfio_pci driver for ISM devices", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "4009ee2195965c9341c4142c346cf96ced13bf08", "submitter": { "id": 91782, "url": "http://patchwork.ozlabs.org/api/people/91782/?format=api", "name": "Julian Ruess", "email": "julianr@linux.ibm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260325-vfio_pci_ism-v8-2-ddc504cde914@linux.ibm.com/mbox/", "series": [ { "id": 497446, "url": "http://patchwork.ozlabs.org/api/series/497446/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497446", "date": "2026-03-25T13:31:25", "name": "vfio/pci: Introduce vfio_pci driver for ISM devices", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/497446/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215873/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215873/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51067-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=ibm.com header.i=@ibm.com header.a=rsa-sha256\n header.s=pp1 header.b=kMtWHNIQ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774445513; cv=none;\n b=Javbid3/52ip2ul6ANRgMyCl10zgv7+3cghgcEEbyN+eV5saXZhwVj0270m91lWXKpcMP2tLFTQA70Cau2kDms3nSAwKNeko/8VDRuIXsrWLmm+EIxw+KqhhOjZkYj3m7jGHG1xV4mBvavolkjhpjXNUOohPF2fzNfsLr2BW5s4=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774445513; c=relaxed/simple;\n\tbh=e/WHK9eQHqJppvXVumAc5cape4zt0+8UGLMbgKfUplA=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=EqU76GwoO1HvBOAu7Y1vnppCiDtxEuOxiOCuErhP7BCd+SKLohAbvDekIF5L+wgvYMS49IDU4CSVeL/K0UEZfg66ypxX7WPq5AgTImx+lCtPfGThMSVIaWRNHcU+hLX1hCbhXQ4JOINWsA9U8VJ5hqIpPUKmqx0K3kHSXK+b9dw=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=linux.ibm.com;\n spf=pass smtp.mailfrom=linux.ibm.com;\n dkim=pass (2048-bit key) header.d=ibm.com header.i=@ibm.com\n header.b=kMtWHNIQ; arc=none smtp.client-ip=148.163.158.5", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ibm.com; h=cc\n\t:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=pp1; bh=mi/XJW\n\t+UuxDWdQ3UFZILQbyAK8t0jctZSDE0vjfPAdI=; b=kMtWHNIQX5zr4xU93jD6JG\n\tgi+e8Nk6QxtS5pXD4Z5JS+aN5D5NHs/NNnxKVg9r7MtnB94uz2bVsRo2a7RW2t1m\n\tXNC63JSa/1vDhTjvRo+3voZej4mqi3fub7avmqSuhfklgRLMjzZoqjwwKSDAbf19\n\tpqUo5u8lMVBGDVheNQlEPeoOz6u8sMg4y2icxI9SHaasI5SxLDLsGXwWMnAoUCFB\n\tDf52CjDHGRTbxTyyoeQQUE4DZ46WHHHZeC5EiF69S0kgsfIUvkrihJi9xhUASU64\n\t6YAn5nRri+LjRQoR48x0RxUfeNH1NzbHMvQJ8WxGI699i6rZDXMMsw+Zu2uH6+Kg\n\t==", "From": "Julian Ruess <julianr@linux.ibm.com>", "Date": "Wed, 25 Mar 2026 14:31:24 +0100", "Subject": "[PATCH v8 2/3] vfio/ism: Implement vfio_pci driver for ISM devices", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260325-vfio_pci_ism-v8-2-ddc504cde914@linux.ibm.com>", "References": "<20260325-vfio_pci_ism-v8-0-ddc504cde914@linux.ibm.com>", "In-Reply-To": "<20260325-vfio_pci_ism-v8-0-ddc504cde914@linux.ibm.com>", "To": "schnelle@linux.ibm.com, wintera@linux.ibm.com, ts@linux.ibm.com,\n oberpar@linux.ibm.com, gbayer@linux.ibm.com,\n Alex Williamson <alex@shazbot.org>, Jason Gunthorpe <jgg@ziepe.ca>,\n Yishai Hadas <yishaih@nvidia.com>,\n Shameer Kolothum <skolothumtho@nvidia.com>,\n Kevin Tian <kevin.tian@intel.com>", "Cc": "mjrosato@linux.ibm.com, alifm@linux.ibm.com, raspl@linux.ibm.com,\n hca@linux.ibm.com, agordeev@linux.ibm.com, gor@linux.ibm.com,\n julianr@linux.ibm.com, kvm@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-s390@vger.kernel.org,\n linux-pci@vger.kernel.org", "X-Mailer": "b4 0.14.2", "X-TM-AS-GCONF": "00", "X-Proofpoint-GUID": "r3iXgog0fNFNFWffXWS7fGfnQjfkarHs", "X-Proofpoint-ORIG-GUID": "r3iXgog0fNFNFWffXWS7fGfnQjfkarHs", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMzI1MDA5NSBTYWx0ZWRfX3/SMhv93HUEe\n pCKzYxUbUW/+q6H9EbVSpSjJMRBN3DKU1lWIkq9/OQwz4U03n11UeFmf7FbppaWQUr8ANQ1/+nL\n /2rg6JBGjYhX3KEto3DLI6bFwlIppVDWxiEPlFwLkBi528amBB/UIxJFKO6LOHB1mgGaWKTY8cS\n 7hvQ7eTtTeF7M+vo7Rb3CjrKzwk6xdSc8uMHOgRZklyNgngYa+aOBQQYiLXBpk5LkRxGYHGd1zf\n JGveD61nonCzgu2M7PqkcGDp7LZ1hETNOhbwfOOEQXllesRCjlYnrV6GEUlhk1Btw9Q+qpOF9jk\n 4fKwboYGfKrRl5KCd45kKOp7lQ92idjs8aqZZW7YRxuCm1TJxl5Wc9hPiKk1cG9u4EyfybnAdVz\n KNRtD7nYoX4GRw5eMgS+fQOrM2T1GH9uXqzHQkgH30Pff3pDWF0axfbj5kgJcd9RTQct8NWlk+J\n S2LruIkpmMfCf/Mb0Gw==", "X-Authority-Analysis": "v=2.4 cv=KbXfcAYD c=1 sm=1 tr=0 ts=69c3e3c2 cx=c_pps\n a=GFwsV6G8L6GxiO2Y/PsHdQ==:117 a=GFwsV6G8L6GxiO2Y/PsHdQ==:17\n a=IkcTkHD0fZMA:10 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=RnoormkPH1_aCDwRdu11:22 a=RzCfie-kr_QcCd8fBx8p:22 a=VnNF1IyMAAAA:8\n a=XdfKsd1DaXcHZAhJ8BgA:9 a=QEXdDO2ut3YA:10", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-03-25_04,2026-03-24_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n suspectscore=0 impostorscore=0 malwarescore=0 adultscore=0 clxscore=1015\n priorityscore=1501 bulkscore=0 lowpriorityscore=0 phishscore=0 spamscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2603050001 definitions=main-2603250095" }, "content": "Add a vfio_pci variant driver for the s390-specific Internal Shared\nMemory (ISM) devices used for inter-VM communication.\n\nThis enables the development of vfio-pci-based user space drivers for\nISM devices.\n\nOn s390, kernel primitives such as ioread() and iowrite() are switched\nover from function-handle-based PCI load/stores instructions to PCI\nmemory-I/O (MIO) loads/stores when these are available and not\nexplicitly disabled. Since these instructions cannot be used with ISM\ndevices, ensure that classic function-handle-based PCI instructions are\nused instead.\n\nThe driver is still required even when MIO instructions are disabled, as\nthe ISM device relies on the PCI store block (PCISTB) instruction to\nperform write operations.\n\nStores are not fragmented, therefore one ioctl corresponds to exactly\none PCISTB instruction. User space must ensure to not write more than\n4096 bytes at once to an ISM BAR which is the maximum payload of the\nPCISTB instruction.\n\nReviewed-by: Alexandra Winter <wintera@linux.ibm.com>\nReviewed-by: Niklas Schnelle <schnelle@linux.ibm.com>\nSigned-off-by: Julian Ruess <julianr@linux.ibm.com>\n---\n drivers/vfio/pci/Kconfig | 2 +\n drivers/vfio/pci/Makefile | 2 +\n drivers/vfio/pci/ism/Kconfig | 10 ++\n drivers/vfio/pci/ism/Makefile | 3 +\n drivers/vfio/pci/ism/main.c | 408 ++++++++++++++++++++++++++++++++++++++++++\n 5 files changed, 425 insertions(+)", "diff": "diff --git a/drivers/vfio/pci/Kconfig b/drivers/vfio/pci/Kconfig\nindex 1e82b44bda1a0a544e1add7f4b06edecf35aaf81..296bf01e185ecacc388ebc69e92706c99e47c814 100644\n--- a/drivers/vfio/pci/Kconfig\n+++ b/drivers/vfio/pci/Kconfig\n@@ -60,6 +60,8 @@ config VFIO_PCI_DMABUF\n \n source \"drivers/vfio/pci/mlx5/Kconfig\"\n \n+source \"drivers/vfio/pci/ism/Kconfig\"\n+\n source \"drivers/vfio/pci/hisilicon/Kconfig\"\n \n source \"drivers/vfio/pci/pds/Kconfig\"\ndiff --git a/drivers/vfio/pci/Makefile b/drivers/vfio/pci/Makefile\nindex e0a0757dd1d2b0bc69b7e4d79441d5cacf4e1cd8..6138f1bf241df04e7419f196b404abdf9b194050 100644\n--- a/drivers/vfio/pci/Makefile\n+++ b/drivers/vfio/pci/Makefile\n@@ -11,6 +11,8 @@ obj-$(CONFIG_VFIO_PCI) += vfio-pci.o\n \n obj-$(CONFIG_MLX5_VFIO_PCI) += mlx5/\n \n+obj-$(CONFIG_ISM_VFIO_PCI) += ism/\n+\n obj-$(CONFIG_HISI_ACC_VFIO_PCI) += hisilicon/\n \n obj-$(CONFIG_PDS_VFIO_PCI) += pds/\ndiff --git a/drivers/vfio/pci/ism/Kconfig b/drivers/vfio/pci/ism/Kconfig\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..02f47d25fed2d34c732b67b3a3655b64a7625467\n--- /dev/null\n+++ b/drivers/vfio/pci/ism/Kconfig\n@@ -0,0 +1,10 @@\n+# SPDX-License-Identifier: GPL-2.0\n+config ISM_VFIO_PCI\n+\ttristate \"VFIO support for ISM devices\"\n+\tdepends on S390\n+\tselect VFIO_PCI_CORE\n+\thelp\n+\t This provides user space support for IBM Internal Shared Memory (ISM)\n+\t Adapter devices using the VFIO framework.\n+\n+\t If you don't know what to do here, say N.\ndiff --git a/drivers/vfio/pci/ism/Makefile b/drivers/vfio/pci/ism/Makefile\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..32cc3c66dd11395da85a2b6f05b3d97036ed8a35\n--- /dev/null\n+++ b/drivers/vfio/pci/ism/Makefile\n@@ -0,0 +1,3 @@\n+# SPDX-License-Identifier: GPL-2.0\n+obj-$(CONFIG_ISM_VFIO_PCI) += ism-vfio-pci.o\n+ism-vfio-pci-y := main.o\ndiff --git a/drivers/vfio/pci/ism/main.c b/drivers/vfio/pci/ism/main.c\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..00bc81f7225f806eac1b99c4520ab5a68137885e\n--- /dev/null\n+++ b/drivers/vfio/pci/ism/main.c\n@@ -0,0 +1,408 @@\n+// SPDX-License-Identifier: GPL-2.0\n+/*\n+ * vfio-ISM driver for s390\n+ *\n+ * Copyright IBM Corp.\n+ */\n+\n+#include \"../vfio_pci_priv.h\"\n+#include \"linux/slab.h\"\n+\n+#define ISM_VFIO_PCI_OFFSET_SHIFT 48\n+#define ISM_VFIO_PCI_OFFSET_TO_INDEX(off) ((off) >> ISM_VFIO_PCI_OFFSET_SHIFT)\n+#define ISM_VFIO_PCI_INDEX_TO_OFFSET(index) ((u64)(index) << ISM_VFIO_PCI_OFFSET_SHIFT)\n+#define ISM_VFIO_PCI_OFFSET_MASK (((u64)(1) << ISM_VFIO_PCI_OFFSET_SHIFT) - 1)\n+\n+/*\n+ * Use __zpci_load() to bypass automatic use of\n+ * PCI MIO instructions which are not supported on ISM devices\n+ */\n+#define ISM_READ(size) \\\n+\tstatic int ism_read##size(struct zpci_dev *zdev, int bar, \\\n+\t\t\t\t size_t *filled, char __user *buf, \\\n+\t\t\t\t loff_t off) \\\n+\t{ \\\n+\t\tu64 req, tmp; \\\n+\t\tu##size val; \\\n+\t\tint ret; \\\n+\t\t\t\t\t\t\t\t\t \\\n+\t\treq = ZPCI_CREATE_REQ(READ_ONCE(zdev->fh), bar, sizeof(val)); \\\n+\t\tret = __zpci_load(&tmp, req, off); \\\n+\t\tif (ret) \\\n+\t\t\treturn ret; \\\n+\t\tval = (u##size)tmp; \\\n+\t\tif (copy_to_user(buf, &val, sizeof(val))) \\\n+\t\t\treturn -EFAULT; \\\n+\t\t*filled = sizeof(val); \\\n+\t\treturn 0;\t\t\t\t\t\t \\\n+\t}\n+\n+ISM_READ(64);\n+ISM_READ(32);\n+ISM_READ(16);\n+ISM_READ(8);\n+\n+struct ism_vfio_pci_core_device {\n+\tstruct vfio_pci_core_device core_device;\n+\tstruct kmem_cache *store_block_cache;\n+};\n+\n+static int ism_vfio_pci_open_device(struct vfio_device *core_vdev)\n+{\n+\tstruct ism_vfio_pci_core_device *ivpcd;\n+\tstruct vfio_pci_core_device *vdev;\n+\tint ret;\n+\n+\tivpcd = container_of(core_vdev, struct ism_vfio_pci_core_device,\n+\t\t\t core_device.vdev);\n+\tvdev = &ivpcd->core_device;\n+\n+\tret = vfio_pci_core_enable(vdev);\n+\tif (ret)\n+\t\treturn ret;\n+\n+\tvfio_pci_core_finish_enable(vdev);\n+\treturn 0;\n+}\n+\n+/*\n+ * ism_vfio_pci_do_io_r()\n+ *\n+ * On s390, kernel primitives such as ioread() and iowrite() are switched over\n+ * from function-handle-based PCI load/stores instructions to PCI memory-I/O (MIO)\n+ * loads/stores when these are available and not explicitly disabled. Since these\n+ * instructions cannot be used with ISM devices, ensure that classic\n+ * function-handle-based PCI instructions are used instead.\n+ */\n+static ssize_t ism_vfio_pci_do_io_r(struct vfio_pci_core_device *vdev,\n+\t\t\t\t char __user *buf, loff_t off, size_t count,\n+\t\t\t\t int bar)\n+{\n+\tstruct zpci_dev *zdev = to_zpci(vdev->pdev);\n+\tssize_t done = 0;\n+\tint ret;\n+\n+\twhile (count) {\n+\t\tsize_t filled;\n+\n+\t\tif (count >= 8 && IS_ALIGNED(off, 8)) {\n+\t\t\tret = ism_read64(zdev, bar, &filled, buf, off);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\t\t} else if (count >= 4 && IS_ALIGNED(off, 4)) {\n+\t\t\tret = ism_read32(zdev, bar, &filled, buf, off);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\t\t} else if (count >= 2 && IS_ALIGNED(off, 2)) {\n+\t\t\tret = ism_read16(zdev, bar, &filled, buf, off);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\t\t} else {\n+\t\t\tret = ism_read8(zdev, bar, &filled, buf, off);\n+\t\t\tif (ret)\n+\t\t\t\treturn ret;\n+\t\t}\n+\n+\t\tcount -= filled;\n+\t\tdone += filled;\n+\t\toff += filled;\n+\t\tbuf += filled;\n+\t}\n+\n+\treturn done;\n+}\n+\n+/*\n+ * ism_vfio_pci_do_io_w()\n+ *\n+ * Ensure that the PCI store block (PCISTB) instruction is used as required by the\n+ * ISM device. The ISM device also uses a 256 TiB BAR 0 for write operations,\n+ * which requires a 48bit region address space (ISM_VFIO_PCI_OFFSET_SHIFT).\n+ */\n+static ssize_t ism_vfio_pci_do_io_w(struct vfio_pci_core_device *vdev,\n+\t\t\t\t char __user *buf, loff_t off, size_t count,\n+\t\t\t\t int bar)\n+{\n+\tstruct zpci_dev *zdev = to_zpci(vdev->pdev);\n+\tstruct ism_vfio_pci_core_device *ivpcd;\n+\tssize_t ret;\n+\tvoid *data;\n+\tu64 req;\n+\n+\tif (count > zdev->maxstbl)\n+\t\treturn -EINVAL;\n+\tif (((off % PAGE_SIZE) + count) > PAGE_SIZE)\n+\t\treturn -EINVAL;\n+\n+\tivpcd = container_of(vdev, struct ism_vfio_pci_core_device,\n+\t\t\t core_device);\n+\tdata = kmem_cache_alloc(ivpcd->store_block_cache, GFP_KERNEL);\n+\tif (!data)\n+\t\treturn -ENOMEM;\n+\n+\tif (copy_from_user(data, buf, count)) {\n+\t\tret = -EFAULT;\n+\t\tgoto out_free;\n+\t}\n+\n+\treq = ZPCI_CREATE_REQ(READ_ONCE(zdev->fh), bar, count);\n+\tret = __zpci_store_block(data, req, off);\n+\tif (ret)\n+\t\tgoto out_free;\n+\n+\tret = count;\n+\n+out_free:\n+\tkmem_cache_free(ivpcd->store_block_cache, data);\n+\treturn ret;\n+}\n+\n+static ssize_t ism_vfio_pci_bar_rw(struct vfio_pci_core_device *vdev,\n+\t\t\t\t char __user *buf, size_t count, loff_t *ppos,\n+\t\t\t\t bool iswrite)\n+{\n+\tint bar = ISM_VFIO_PCI_OFFSET_TO_INDEX(*ppos);\n+\tloff_t pos = *ppos & ISM_VFIO_PCI_OFFSET_MASK;\n+\tresource_size_t end;\n+\tssize_t done = 0;\n+\n+\tif (pci_resource_start(vdev->pdev, bar))\n+\t\tend = pci_resource_len(vdev->pdev, bar);\n+\telse\n+\t\treturn -EINVAL;\n+\n+\tif (pos >= end)\n+\t\treturn -EINVAL;\n+\n+\tcount = min(count, (size_t)(end - pos));\n+\n+\tif (iswrite)\n+\t\tdone = ism_vfio_pci_do_io_w(vdev, buf, pos, count, bar);\n+\telse\n+\t\tdone = ism_vfio_pci_do_io_r(vdev, buf, pos, count, bar);\n+\n+\tif (done >= 0)\n+\t\t*ppos += done;\n+\n+\treturn done;\n+}\n+\n+static ssize_t ism_vfio_pci_config_rw(struct vfio_pci_core_device *vdev,\n+\t\t\t\t char __user *buf, size_t count,\n+\t\t\t\t loff_t *ppos, bool iswrite)\n+{\n+\tloff_t pos = *ppos;\n+\tsize_t done = 0;\n+\tint ret = 0;\n+\n+\tpos &= ISM_VFIO_PCI_OFFSET_MASK;\n+\n+\twhile (count) {\n+\t\t/*\n+\t\t * zPCI must not use MIO instructions for config space access,\n+\t\t * so we can use common code path here.\n+\t\t */\n+\t\tret = vfio_pci_config_rw_single(vdev, buf, count, &pos, iswrite);\n+\t\tif (ret < 0)\n+\t\t\treturn ret;\n+\n+\t\tcount -= ret;\n+\t\tdone += ret;\n+\t\tbuf += ret;\n+\t\tpos += ret;\n+\t}\n+\n+\t*ppos += done;\n+\n+\treturn done;\n+}\n+\n+static ssize_t ism_vfio_pci_rw(struct vfio_device *core_vdev, char __user *buf,\n+\t\t\t size_t count, loff_t *ppos, bool iswrite)\n+{\n+\tunsigned int index = ISM_VFIO_PCI_OFFSET_TO_INDEX(*ppos);\n+\tstruct vfio_pci_core_device *vdev;\n+\tint ret;\n+\n+\tvdev = container_of(core_vdev, struct vfio_pci_core_device, vdev);\n+\n+\tif (!count)\n+\t\treturn 0;\n+\n+\tswitch (index) {\n+\tcase VFIO_PCI_CONFIG_REGION_INDEX:\n+\t\tret = ism_vfio_pci_config_rw(vdev, buf, count, ppos, iswrite);\n+\t\tbreak;\n+\n+\tcase VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:\n+\t\tret = ism_vfio_pci_bar_rw(vdev, buf, count, ppos, iswrite);\n+\t\tbreak;\n+\n+\tdefault:\n+\t\treturn -EINVAL;\n+\t}\n+\n+\treturn ret;\n+}\n+\n+static ssize_t ism_vfio_pci_read(struct vfio_device *core_vdev,\n+\t\t\t\t char __user *buf, size_t count, loff_t *ppos)\n+{\n+\treturn ism_vfio_pci_rw(core_vdev, buf, count, ppos, false);\n+}\n+\n+static ssize_t ism_vfio_pci_write(struct vfio_device *core_vdev,\n+\t\t\t\t const char __user *buf, size_t count,\n+\t\t\t\t loff_t *ppos)\n+{\n+\treturn ism_vfio_pci_rw(core_vdev, (char __user *)buf, count, ppos,\n+\t\t\t true);\n+}\n+\n+static int ism_vfio_pci_ioctl_get_region_info(struct vfio_device *core_vdev,\n+\t\t\t\t\t struct vfio_region_info *info,\n+\t\t\t\t\t struct vfio_info_cap *caps)\n+{\n+\tstruct vfio_pci_core_device *vdev =\n+\t\tcontainer_of(core_vdev, struct vfio_pci_core_device, vdev);\n+\tstruct pci_dev *pdev = vdev->pdev;\n+\n+\tswitch (info->index) {\n+\tcase VFIO_PCI_CONFIG_REGION_INDEX:\n+\t\tinfo->offset = ISM_VFIO_PCI_INDEX_TO_OFFSET(info->index);\n+\t\tinfo->size = pdev->cfg_size;\n+\t\tinfo->flags = VFIO_REGION_INFO_FLAG_READ |\n+\t\t\t VFIO_REGION_INFO_FLAG_WRITE;\n+\t\tbreak;\n+\tcase VFIO_PCI_BAR0_REGION_INDEX ... VFIO_PCI_BAR5_REGION_INDEX:\n+\t\tinfo->offset = ISM_VFIO_PCI_INDEX_TO_OFFSET(info->index);\n+\t\tinfo->size = pci_resource_len(pdev, info->index);\n+\t\tif (!info->size) {\n+\t\t\tinfo->flags = 0;\n+\t\t\tbreak;\n+\t\t}\n+\t\tinfo->flags = VFIO_REGION_INFO_FLAG_READ |\n+\t\t\t VFIO_REGION_INFO_FLAG_WRITE;\n+\t\tbreak;\n+\tdefault:\n+\t\tinfo->offset = 0;\n+\t\tinfo->size = 0;\n+\t\tinfo->flags = 0;\n+\t\treturn -EINVAL;\n+\t}\n+\treturn 0;\n+}\n+\n+static int ism_vfio_pci_init_dev(struct vfio_device *core_vdev)\n+{\n+\tstruct zpci_dev *zdev = to_zpci(to_pci_dev(core_vdev->dev));\n+\tstruct ism_vfio_pci_core_device *ivpcd;\n+\tchar cache_name[20];\n+\tint ret;\n+\n+\tivpcd = container_of(core_vdev, struct ism_vfio_pci_core_device,\n+\t\t\t core_device.vdev);\n+\n+\tsnprintf(cache_name, sizeof(cache_name), \"ism_sb_fid_%08x\", zdev->fid);\n+\n+\tivpcd->store_block_cache =\n+\t\tkmem_cache_create(cache_name, zdev->maxstbl,\n+\t\t\t\t (&(struct kmem_cache_args){\n+\t\t\t\t\t .align = PAGE_SIZE,\n+\t\t\t\t\t .useroffset = 0,\n+\t\t\t\t\t .usersize = zdev->maxstbl,\n+\t\t\t\t }),\n+\t\t\t\t (SLAB_RECLAIM_ACCOUNT | SLAB_ACCOUNT));\n+\tif (!ivpcd->store_block_cache)\n+\t\treturn -ENOMEM;\n+\n+\tret = vfio_pci_core_init_dev(core_vdev);\n+\tif (ret)\n+\t\tkmem_cache_destroy(ivpcd->store_block_cache);\n+\n+\treturn ret;\n+}\n+\n+static void ism_vfio_pci_release_dev(struct vfio_device *core_vdev)\n+{\n+\tstruct ism_vfio_pci_core_device *ivpcd = container_of(\n+\t\tcore_vdev, struct ism_vfio_pci_core_device, core_device.vdev);\n+\n+\tkmem_cache_destroy(ivpcd->store_block_cache);\n+\tvfio_pci_core_release_dev(core_vdev);\n+}\n+\n+static const struct vfio_device_ops ism_pci_ops = {\n+\t.name = \"ism-vfio-pci\",\n+\t.init = ism_vfio_pci_init_dev,\n+\t.release = ism_vfio_pci_release_dev,\n+\t.open_device = ism_vfio_pci_open_device,\n+\t.close_device = vfio_pci_core_close_device,\n+\t.ioctl = vfio_pci_core_ioctl,\n+\t.get_region_info_caps = ism_vfio_pci_ioctl_get_region_info,\n+\t.device_feature = vfio_pci_core_ioctl_feature,\n+\t.read = ism_vfio_pci_read,\n+\t.write = ism_vfio_pci_write,\n+\t.request = vfio_pci_core_request,\n+\t.match = vfio_pci_core_match,\n+\t.match_token_uuid = vfio_pci_core_match_token_uuid,\n+\t.bind_iommufd = vfio_iommufd_physical_bind,\n+\t.unbind_iommufd = vfio_iommufd_physical_unbind,\n+\t.attach_ioas = vfio_iommufd_physical_attach_ioas,\n+\t.detach_ioas = vfio_iommufd_physical_detach_ioas,\n+};\n+\n+static int ism_vfio_pci_probe(struct pci_dev *pdev,\n+\t\t\t const struct pci_device_id *id)\n+{\n+\tstruct ism_vfio_pci_core_device *ivpcd;\n+\tint ret;\n+\n+\tivpcd = vfio_alloc_device(ism_vfio_pci_core_device, core_device.vdev,\n+\t\t\t\t &pdev->dev, &ism_pci_ops);\n+\tif (IS_ERR(ivpcd))\n+\t\treturn PTR_ERR(ivpcd);\n+\n+\tdev_set_drvdata(&pdev->dev, &ivpcd->core_device);\n+\n+\tret = vfio_pci_core_register_device(&ivpcd->core_device);\n+\tif (ret)\n+\t\tvfio_put_device(&ivpcd->core_device.vdev);\n+\n+\treturn ret;\n+}\n+\n+static void ism_vfio_pci_remove(struct pci_dev *pdev)\n+{\n+\tstruct vfio_pci_core_device *core_device;\n+\tstruct ism_vfio_pci_core_device *ivpcd;\n+\n+\tcore_device = dev_get_drvdata(&pdev->dev);\n+\tivpcd = container_of(core_device, struct ism_vfio_pci_core_device,\n+\t\t\t core_device);\n+\n+\tvfio_pci_core_unregister_device(&ivpcd->core_device);\n+\tvfio_put_device(&ivpcd->core_device.vdev);\n+}\n+\n+static const struct pci_device_id ism_device_table[] = {\n+\t{ PCI_DRIVER_OVERRIDE_DEVICE_VFIO(PCI_VENDOR_ID_IBM,\n+\t\t\t\t\t PCI_DEVICE_ID_IBM_ISM) },\n+\t{}\n+};\n+MODULE_DEVICE_TABLE(pci, ism_device_table);\n+\n+static struct pci_driver ism_vfio_pci_driver = {\n+\t.name = KBUILD_MODNAME,\n+\t.id_table = ism_device_table,\n+\t.probe = ism_vfio_pci_probe,\n+\t.remove = ism_vfio_pci_remove,\n+\t.err_handler = &vfio_pci_core_err_handlers,\n+\t.driver_managed_dma = true,\n+};\n+\n+module_pci_driver(ism_vfio_pci_driver);\n+\n+MODULE_LICENSE(\"GPL\");\n+MODULE_DESCRIPTION(\"vfio-pci variant driver for the IBM Internal Shared Memory (ISM) device\");\n+MODULE_AUTHOR(\"IBM Corporation\");\n", "prefixes": [ "v8", "2/3" ] }