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GET /api/patches/2215721/?format=api
{ "id": 2215721, "url": "http://patchwork.ozlabs.org/api/patches/2215721/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260325-ipq5210_tlmm-v3-1-3a4b9bb6b1fc@oss.qualcomm.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260325-ipq5210_tlmm-v3-1-3a4b9bb6b1fc@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-03-25T07:35:15", "name": "[v3,1/2] dt-bindings: pinctrl: qcom: add IPQ5210 pinctrl", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d7563e1c36a837d8e21095b37e367fe9c13dbe81", "submitter": { "id": 90386, "url": "http://patchwork.ozlabs.org/api/people/90386/?format=api", "name": "Kathiravan Thirumoorthy", "email": "kathiravan.thirumoorthy@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260325-ipq5210_tlmm-v3-1-3a4b9bb6b1fc@oss.qualcomm.com/mbox/", "series": [ { "id": 497392, "url": "http://patchwork.ozlabs.org/api/series/497392/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497392", "date": "2026-03-25T07:35:14", "name": "Introduce TLMM driver for Qualcomm IPQ5210 SoC", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/497392/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215721/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215721/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-34110-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=RTUHxj9T;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=cGzh9ioK;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=172.232.135.74; helo=sto.lore.kernel.org;\n envelope-from=linux-gpio+bounces-34110-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"RTUHxj9T\";\n\tdkim=pass (2048-bit key) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"cGzh9ioK\"", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=205.220.168.131", "smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=oss.qualcomm.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=oss.qualcomm.com" ], "Received": [ "from sto.lore.kernel.org (sto.lore.kernel.org [172.232.135.74])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgdxJ1G2zz1y1G\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 25 Mar 2026 18:35:48 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id 15E67305AF04\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 25 Mar 2026 07:35:35 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 693AE371045;\n\tWed, 25 Mar 2026 07:35:28 +0000 (UTC)", "from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id CF4EE368947\n\tfor <linux-gpio@vger.kernel.org>; Wed, 25 Mar 2026 07:35:26 +0000 (UTC)", "from pps.filterd (m0279862.ppops.net [127.0.0.1])\n\tby mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 62P3xQKN919830\n\tfor <linux-gpio@vger.kernel.org>; Wed, 25 Mar 2026 07:35:26 GMT", "from mail-pj1-f70.google.com (mail-pj1-f70.google.com\n [209.85.216.70])\n\tby mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4d489mgpb5-1\n\t(version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n\tfor <linux-gpio@vger.kernel.org>; Wed, 25 Mar 2026 07:35:26 +0000 (GMT)", "by mail-pj1-f70.google.com with SMTP id\n 98e67ed59e1d1-35a019abd6aso677925a91.0\n for <linux-gpio@vger.kernel.org>;\n Wed, 25 Mar 2026 00:35:26 -0700 (PDT)", "from hu-kathirav-blr.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. 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98e67ed59e1d1-35c0d1451d7mr2069678a91.8.1774424124883;\n Wed, 25 Mar 2026 00:35:24 -0700 (PDT)" ], "From": "Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>", "Date": "Wed, 25 Mar 2026 13:05:15 +0530", "Subject": "[PATCH v3 1/2] dt-bindings: pinctrl: qcom: add IPQ5210 pinctrl", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260325-ipq5210_tlmm-v3-1-3a4b9bb6b1fc@oss.qualcomm.com>", "References": "<20260325-ipq5210_tlmm-v3-0-3a4b9bb6b1fc@oss.qualcomm.com>", "In-Reply-To": "<20260325-ipq5210_tlmm-v3-0-3a4b9bb6b1fc@oss.qualcomm.com>", "To": "Bjorn Andersson <andersson@kernel.org>, Linus Walleij <linusw@kernel.org>,\n Rob Herring <robh@kernel.org>,\n Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>", "Cc": "linux-arm-msm@vger.kernel.org, linux-gpio@vger.kernel.org,\n devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>", "X-Mailer": "b4 0.15.0", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1774424117; l=4923;\n i=kathiravan.thirumoorthy@oss.qualcomm.com; s=20230906;\n h=from:subject:message-id; bh=HP+mqyFAMLaG5JbtzUuj2ODbvmGxKbRdJ4aEIhbTJIE=;\n b=EwzUnxbmBvnSeBwDViWl0UAsw8hIDfaGVRTUj423GxJnVNYtGP9URKRjHhtXZVAOGDBZoRnZy\n CF11WDKPwezDJIgS8vLu9TKvMWdZlk9HYDjBLmoNzJEtGbv09rklV0j", "X-Developer-Key": "i=kathiravan.thirumoorthy@oss.qualcomm.com; a=ed25519;\n pk=xWsR7pL6ch+vdZ9MoFGEaP61JUaRf0XaZYWztbQsIiM=", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMzI1MDA1MyBTYWx0ZWRfX2LjmTE9N/jhq\n r2dLxt8KDLVYhrJS4aiZiAmzoVJPbRxYor+KgGn8V0XKW1mCwYt6JCeu0MjujPjCr5pE35/Kngi\n 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"vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-03-25_02,2026-03-24_01,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n priorityscore=1501 phishscore=0 adultscore=0 lowpriorityscore=0\n malwarescore=0 suspectscore=0 bulkscore=0 clxscore=1015 impostorscore=0\n spamscore=0 classifier=typeunknown authscore=0 authtc= authcc= route=outbound\n adjust=0 reason=mlx scancount=1 engine=8.22.0-2603050001\n definitions=main-2603250053" }, "content": "Add device tree bindings for IPQ5210 TLMM block.\n\nSigned-off-by: Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>\n---\n .../bindings/pinctrl/qcom,ipq5210-tlmm.yaml | 123 +++++++++++++++++++++\n 1 file changed, 123 insertions(+)", "diff": "diff --git a/Documentation/devicetree/bindings/pinctrl/qcom,ipq5210-tlmm.yaml b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5210-tlmm.yaml\nnew file mode 100644\nindex 000000000000..12c5e76235a3\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/pinctrl/qcom,ipq5210-tlmm.yaml\n@@ -0,0 +1,123 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/pinctrl/qcom,ipq5210-tlmm.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Qualcomm IPQ5210 TLMM pin controller\n+\n+maintainers:\n+ - Bjorn Andersson <andersson@kernel.org>\n+ - Kathiravan Thirumoorthy <kathiravan.thirumoorthy@oss.qualcomm.com>\n+\n+description:\n+ Top Level Mode Multiplexer pin controller in Qualcomm IPQ5210 SoC.\n+\n+allOf:\n+ - $ref: /schemas/pinctrl/qcom,tlmm-common.yaml#\n+\n+properties:\n+ compatible:\n+ const: qcom,ipq5210-tlmm\n+\n+ reg:\n+ maxItems: 1\n+\n+ interrupts:\n+ maxItems: 1\n+\n+ gpio-reserved-ranges:\n+ minItems: 1\n+ maxItems: 27\n+\n+ gpio-line-names:\n+ maxItems: 54\n+\n+patternProperties:\n+ \"-state$\":\n+ oneOf:\n+ - $ref: \"#/$defs/qcom-ipq5210-tlmm-state\"\n+ - patternProperties:\n+ \"-pins$\":\n+ $ref: \"#/$defs/qcom-ipq5210-tlmm-state\"\n+ additionalProperties: false\n+\n+$defs:\n+ qcom-ipq5210-tlmm-state:\n+ type: object\n+ description:\n+ Pinctrl node's client devices use subnodes for desired pin configuration.\n+ Client device subnodes use below standard properties.\n+ $ref: qcom,tlmm-common.yaml#/$defs/qcom-tlmm-state\n+ unevaluatedProperties: false\n+\n+ properties:\n+ pins:\n+ description:\n+ List of gpio pins affected by the properties specified in this\n+ subnode.\n+ items:\n+ pattern: \"^gpio([0-9]|[1-4][0-9]|5[0-3])$\"\n+ minItems: 1\n+ maxItems: 36\n+\n+ function:\n+ description:\n+ Specify the alternative function to be configured for the specified\n+ pins.\n+\n+ enum: [ atest_char_start, atest_char_status0, atest_char_status1,\n+ atest_char_status2, atest_char_status3, atest_tic_en, audio_pri,\n+ audio_pri_mclk_out0, audio_pri_mclk_in0, audio_pri_mclk_out1,\n+ audio_pri_mclk_in1, audio_pri_mclk_out2, audio_pri_mclk_in2,\n+ audio_pri_mclk_out3, audio_pri_mclk_in3, audio_sec,\n+ audio_sec_mclk_out0, audio_sec_mclk_in0, audio_sec_mclk_out1,\n+ audio_sec_mclk_in1, audio_sec_mclk_out2, audio_sec_mclk_in2,\n+ audio_sec_mclk_out3, audio_sec_mclk_in3, core_voltage_0,\n+ cri_trng0, cri_trng1, cri_trng2, cri_trng3, dbg_out_clk, dg_out,\n+ gcc_plltest_bypassnl, gcc_plltest_resetn, gcc_tlmm, gpio, led0,\n+ led1, led2, mdc_mst, mdc_slv0, mdc_slv1, mdc_slv2, mdio_mst,\n+ mdio_slv0, mdio_slv1, mdio_slv2, mux_tod_out, pcie0_clk_req_n,\n+ pcie0_wake, pcie1_clk_req_n, pcie1_wake, pll_test,\n+ pon_active_led, pon_mux_sel, pon_rx, pon_rx_los, pon_tx,\n+ pon_tx_burst, pon_tx_dis, pon_tx_fault, pon_tx_sd, gpn_rx_los,\n+ gpn_tx_burst, gpn_tx_dis, gpn_tx_fault, gpn_tx_sd, pps, pwm0,\n+ pwm1, pwm2, pwm3, qdss_cti_trig_in_a0, qdss_cti_trig_in_a1,\n+ qdss_cti_trig_in_b0, qdss_cti_trig_in_b1, qdss_cti_trig_out_a0,\n+ qdss_cti_trig_out_a1, qdss_cti_trig_out_b0,\n+ qdss_cti_trig_out_b1, qdss_traceclk_a, qdss_tracectl_a,\n+ qdss_tracedata_a, qrng_rosc0, qrng_rosc1, qrng_rosc2,\n+ qspi_data, qspi_clk, qspi_cs_n, qup_se0, qup_se1, qup_se2,\n+ qup_se3, qup_se4, qup_se5, qup_se5_l1, resout, rx_los0, rx_los1,\n+ rx_los2, sdc_clk, sdc_cmd, sdc_data, tsens_max ]\n+\n+ required:\n+ - pins\n+\n+required:\n+ - compatible\n+ - reg\n+\n+unevaluatedProperties: false\n+\n+examples:\n+ - |\n+ #include <dt-bindings/interrupt-controller/arm-gic.h>\n+\n+ tlmm: pinctrl@1000000 {\n+ compatible = \"qcom,ipq5210-tlmm\";\n+ reg = <0x01000000 0x300000>;\n+ gpio-controller;\n+ #gpio-cells = <0x2>;\n+ gpio-ranges = <&tlmm 0 0 54>;\n+ interrupts = <GIC_SPI 31 IRQ_TYPE_LEVEL_HIGH>;\n+ interrupt-controller;\n+ #interrupt-cells = <0x2>;\n+\n+ qup-uart1-default-state {\n+ pins = \"gpio38\", \"gpio39\";\n+ function = \"qup_se1\";\n+ drive-strength = <6>;\n+ bias-pull-down;\n+ };\n+ };\n", "prefixes": [ "v3", "1/2" ] }