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GET /api/patches/2215664/?format=api
{ "id": 2215664, "url": "http://patchwork.ozlabs.org/api/patches/2215664/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/1774403912-210670-3-git-send-email-shawn.lin@rock-chips.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<1774403912-210670-3-git-send-email-shawn.lin@rock-chips.com>", "list_archive_url": null, "date": "2026-03-25T01:58:31", "name": "[v5,2/3] Documentation: tracing: Add PCI controller event documentation", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "8f43381054ec32e2a0477f94289cd8be16d7dd22", "submitter": { "id": 66993, "url": "http://patchwork.ozlabs.org/api/people/66993/?format=api", "name": "Shawn Lin", "email": "shawn.lin@rock-chips.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/1774403912-210670-3-git-send-email-shawn.lin@rock-chips.com/mbox/", "series": [ { "id": 497375, "url": "http://patchwork.ozlabs.org/api/series/497375/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497375", "date": "2026-03-25T01:58:29", "name": "PCI Controller event and LTSSM tracepoint support", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/497375/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215664/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215664/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-51004-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=rock-chips.com header.i=@rock-chips.com\n header.a=rsa-sha256 header.s=default header.b=T25oK540;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; 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t=1774403936; c=relaxed/simple;\n\tbh=NAOObBjWYkTwBB2oaO+yEQHCURdt5DpiaopucuaD/eo=;\n\th=From:To:Cc:Subject:Date:Message-Id:In-Reply-To:References;\n b=JRa6m1DycjmQQMxZFcnvAIqMC02AnL6ySh40by4SnZHYESTW1Z5Qi3xoAksCCgPue60dtkCuQHdI5UR5GleFigbQiTwiMnx/cioeAuKMjXR3vZ2RAweTV9CzBPHEku4GIMQ+X+XzduyRpz3ZLA/p+E9hiem6YZcCRI1b2cCPppw=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=rock-chips.com;\n spf=pass smtp.mailfrom=rock-chips.com;\n dkim=pass (1024-bit key) header.d=rock-chips.com header.i=@rock-chips.com\n header.b=T25oK540; arc=none smtp.client-ip=220.197.31.83", "From": "Shawn Lin <shawn.lin@rock-chips.com>", "To": "Manivannan Sadhasivam <mani@kernel.org>,\n\tBjorn Helgaas <bhelgaas@google.com>", "Cc": "linux-rockchip@lists.infradead.org,\n\tlinux-pci@vger.kernel.org,\n\tlinux-trace-kernel@vger.kernel.org,\n\tlinux-doc@vger.kernel.org,\n\tSteven Rostedt <rostedt@goodmis.org>,\n\tShawn Lin <shawn.lin@rock-chips.com>", "Subject": "[PATCH v5 2/3] Documentation: tracing: Add PCI controller event\n documentation", "Date": "Wed, 25 Mar 2026 09:58:31 +0800", "Message-Id": "<1774403912-210670-3-git-send-email-shawn.lin@rock-chips.com>", "X-Mailer": "git-send-email 2.7.4", "In-Reply-To": "<1774403912-210670-1-git-send-email-shawn.lin@rock-chips.com>", "References": "<1774403912-210670-1-git-send-email-shawn.lin@rock-chips.com>", "X-HM-Tid": "0a9d22b72f9a09cckunm61c156f0a55897", "X-HM-MType": "1", "X-HM-Spam-Status": "e1kfGhgUHx5ZQUpXWQgPGg8OCBgUHx5ZQUlOS1dZFg8aDwILHllBWSg2Ly\n\ttZV1koWUFDSUNOT01LS0k3V1ktWUFJV1kPCRoVCBIfWUFZGU5LGlYZTkIeHU4aThkfSUxWFRQJFh\n\toXVRMBExYaEhckFA4PWVdZGBILWUFZTkNVSUlVTFVKSk9ZV1kWGg8SFR0UWUFZT0tIVUpLSU9PT0\n\thVSktLVUpCS0tZBg++", "DKIM-Signature": "a=rsa-sha256;\n\tb=T25oK54011WllIvrtGUBvYeaP2ibH5Eum1pnPUYo8ntQlhBjIeHDZ3YzhuKtttuvYpPJJJyEZ9ISdLzoVI97zwD1F5esX+AaX8gA5X0Tuxgu8Wf4zhn3CLRC+ePN/JX9gfXPRuEWgm9bhQkfhr1WevV1jgB3P/qJkBgukU9nAF0=;\n s=default; c=relaxed/relaxed; d=rock-chips.com; v=1;\n\tbh=GDNTzFg7mWA3WGCmaG5bEv/LuzxprcU2vL1BmwDw0fg=;\n\th=date:mime-version:subject:message-id:from;", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>" }, "content": "The available tracepoint, pcie_ltssm_state_transition, monitors the LTSSM\nstate transition for debugging purpose. Add description about it.\n\nSigned-off-by: Shawn Lin <shawn.lin@rock-chips.com>\n---\n\nChanges in v5: None\nChanges in v4: None\nChanges in v3:\n- Add toctree entry in Documentation/trace/index.rst(Bagas Sanjaya)\n- fix mismatch section underline length(Bagas Sanjaya)\n- Make example snippets in code block(Bagas Sanjaya)\n- warp context into 80 columns and fix the file name(Bjorn)\n\nChanges in v2: None\n\n Documentation/trace/events-pci-controller.rst | 42 +++++++++++++++++++++++++++\n Documentation/trace/index.rst | 1 +\n 2 files changed, 43 insertions(+)\n create mode 100644 Documentation/trace/events-pci-controller.rst", "diff": "diff --git a/Documentation/trace/events-pci-controller.rst b/Documentation/trace/events-pci-controller.rst\nnew file mode 100644\nindex 0000000..cb9f715\n--- /dev/null\n+++ b/Documentation/trace/events-pci-controller.rst\n@@ -0,0 +1,42 @@\n+.. SPDX-License-Identifier: GPL-2.0\n+\n+======================================\n+Subsystem Trace Points: PCI Controller\n+======================================\n+\n+Overview\n+========\n+The PCI controller tracing system provides tracepoints to monitor controller\n+level information for debugging purpose. The events normally show up here:\n+\n+\t/sys/kernel/tracing/events/pci_controller\n+\n+Cf. include/trace/events/pci_controller.h for the events definitions.\n+\n+Available Tracepoints\n+=====================\n+\n+pcie_ltssm_state_transition\n+---------------------------\n+\n+Monitors PCIe LTSSM state transition including state and rate information\n+::\n+\n+ pcie_ltssm_state_transition \"dev: %s state: %s rate: %s\\n\"\n+\n+**Parameters**:\n+\n+* ``dev`` - PCIe controller instance\n+* ``state`` - PCIe LTSSM state\n+* ``rate`` - PCIe date rate\n+\n+**Example Usage**:\n+\n+.. code-block:: shell\n+\n+ # Enable the tracepoint\n+ echo 1 > /sys/kernel/debug/tracing/events/pci_controller/pcie_ltssm_state_transition/enable\n+\n+ # Monitor events (the following output is generated when a device is linking)\n+ cat /sys/kernel/debug/tracing/trace_pipe\n+ kworker/0:0-9 [000] ..... 5.600221: pcie_ltssm_state_transition: dev: a40000000.pcie state: RCVRY_EQ2 rate: 8.0 GT/s\ndiff --git a/Documentation/trace/index.rst b/Documentation/trace/index.rst\nindex 036db96..5d9bf469 100644\n--- a/Documentation/trace/index.rst\n+++ b/Documentation/trace/index.rst\n@@ -55,6 +55,7 @@ applications.\n events-nmi\n events-msr\n events-pci\n+ events-pci-controller\n boottime-trace\n histogram\n histogram-design\n", "prefixes": [ "v5", "2/3" ] }