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GET /api/patches/2215573/?format=api
{ "id": 2215573, "url": "http://patchwork.ozlabs.org/api/patches/2215573/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260324-dev-b4-aaeon-mcu-driver-v4-4-afb011df4794@bootlin.com/", "project": { "id": 42, "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api", "name": "Linux GPIO development", "link_name": "linux-gpio", "list_id": "linux-gpio.vger.kernel.org", "list_email": "linux-gpio@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260324-dev-b4-aaeon-mcu-driver-v4-4-afb011df4794@bootlin.com>", "list_archive_url": null, "date": "2026-03-24T19:24:30", "name": "[v4,4/5] gpio: aaeon: Add GPIO driver for SRG-IMX8P MCU", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "493d5ef0c51ff2a1f69d225332ed6a5c06a380f1", "submitter": { "id": 82054, "url": "http://patchwork.ozlabs.org/api/people/82054/?format=api", "name": "Thomas Perrot (Schneider Electric)", "email": "thomas.perrot@bootlin.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260324-dev-b4-aaeon-mcu-driver-v4-4-afb011df4794@bootlin.com/mbox/", "series": [ { "id": 497335, "url": "http://patchwork.ozlabs.org/api/series/497335/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=497335", "date": "2026-03-24T19:24:29", "name": "Add support for AAEON SRG-IMX8P MCU", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/497335/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215573/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215573/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-gpio+bounces-34104-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-gpio@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=bootlin.com header.i=@bootlin.com header.a=rsa-sha256\n header.s=dkim header.b=uRCM72zo;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; 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a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1774380300; cv=none;\n b=svgSBG+q0Klp+lgpzlrzAU0UllGOtvKg7ldLoQDwWRPWF3OQrtqwFhthm1uZ43NAod36i6disHV+maWN4vv0a3TsOsISQjCL96lHZxQLghZpSSfV/VJKVAU11WCOE/+ucrcKFS1q/3lQo9usLvluqDdEhw0Wiu0jrly1YBzjWJQ=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1774380300; c=relaxed/simple;\n\tbh=eFqla8qPpbYDWPfac3s+lPB3ga1v1YuIUFaJz8wk9x8=;\n\th=From:Date:Subject:MIME-Version:Content-Type:Message-Id:References:\n\t In-Reply-To:To:Cc;\n b=JkUPjNApTBVTSSzXIyXIGCPt9s3jOjIVvNVwrTvYj30Yc0fhPWYnA1og59RwlN8G0cLEFP4UmTmGzPoUAdkVDBSULWR8qQcjOavXWLHaUBij/gyFpO9QXgYd1ZksPE9RYn2/aXP742cS/HWBWjaH5ewMp6kCxbDGNNPTcjPyZeY=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=bootlin.com;\n spf=pass smtp.mailfrom=bootlin.com;\n dkim=pass (2048-bit key) header.d=bootlin.com header.i=@bootlin.com\n header.b=uRCM72zo; arc=none smtp.client-ip=185.246.85.4", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=bootlin.com; s=dkim;\n\tt=1774380295; h=from:subject:date:message-id:to:cc:mime-version:content-type:\n\t content-transfer-encoding:in-reply-to:references;\n\tbh=965oKsqPDXZ5lcp7Yx51ep8Jv2s0H2ArfAjccQU4GKk=;\n\tb=uRCM72zo8lBaGeHFDWQqQcDXat0HwdCI/rktBpcoJDyPw5MpuuTMKdrVWUIJv8bh1qy1ie\n\tSagFkMWqyWvYGJ75TPsAwQiDohi9yEtJajWvw45VtK3z1OyXjzmegZkk+hvaXuhWJwnDY3\n\taQ5/sQ8q69KblBRCVFT5VwKRu+oyjvfBnanSEdr6sGyOFdmIIK/2+NpQwtUAlXKqptNED8\n\tlbRuO7nZhX88MqsD8bUSt2gZnG6BCTy+3Ar64+kpXISmV5KVg2Jp7+/hVugkCnQZ1XKP9t\n\taE+q0xy+fCjZe82BF0q37DMMDg1pQrxoHcEmwJtAuFZ1H8NdhVNqUGQez6Fpug==", "From": "\"Thomas Perrot (Schneider Electric)\" <thomas.perrot@bootlin.com>", "Date": "Tue, 24 Mar 2026 20:24:30 +0100", "Subject": "[PATCH v4 4/5] gpio: aaeon: Add GPIO driver for SRG-IMX8P MCU", "Precedence": "bulk", "X-Mailing-List": "linux-gpio@vger.kernel.org", "List-Id": "<linux-gpio.vger.kernel.org>", "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "8bit", "Message-Id": "<20260324-dev-b4-aaeon-mcu-driver-v4-4-afb011df4794@bootlin.com>", "References": "<20260324-dev-b4-aaeon-mcu-driver-v4-0-afb011df4794@bootlin.com>", "In-Reply-To": "<20260324-dev-b4-aaeon-mcu-driver-v4-0-afb011df4794@bootlin.com>", "To": "Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>, Linus Walleij <linusw@kernel.org>,\n Bartosz Golaszewski <brgl@kernel.org>, Shawn Guo <shawnguo@kernel.org>,\n Sascha Hauer <s.hauer@pengutronix.de>,\n Pengutronix Kernel Team <kernel@pengutronix.de>,\n Fabio Estevam <festevam@gmail.com>,\n =?utf-8?b?SsOpcsOpbWllIERhdXRoZXJpYmVz?= <jeremie.dautheribes@bootlin.com>,\n Wim Van Sebroeck <wim@linux-watchdog.org>,\n Guenter Roeck <linux@roeck-us.net>, Lee Jones <lee@kernel.org>", "Cc": "devicetree@vger.kernel.org, linux-kernel@vger.kernel.org,\n linux-gpio@vger.kernel.org, imx@lists.linux.dev,\n linux-arm-kernel@lists.infradead.org, linux-watchdog@vger.kernel.org,\n Thomas Petazzoni <thomas.petazzoni@bootlin.com>,\n Miquel Raynal <miquel.raynal@bootlin.com>,\n \"Thomas Perrot (Schneider Electric)\" <thomas.perrot@bootlin.com>,\n Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>", "X-Mailer": "b4 0.14.2", "X-Developer-Signature": "v=1; a=openpgp-sha256; l=9364;\n i=thomas.perrot@bootlin.com; h=from:subject:message-id;\n bh=eFqla8qPpbYDWPfac3s+lPB3ga1v1YuIUFaJz8wk9x8=;\n b=owEB7QES/pANAwAKAZ/ACwVx/grtAcsmYgBpwuT2L/PghhQJMkl5WqxEFd5XhqPGcAepndyP1\n USKyEeRCNGJAbMEAAEKAB0WIQSHQHfGpqMKIwOoEiGfwAsFcf4K7QUCacLk9gAKCRCfwAsFcf4K\n 7fqaDACdg7UlBACv3+rQH4K5eVI0/UYkC0f+pAl6jo7knsBGrTa/sEowEskup8tBPz/HvIzSL4g\n aZaGGLjQ6/pcyaOcAG85/gz0qjWRt7q3OHpTjtc2z5KSNmXtlAuKpbxLWEYViS1Z5YRs+5j/OjK\n fQ4cNEYf5t/+92agfXSGiN1qFUzGePvOelIFGWHFr9L7MqsPaumkSyzwJEnKxmaHm4okBlhbvAJ\n 6zfOueLCCqsxSYFsgqo8fXOVviQOUG/v61i4rqvDCp0VfHZKfneG9Wnla2xl4Ztc4orsHQ7onls\n +xl2VeQ3gHxjC79klM16WQeG77hLXg7ymy3R0J7sucjhcGiZssC3WrzetaJNq/MQmnsLCS0Hv/k\n Tmo0Q0uwRQbkJC0SlbFuCUb2E3pQEUUGjhZOffxz/dFeukzlSP3vizwKcpj3z5/Dtz6nKvxrBy6\n LYSKG/UBGVr5nKDNTjNhpQcqPOL4nqiXzhCXNiRUmv2ocvQ34X5lZNrYk9pOd+9Eqg6zo=", "X-Developer-Key": "i=thomas.perrot@bootlin.com; a=openpgp;\n fpr=874077C6A6A30A2303A812219FC00B0571FE0AED", "X-Last-TLS-Session-Version": "TLSv1.3" }, "content": "Add GPIO driver for the Aaeon SRG-IMX8P embedded controller. This\ndriver supports 7 GPO (General Purpose Output) pins and 12 GPIO pins\nthat can be configured as inputs or outputs.\n\nThe driver implements proper state management for GPO pins (which are\noutput-only) and full direction control for GPIO pins. During probe,\nall pins are reset to a known state (GPOs low, GPIOs as inputs) to\nprevent undefined behavior across system reboots, as the MCU does not\nreset GPIO states on soft reboot.\n\nCo-developed-by: Jérémie Dautheribes (Schneider Electric) <jeremie.dautheribes@bootlin.com>\nSigned-off-by: Jérémie Dautheribes (Schneider Electric) <jeremie.dautheribes@bootlin.com>\nAcked-by: Bartosz Golaszewski <bartosz.golaszewski@oss.qualcomm.com>\nReviewed-by: Linus Walleij <linusw@kernel.org>\nSigned-off-by: Thomas Perrot (Schneider Electric) <thomas.perrot@bootlin.com>\n---\n MAINTAINERS | 1 +\n drivers/gpio/Kconfig | 10 ++\n drivers/gpio/Makefile | 1 +\n drivers/gpio/gpio-aaeon-mcu.c | 221 ++++++++++++++++++++++++++++++++++++++++++\n 4 files changed, 233 insertions(+)", "diff": "diff --git a/MAINTAINERS b/MAINTAINERS\nindex f91b6a1826d04bef8a0f88221f6c8e8a3652cd77..2538f8c4bc1482b139e18243a68f0a21b9be3704 100644\n--- a/MAINTAINERS\n+++ b/MAINTAINERS\n@@ -191,6 +191,7 @@ M:\tThomas Perrot <thomas.perrot@bootlin.com>\n R:\tJérémie Dautheribes <jeremie.dautheribes@bootlin.com>\n S:\tMaintained\n F:\tDocumentation/devicetree/bindings/mfd/aaeon,srg-imx8p-mcu.yaml\n+F:\tdrivers/gpio/gpio-aaeon-mcu.c\n F:\tdrivers/mfd/aaeon-mcu.c\n F:\tinclude/linux/mfd/aaeon-mcu.h\n \ndiff --git a/drivers/gpio/Kconfig b/drivers/gpio/Kconfig\nindex c74da29253e810b51540684b1186e8f274066b69..04285dc77430a5dbdb2d6e03e51bca64a432bf1a 100644\n--- a/drivers/gpio/Kconfig\n+++ b/drivers/gpio/Kconfig\n@@ -157,6 +157,16 @@ config GPIO_74XX_MMIO\n \t 8 bits:\t74244 (Input), 74273 (Output)\n \t 16 bits:\t741624 (Input), 7416374 (Output)\n \n+config GPIO_AAEON_MCU\n+\ttristate \"Aaeon MCU GPIO support\"\n+\tdepends on MFD_AAEON_MCU\n+\tselect GPIO_GENERIC\n+\thelp\n+\t Select this option to enable GPIO support for the Aaeon SRG-IMX8P\n+\t onboard MCU. This driver provides access to GPIO pins and GPO\n+\t (General Purpose Output) pins controlled by the microcontroller.\n+\t The driver handles both input and output configuration.\n+\n config GPIO_ALTERA\n \ttristate \"Altera GPIO\"\n \tselect GPIOLIB_IRQCHIP\ndiff --git a/drivers/gpio/Makefile b/drivers/gpio/Makefile\nindex 2421a8fd3733e0b06c2581262aaa9cd629f66c7d..1ba6318bc558743fbe5910966c2c8fc3f792efe9 100644\n--- a/drivers/gpio/Makefile\n+++ b/drivers/gpio/Makefile\n@@ -29,6 +29,7 @@ obj-$(CONFIG_GPIO_104_IDI_48)\t\t+= gpio-104-idi-48.o\n obj-$(CONFIG_GPIO_104_IDIO_16)\t\t+= gpio-104-idio-16.o\n obj-$(CONFIG_GPIO_74X164)\t\t+= gpio-74x164.o\n obj-$(CONFIG_GPIO_74XX_MMIO)\t\t+= gpio-74xx-mmio.o\n+obj-$(CONFIG_GPIO_AAEON_MCU)\t\t+= gpio-aaeon-mcu.o\n obj-$(CONFIG_GPIO_ADNP)\t\t\t+= gpio-adnp.o\n obj-$(CONFIG_GPIO_ADP5520)\t\t+= gpio-adp5520.o\n obj-$(CONFIG_GPIO_ADP5585)\t\t+= gpio-adp5585.o\ndiff --git a/drivers/gpio/gpio-aaeon-mcu.c b/drivers/gpio/gpio-aaeon-mcu.c\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..3b679259a6c66e3113cadc083dc7b4152d070ed5\n--- /dev/null\n+++ b/drivers/gpio/gpio-aaeon-mcu.c\n@@ -0,0 +1,221 @@\n+// SPDX-License-Identifier: GPL-2.0-or-later\n+/*\n+ * Aaeon MCU GPIO driver\n+ *\n+ * Copyright (C) 2025 Bootlin\n+ * Author: Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>\n+ * Author: Thomas Perrot <thomas.perrot@bootlin.com>\n+ */\n+\n+#include <linux/bitops.h>\n+#include <linux/gpio/driver.h>\n+#include <linux/mfd/aaeon-mcu.h>\n+#include <linux/mod_devicetable.h>\n+#include <linux/module.h>\n+#include <linux/platform_device.h>\n+#include <linux/regmap.h>\n+\n+#define AAEON_MCU_CONFIG_GPIO_INPUT\t0x69\n+#define AAEON_MCU_CONFIG_GPIO_OUTPUT\t0x6F\n+#define AAEON_MCU_READ_GPIO\t\t0x72\n+#define AAEON_MCU_WRITE_GPIO\t\t0x77\n+\n+#define AAEON_MCU_CONTROL_GPO\t\t0x6C\n+\n+#define MAX_GPIOS\t12\n+#define MAX_GPOS\t7\n+\n+struct aaeon_mcu_gpio {\n+\tstruct gpio_chip gc;\n+\tstruct regmap *regmap;\n+\tDECLARE_BITMAP(dir_in, MAX_GPOS + MAX_GPIOS);\n+\tDECLARE_BITMAP(gpo_state, MAX_GPOS);\n+};\n+\n+static int aaeon_mcu_gpio_config_input_cmd(struct aaeon_mcu_gpio *data,\n+\t\t\t\t\t unsigned int offset)\n+{\n+\treturn regmap_write(data->regmap,\n+\t\t\t AAEON_MCU_REG(AAEON_MCU_CONFIG_GPIO_INPUT, offset - 7),\n+\t\t\t 0);\n+}\n+\n+static int aaeon_mcu_gpio_direction_input(struct gpio_chip *gc, unsigned int offset)\n+{\n+\tstruct aaeon_mcu_gpio *data = gpiochip_get_data(gc);\n+\tint ret;\n+\n+\tif (offset < MAX_GPOS) {\n+\t\tdev_err(gc->parent, \"GPIO offset (%d) must be an output GPO\\n\", offset);\n+\t\treturn -EOPNOTSUPP;\n+\t}\n+\n+\tret = aaeon_mcu_gpio_config_input_cmd(data, offset);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\t__set_bit(offset, data->dir_in);\n+\n+\treturn 0;\n+}\n+\n+static int aaeon_mcu_gpio_config_output_cmd(struct aaeon_mcu_gpio *data,\n+\t\t\t\t\t unsigned int offset,\n+\t\t\t\t\t int value)\n+{\n+\tint ret;\n+\n+\tret = regmap_write(data->regmap,\n+\t\t\t AAEON_MCU_REG(AAEON_MCU_CONFIG_GPIO_OUTPUT, offset - 7),\n+\t\t\t 0);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\treturn regmap_write(data->regmap,\n+\t\t\t AAEON_MCU_REG(AAEON_MCU_WRITE_GPIO, offset - 7),\n+\t\t\t !!value);\n+}\n+\n+static int aaeon_mcu_gpio_direction_output(struct gpio_chip *gc, unsigned int offset, int value)\n+{\n+\tstruct aaeon_mcu_gpio *data = gpiochip_get_data(gc);\n+\tint ret;\n+\n+\tif (offset < MAX_GPOS)\n+\t\treturn 0;\n+\n+\tret = aaeon_mcu_gpio_config_output_cmd(data, offset, value);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\t__clear_bit(offset, data->dir_in);\n+\n+\treturn 0;\n+}\n+\n+static int aaeon_mcu_gpio_get_direction(struct gpio_chip *gc, unsigned int offset)\n+{\n+\tstruct aaeon_mcu_gpio *data = gpiochip_get_data(gc);\n+\n+\treturn test_bit(offset, data->dir_in) ?\n+\t\tGPIO_LINE_DIRECTION_IN : GPIO_LINE_DIRECTION_OUT;\n+}\n+\n+static int aaeon_mcu_gpio_get(struct gpio_chip *gc, unsigned int offset)\n+{\n+\tstruct aaeon_mcu_gpio *data = gpiochip_get_data(gc);\n+\tunsigned int rsp;\n+\tint ret;\n+\n+\tif (offset < MAX_GPOS)\n+\t\treturn test_bit(offset, data->gpo_state);\n+\n+\tret = regmap_read(data->regmap,\n+\t\t\t AAEON_MCU_REG(AAEON_MCU_READ_GPIO, offset - 7),\n+\t\t\t &rsp);\n+\tif (ret < 0)\n+\t\treturn ret;\n+\n+\treturn rsp;\n+}\n+\n+static int aaeon_mcu_gpo_set_cmd(struct aaeon_mcu_gpio *data, unsigned int offset, int value)\n+{\n+\treturn regmap_write(data->regmap,\n+\t\t\t AAEON_MCU_REG(AAEON_MCU_CONTROL_GPO, offset + 1),\n+\t\t\t !!value);\n+}\n+\n+static int aaeon_mcu_gpio_set_cmd(struct aaeon_mcu_gpio *data, unsigned int offset, int value)\n+{\n+\treturn regmap_write(data->regmap,\n+\t\t\t AAEON_MCU_REG(AAEON_MCU_WRITE_GPIO, offset - 7),\n+\t\t\t !!value);\n+}\n+\n+static int aaeon_mcu_gpio_set(struct gpio_chip *gc, unsigned int offset,\n+\t\t\t int value)\n+{\n+\tstruct aaeon_mcu_gpio *data = gpiochip_get_data(gc);\n+\n+\tif (offset >= MAX_GPOS)\n+\t\treturn aaeon_mcu_gpio_set_cmd(data, offset, value);\n+\n+\tif (aaeon_mcu_gpo_set_cmd(data, offset, value) == 0)\n+\t\t__assign_bit(offset, data->gpo_state, value);\n+\n+\treturn 0;\n+}\n+\n+static const struct gpio_chip aaeon_mcu_chip = {\n+\t.label\t\t\t= \"gpio-aaeon-mcu\",\n+\t.owner\t\t\t= THIS_MODULE,\n+\t.get_direction\t\t= aaeon_mcu_gpio_get_direction,\n+\t.direction_input\t= aaeon_mcu_gpio_direction_input,\n+\t.direction_output\t= aaeon_mcu_gpio_direction_output,\n+\t.get\t\t\t= aaeon_mcu_gpio_get,\n+\t.set\t\t\t= aaeon_mcu_gpio_set,\n+\t.base\t\t\t= -1,\n+\t.ngpio\t\t\t= MAX_GPOS + MAX_GPIOS,\n+\t.can_sleep\t\t= true,\n+};\n+\n+static void aaeon_mcu_gpio_reset(struct aaeon_mcu_gpio *data, struct device *dev)\n+{\n+\tunsigned int i;\n+\tint ret;\n+\n+\t/* Reset all GPOs */\n+\tfor (i = 0; i < MAX_GPOS; i++) {\n+\t\tret = aaeon_mcu_gpo_set_cmd(data, i, 0);\n+\t\tif (ret < 0)\n+\t\t\tdev_warn(dev, \"Failed to reset GPO %u state: %d\\n\", i, ret);\n+\t\t__clear_bit(i, data->dir_in);\n+\t}\n+\n+\t/* Reset all GPIOs */\n+\tfor (i = MAX_GPOS; i < MAX_GPOS + MAX_GPIOS; i++) {\n+\t\tret = aaeon_mcu_gpio_config_input_cmd(data, i);\n+\t\tif (ret < 0)\n+\t\t\tdev_warn(dev, \"Failed to reset GPIO %u state: %d\\n\", i, ret);\n+\t\t__set_bit(i, data->dir_in);\n+\t}\n+}\n+\n+static int aaeon_mcu_gpio_probe(struct platform_device *pdev)\n+{\n+\tstruct aaeon_mcu_gpio *data;\n+\n+\tdata = devm_kzalloc(&pdev->dev, sizeof(*data), GFP_KERNEL);\n+\tif (!data)\n+\t\treturn -ENOMEM;\n+\n+\tdata->regmap = dev_get_regmap(pdev->dev.parent, NULL);\n+\tif (!data->regmap)\n+\t\treturn -ENODEV;\n+\n+\tdata->gc = aaeon_mcu_chip;\n+\tdata->gc.parent = pdev->dev.parent;\n+\n+\t/*\n+\t * Reset all GPIO states to a known configuration. The MCU does not\n+\t * reset GPIO state on soft reboot, only on power cycle (hard reboot).\n+\t * Without this reset, GPIOs would retain their previous state across\n+\t * reboots, which could lead to unexpected behavior.\n+\t */\n+\taaeon_mcu_gpio_reset(data, &pdev->dev);\n+\n+\treturn devm_gpiochip_add_data(&pdev->dev, &data->gc, data);\n+}\n+\n+static struct platform_driver aaeon_mcu_gpio_driver = {\n+\t.driver = {\n+\t\t.name = \"aaeon-mcu-gpio\",\n+\t},\n+\t.probe = aaeon_mcu_gpio_probe,\n+};\n+module_platform_driver(aaeon_mcu_gpio_driver);\n+\n+MODULE_DESCRIPTION(\"GPIO interface for Aaeon MCU\");\n+MODULE_AUTHOR(\"Jérémie Dautheribes <jeremie.dautheribes@bootlin.com>\");\n+MODULE_LICENSE(\"GPL\");\n", "prefixes": [ "v4", "4/5" ] }