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GET /api/patches/2215567/?format=api
{ "id": 2215567, "url": "http://patchwork.ozlabs.org/api/patches/2215567/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260324191000.1095768-9-mmaddireddy@nvidia.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260324191000.1095768-9-mmaddireddy@nvidia.com>", "list_archive_url": null, "date": "2026-03-24T19:09:59", "name": "[v8,8/9] arm64: tegra: Add aspm-l1-entry-delay-ns to PCIe nodes", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "9268a22eb27bac08f4dba83b7434723574aee338", "submitter": { "id": 72399, "url": "http://patchwork.ozlabs.org/api/people/72399/?format=api", "name": "Manikanta Maddireddy", "email": "mmaddireddy@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260324191000.1095768-9-mmaddireddy@nvidia.com/mbox/", "series": [ { "id": 497333, "url": "http://patchwork.ozlabs.org/api/series/497333/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=497333", "date": "2026-03-24T19:09:51", "name": "Enhancements to pcie-tegra194 driver", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/497333/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215567/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215567/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-50972-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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<lpieralisi@kernel.org>, <kwilczynski@kernel.org>,\n\t<mani@kernel.org>, <robh@kernel.org>, <krzk+dt@kernel.org>,\n\t<conor+dt@kernel.org>, <thierry.reding@gmail.com>, <jonathanh@nvidia.com>,\n\t<kishon@kernel.org>, <arnd@arndb.de>, <gregkh@linuxfoundation.org>,\n\t<Frank.Li@nxp.com>, <den@valinux.co.jp>, <hongxing.zhu@nxp.com>,\n\t<jingoohan1@gmail.com>, <vidyas@nvidia.com>, <cassel@kernel.org>,\n\t<18255117159@163.com>", "CC": "<linux-pci@vger.kernel.org>, <linux-tegra@vger.kernel.org>,\n\t<linux-kernel@vger.kernel.org>, Manikanta Maddireddy <mmaddireddy@nvidia.com>", "Subject": "[PATCH v8 8/9] arm64: tegra: Add aspm-l1-entry-delay-ns to PCIe nodes", "Date": "Wed, 25 Mar 2026 00:39:59 +0530", "Message-ID": "<20260324191000.1095768-9-mmaddireddy@nvidia.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260324191000.1095768-1-mmaddireddy@nvidia.com>", "References": "<20260324191000.1095768-1-mmaddireddy@nvidia.com>", "Precedence": "bulk", "X-Mailing-List": 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"\n\tCIP:216.228.117.160;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:mail.nvidia.com;PTR:dc6edge1.nvidia.com;CAT:NONE;SFS:(13230040)(376014)(7416014)(82310400026)(36860700016)(1800799024)(921020)(18002099003)(22082099003)(56012099003);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\t143gh0O70qk27pG4RTDeZquh7tHBaJ8EV8jrhnvKu8uzhoz4TFTlOB/y+ddoGZeJq9gO3MLFpx/4Eid7E6R9HUlMJFpNJbRFeFKRq5lQTnfq02zJpsy/BeR0Eq/uxqdCmmxJ7Q9dWV3xVyhy55MIz7O4sY1aZAnL+pJHJofAJSb2+ZOiTe23cqaMSw9xKD3RoszdpFVinpObPHrCz3xlUK05ZM4MwbtkmUBGvvS/SInysLhFzN8110/KMyQEYK9ukjhmM5eAcyljHng44r9k5DGAeg86IiC/taC7gzU2MGs8EGnhd1Oy/LnOh+OUR4+dz6rZsDwPkNv5bj6VkITjgURFmTNdTcILFg9u86d1EjKQI5XXT7/XoCZm+QG/xE0eiwmnYOdyKtu4CROINDbJWqOWmbVgLZKQnk6/DGJ1Wm8GmOUeWbQR1YHbx0m1Aqny", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "24 Mar 2026 19:11:34.2771\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 85c5cf6a-4e89-419a-9219-08de89d92a54", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=43083d15-7273-40c1-b7db-39efd9ccc17a;Ip=[216.228.117.160];Helo=[mail.nvidia.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tDS2PEPF00003442.namprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CH0PR12MB8550" }, "content": "Add the aspm-l1-entry-delay-ns device tree property to all PCIe Root Port\nand PCIe Endpoint nodes in tegra194.dtsi and tegra234.dtsi so that ASPM L1\nentrance latency is configured from device tree.\n\n- Tegra194: 4000 ns (4 us) for both Root Port and Endpoint.\n- Tegra234: 8000 ns (8 us) for Root Port, 16000 ns (16 us) for Endpoint.\n\nSigned-off-by: Manikanta Maddireddy <mmaddireddy@nvidia.com>\n---\nV8: New patch\n\n arch/arm64/boot/dts/nvidia/tegra194.dtsi | 9 +++++++++\n arch/arm64/boot/dts/nvidia/tegra234.dtsi | 16 ++++++++++++++++\n 2 files changed, 25 insertions(+)", "diff": "diff --git a/arch/arm64/boot/dts/nvidia/tegra194.dtsi b/arch/arm64/boot/dts/nvidia/tegra194.dtsi\nindex 849694f751d9..1d659454a6f9 100644\n--- a/arch/arm64/boot/dts/nvidia/tegra194.dtsi\n+++ b/arch/arm64/boot/dts/nvidia/tegra194.dtsi\n@@ -2382,6 +2382,7 @@ pcie@14100000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <4000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -2434,6 +2435,7 @@ pcie@14120000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <4000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -2486,6 +2488,7 @@ pcie@14140000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <4000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -2538,6 +2541,7 @@ pcie@14160000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <4000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -2583,6 +2587,7 @@ pcie-ep@14160000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <4000>;\n \n \t\t\tinterconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE4R &emc>,\n \t\t\t\t\t<&mc TEGRA194_MEMORY_CLIENT_PCIE4W &emc>;\n@@ -2629,6 +2634,7 @@ pcie@14180000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <4000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -2674,6 +2680,7 @@ pcie-ep@14180000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <4000>;\n \n \t\t\tinterconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE0R &emc>,\n \t\t\t\t\t<&mc TEGRA194_MEMORY_CLIENT_PCIE0W &emc>;\n@@ -2723,6 +2730,7 @@ pcie@141a0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <4000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -2771,6 +2779,7 @@ pcie-ep@141a0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <4000>;\n \n \t\t\tinterconnects = <&mc TEGRA194_MEMORY_CLIENT_PCIE5R &emc>,\n \t\t\t\t\t<&mc TEGRA194_MEMORY_CLIENT_PCIE5W &emc>;\ndiff --git a/arch/arm64/boot/dts/nvidia/tegra234.dtsi b/arch/arm64/boot/dts/nvidia/tegra234.dtsi\nindex 850c473235e3..850c1a645d71 100644\n--- a/arch/arm64/boot/dts/nvidia/tegra234.dtsi\n+++ b/arch/arm64/boot/dts/nvidia/tegra234.dtsi\n@@ -4532,6 +4532,7 @@ pcie@140a0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -4586,6 +4587,7 @@ pcie@140c0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -4640,6 +4642,7 @@ pcie@140e0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -4686,6 +4689,7 @@ pcie-ep@140e0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <16000>;\n \n \t\t\tinterconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE10AR &emc>,\n \t\t\t\t\t<&mc TEGRA234_MEMORY_CLIENT_PCIE10AW &emc>;\n@@ -4734,6 +4738,7 @@ pcie@14100000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -4788,6 +4793,7 @@ pcie@14120000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -4842,6 +4848,7 @@ pcie@14140000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -4896,6 +4903,7 @@ pcie@14160000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -4937,6 +4945,7 @@ pcie-ep@14160000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <16000>;\n \n \t\t\tinterconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE4R &emc>,\n \t\t\t\t <&mc TEGRA234_MEMORY_CLIENT_PCIE4W &emc>;\n@@ -4983,6 +4992,7 @@ pcie@14180000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -5037,6 +5047,7 @@ pcie@141a0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -5083,6 +5094,7 @@ pcie-ep@141a0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <16000>;\n \n \t\t\tinterconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE5R &emc>,\n \t\t\t\t\t<&mc TEGRA234_MEMORY_CLIENT_PCIE5W &emc>;\n@@ -5131,6 +5143,7 @@ pcie@141c0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -5177,6 +5190,7 @@ pcie-ep@141c0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <16000>;\n \n \t\t\tinterconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE6AR &emc>,\n \t\t\t\t\t<&mc TEGRA234_MEMORY_CLIENT_PCIE6AW &emc>;\n@@ -5225,6 +5239,7 @@ pcie@141e0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <8000>;\n \n \t\t\tbus-range = <0x0 0xff>;\n \n@@ -5271,6 +5286,7 @@ pcie-ep@141e0000 {\n \t\t\tnvidia,aspm-cmrt-us = <60>;\n \t\t\tnvidia,aspm-pwr-on-t-us = <20>;\n \t\t\tnvidia,aspm-l0s-entrance-latency-us = <3>;\n+\t\t\taspm-l1-entry-delay-ns = <16000>;\n \n \t\t\tinterconnects = <&mc TEGRA234_MEMORY_CLIENT_PCIE7AR &emc>,\n \t\t\t\t\t<&mc TEGRA234_MEMORY_CLIENT_PCIE7AW &emc>;\n", "prefixes": [ "v8", "8/9" ] }