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GET /api/patches/2215429/?format=api
{ "id": 2215429, "url": "http://patchwork.ozlabs.org/api/patches/2215429/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260324151323.74473-9-mohamed@unpredictable.fr/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260324151323.74473-9-mohamed@unpredictable.fr>", "list_archive_url": null, "date": "2026-03-24T15:13:19", "name": "[v3,08/12] target/i386: emulate: indirect access to CRs", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "92d8cf7bee593a70824b5abb6df25449f43951dc", "submitter": { "id": 91318, "url": "http://patchwork.ozlabs.org/api/people/91318/?format=api", "name": "Mohamed Mediouni", "email": "mohamed@unpredictable.fr" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260324151323.74473-9-mohamed@unpredictable.fr/mbox/", "series": [ { "id": 497303, "url": "http://patchwork.ozlabs.org/api/series/497303/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497303", "date": "2026-03-24T15:13:13", "name": "whpx: i386: Windows 10 and performance fixes", "version": 3, "mbox": "http://patchwork.ozlabs.org/series/497303/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215429/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215429/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) 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(TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1w53Sz-0005vF-5T\n for qemu-devel@nongnu.org; Tue, 24 Mar 2026 11:14:54 -0400", "from p-east2-cluster2-host6-snip4-10.eps.apple.com ([57.103.78.43]\n helo=outbound.st.icloud.com)\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <mohamed@unpredictable.fr>)\n id 1w53Sq-0005tR-4T\n for qemu-devel@nongnu.org; Tue, 24 Mar 2026 11:14:45 -0400", "from outbound.st.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-east-1a-60-percent-7 (Postfix) with ESMTPS id\n 738A01814D21; Tue, 24 Mar 2026 15:14:34 +0000 (UTC)", "from localhost.localdomain (unknown [17.42.251.67])\n by p00-icloudmta-asmtp-us-east-1a-60-percent-7 (Postfix) with ESMTPSA id\n 32806181645C; Tue, 24 Mar 2026 15:13:51 +0000 (UTC)" ], "Dkim-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1774365277; x=1776957277;\n bh=RaeVoGsUxhg5XOvzFErCPDaCiYTNc+RShNyqxvJnm/M=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:x-icloud-hme;\n b=BL2SvDZ/Rk2Cmksnlte5tWuMSvvi/X5zsyZWm4mvip3eHgeIVgisnp4nsFIfxdF7f/hZjZ5KvQ6Xj/ymPX68O24Qcpj3iRnSbnSHNs1/zdES/W9P4jZUGM4yIr8eiQ9+NYgE0+Y/0XeAk8KxHQTA5WUDJDImSsogm9ioGxSA7BomSSm8+j6ZpZxF3FuInZGpZKeaS1pkxhDhu9oFndHGGp26Aj1vV5kovwzDHjCzvf8uajJdIOgZavrxKvdHq7rKGFgn9Y7AIoiHiSoMqGyBMEGDXYkGqE/mYxW+HfP285nGndJaxrKwUQnF+sUkvJ++XORV7bBL3kNpwUapffNenA==", "mail-alias-created-date": "1752046281608", "From": "Mohamed Mediouni <mohamed@unpredictable.fr>", "To": "qemu-devel@nongnu.org", "Cc": "Roman Bolshakov <rbolshakov@ddn.com>,\n Mohamed Mediouni <mohamed@unpredictable.fr>, Wei Liu <wei.liu@kernel.org>,\n Phil Dennis-Jordan <phil@philjordan.eu>,\n Pedro Barbuda <pbarbuda@microsoft.com>", "Subject": "[PATCH v3 08/12] target/i386: emulate: indirect access to CRs", "Date": "Tue, 24 Mar 2026 16:13:19 +0100", "Message-ID": "<20260324151323.74473-9-mohamed@unpredictable.fr>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20260324151323.74473-1-mohamed@unpredictable.fr>", "References": "<20260324151323.74473-1-mohamed@unpredictable.fr>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMzI0MDExOSBTYWx0ZWRfXwCGnsJidn00d\n KukFB3kU/eZ2l/EFltWFOgy5aIrZZiWgpWn2bdZDumZ6FA8uzpVYUhuW+K7eggwGq4ihF+g3aaZ\n d3pTTw8MMXpKcGW+cmb6HligjS3Mkv5MFiv4PPOds+7WXiYNwCNZ9ar72QIV3lmKEcmkzsn7Iz9\n G6CyS0XP8JwCPjvqEDSBIflo7IFGBt36qgyqnDoU5zbUljsrsTiBXXz6YYquhYd9R6szdJULuWn\n beIj5azqFk8ZcKjF3pd7Y0As0RQmXgVAzYBCqzEQ6nvJKq4CIy2eYKc8C33LPw1CkbH9zUj7kiT\n ImT8FVo7YKImB6QZ4wlSRcMjmImw4UcJ0CgdSHv5uzFZdYYrahhsR1h9bjyjRw=", "X-Authority-Info-Out": "v=2.4 cv=DP+CIiNb c=1 sm=1 tr=0 ts=69c2aa5b\n cx=c_apl:c_pps:t_out a=YrL12D//S6tul8v/L+6tKg==:117\n a=YrL12D//S6tul8v/L+6tKg==:17 a=Yq5XynenixoA:10 a=VkNPw1HP01LnGYTKEx00:22\n a=_XbvW0LUL-N0uKGCadMA:9", "X-Proofpoint-GUID": "ejpNUdLwk7QH21uY3fmDnTGY646Utw7l", "X-Proofpoint-ORIG-GUID": "ejpNUdLwk7QH21uY3fmDnTGY646Utw7l", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1143,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-03-24_03,2026-03-23_02,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=notspam policy=default score=0 mlxscore=0\n phishscore=0 spamscore=0 clxscore=1030 mlxlogscore=924 adultscore=0\n suspectscore=0 lowpriorityscore=0 malwarescore=0 bulkscore=0 classifier=spam\n authscore=0 adjust=0 reason=mlx scancount=1 engine=8.22.0-2601150000\n definitions=main-2603240119", "Received-SPF": "pass client-ip=57.103.78.43;\n envelope-from=mohamed@unpredictable.fr; helo=outbound.st.icloud.com", "X-Spam_score_int": "-27", "X-Spam_score": "-2.8", "X-Spam_bar": "--", "X-Spam_report": "(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_MSPIKE_H2=0.001,\n RCVD_IN_VALIDITY_CERTIFIED_BLOCKED=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Prepare to have on-demand fetch of registers from the backend during\nfaults.\n\nFor x86_64 macOS, copy the function there too.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n---\n target/i386/emulate/x86_emu.h | 3 +++\n target/i386/emulate/x86_helpers.c | 27 ++++++++++++++++-----------\n target/i386/emulate/x86_mmu.c | 8 ++------\n target/i386/hvf/x86.c | 11 +++++++++++\n 4 files changed, 32 insertions(+), 17 deletions(-)", "diff": "diff --git a/target/i386/emulate/x86_emu.h b/target/i386/emulate/x86_emu.h\nindex 4ed970bd53..a8d4c93098 100644\n--- a/target/i386/emulate/x86_emu.h\n+++ b/target/i386/emulate/x86_emu.h\n@@ -28,6 +28,7 @@ struct x86_emul_ops {\n MMUTranslateResult (*mmu_gva_to_gpa) (CPUState *cpu, target_ulong gva, uint64_t *gpa, MMUTranslateFlags flags);\n void (*read_segment_descriptor)(CPUState *cpu, struct x86_segment_descriptor *desc,\n enum X86Seg seg);\n+ target_ulong (*read_cr) (CPUState *cpu, int cr);\n void (*handle_io)(CPUState *cpu, uint16_t port, void *data, int direction,\n int size, int count);\n void (*simulate_rdmsr)(CPUState *cs);\n@@ -45,6 +46,8 @@ void x86_emul_raise_exception(CPUX86State *env, int exception_index, int error_c\n \n target_ulong read_reg(CPUX86State *env, int reg, int size);\n void write_reg(CPUX86State *env, int reg, target_ulong val, int size);\n+target_ulong x86_read_cr(CPUState *cpu, int cr);\n+\n target_ulong read_val_from_reg(void *reg_ptr, int size);\n void write_val_to_reg(void *reg_ptr, target_ulong val, int size);\n bool write_val_ext(CPUX86State *env, struct x86_decode_op *decode, target_ulong val, int size);\ndiff --git a/target/i386/emulate/x86_helpers.c b/target/i386/emulate/x86_helpers.c\nindex ebbf40f2b0..c817015ef9 100644\n--- a/target/i386/emulate/x86_helpers.c\n+++ b/target/i386/emulate/x86_helpers.c\n@@ -206,15 +206,26 @@ bool x86_read_call_gate(CPUState *cpu, struct x86_call_gate *idt_desc,\n return true;\n }\n \n-bool x86_is_protected(CPUState *cpu)\n+target_ulong x86_read_cr(CPUState *cpu, int cr)\n {\n X86CPU *x86_cpu = X86_CPU(cpu);\n CPUX86State *env = &x86_cpu->env;\n- uint64_t cr0 = env->cr[0];\n+\n+ if (emul_ops->read_cr) {\n+ return emul_ops->read_cr(cpu, cr);\n+ }\n+ return env->cr[cr];\n+}\n+\n+bool x86_is_protected(CPUState *cpu)\n+{\n+ uint64_t cr0;\n+\n if (emul_ops->is_protected_mode) {\n return emul_ops->is_protected_mode(cpu);\n }\n \n+ cr0 = x86_read_cr(cpu, 0);\n return cr0 & CR0_PE_MASK;\n }\n \n@@ -245,9 +256,7 @@ bool x86_is_long_mode(CPUState *cpu)\n \n bool x86_is_la57(CPUState *cpu)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n- uint64_t is_la57 = env->cr[4] & CR4_LA57_MASK;\n+ uint64_t is_la57 = x86_read_cr(cpu, 4) & CR4_LA57_MASK;\n return is_la57;\n }\n \n@@ -259,18 +268,14 @@ bool x86_is_long64_mode(CPUState *cpu)\n \n bool x86_is_paging_mode(CPUState *cpu)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n- uint64_t cr0 = env->cr[0];\n+ uint64_t cr0 = x86_read_cr(cpu, 0);\n \n return cr0 & CR0_PG_MASK;\n }\n \n bool x86_is_pae_enabled(CPUState *cpu)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n- uint64_t cr4 = env->cr[4];\n+ uint64_t cr4 = x86_read_cr(cpu, 4);\n \n return cr4 & CR4_PAE_MASK;\n }\ndiff --git a/target/i386/emulate/x86_mmu.c b/target/i386/emulate/x86_mmu.c\nindex 670939acdb..ba0ebe4268 100644\n--- a/target/i386/emulate/x86_mmu.c\n+++ b/target/i386/emulate/x86_mmu.c\n@@ -114,8 +114,6 @@ static bool get_pt_entry(CPUState *cpu, struct gpt_translation *pt,\n static MMUTranslateResult test_pt_entry(CPUState *cpu, struct gpt_translation *pt,\n int level, int *largeness, bool pae, MMUTranslateFlags flags)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n uint64_t pte = pt->pte[level];\n \n if (!pte_present(pte)) {\n@@ -130,7 +128,7 @@ static MMUTranslateResult test_pt_entry(CPUState *cpu, struct gpt_translation *p\n *largeness = level;\n }\n \n- uint32_t cr0 = env->cr[0];\n+ uint32_t cr0 = x86_read_cr(cpu, 0);\n /* check protection */\n if (cr0 & CR0_WP_MASK) {\n if (mmu_validate_write(flags) && !pte_write_access(pte)) {\n@@ -184,11 +182,9 @@ static inline uint64_t large_page_gpa(struct gpt_translation *pt, bool pae,\n static MMUTranslateResult walk_gpt(CPUState *cpu, target_ulong addr, MMUTranslateFlags flags,\n struct gpt_translation *pt, bool pae)\n {\n- X86CPU *x86_cpu = X86_CPU(cpu);\n- CPUX86State *env = &x86_cpu->env;\n int top_level, level;\n int largeness = 0;\n- target_ulong cr3 = env->cr[3];\n+ target_ulong cr3 = x86_read_cr(cpu, 3);\n uint64_t page_mask = pae ? PAE_PTE_PAGE_MASK : LEGACY_PTE_PAGE_MASK;\n MMUTranslateResult res;\n \ndiff --git a/target/i386/hvf/x86.c b/target/i386/hvf/x86.c\nindex 7fe710aca3..bae2f30fa2 100644\n--- a/target/i386/hvf/x86.c\n+++ b/target/i386/hvf/x86.c\n@@ -143,6 +143,17 @@ bool x86_is_la57(CPUState *cpu)\n return false;\n }\n \n+target_ulong x86_read_cr(CPUState *cpu, int cr)\n+{\n+ X86CPU *x86_cpu = X86_CPU(cpu);\n+ CPUX86State *env = &x86_cpu->env;\n+\n+ if (emul_ops->read_cr) {\n+ return emul_ops->read_cr(cpu, cr);\n+ }\n+ return env->cr[cr];\n+}\n+\n bool x86_is_long64_mode(CPUState *cpu)\n {\n struct vmx_segment desc;\n", "prefixes": [ "v3", "08/12" ] }