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GET /api/patches/2215416/?format=api
{ "id": 2215416, "url": "http://patchwork.ozlabs.org/api/patches/2215416/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260324151111.237411-5-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260324151111.237411-5-peter.maydell@linaro.org>", "list_archive_url": null, "date": "2026-03-24T15:11:04", "name": "[PULL,04/11] hw/arm/smmuv3-accel: Check ATS compatibility between host and guest", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "438603897b094ca3bb30ca554fd635a06a3946a2", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260324151111.237411-5-peter.maydell@linaro.org/mbox/", "series": [ { "id": 497302, "url": "http://patchwork.ozlabs.org/api/series/497302/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=497302", "date": "2026-03-24T15:11:00", "name": "[PULL,01/11] target/arm: fix s2prot not set for two-stage PMSA translations", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/497302/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2215416/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2215416/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=neJ27DWV;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fgD6q4Mr2z1y1G\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 25 Mar 2026 02:12:35 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1w53Pk-0000k4-36; Tue, 24 Mar 2026 11:11:28 -0400", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1w53Pe-0000ff-Sq\n for qemu-devel@nongnu.org; Tue, 24 Mar 2026 11:11:23 -0400", "from mail-wr1-x433.google.com ([2a00:1450:4864:20::433])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1w53Pc-0005CV-R3\n for qemu-devel@nongnu.org; Tue, 24 Mar 2026 11:11:22 -0400", "by mail-wr1-x433.google.com with SMTP id\n ffacd0b85a97d-43b3d9d0695so5025437f8f.0\n for <qemu-devel@nongnu.org>; Tue, 24 Mar 2026 08:11:20 -0700 (PDT)", "from lanath.. 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helo=mail-wr1-x433.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Nathan Chen <nathanc@nvidia.com>\n\nCompare the host SMMUv3 ATS support bit with the guest SMMUv3 ATS support\nbit in IDR0 and fail the compatibility check if ATS support is opted as\nenabled on the guest SMMUv3 when it is not supported on host SMMUv3.\n\nFixes: f7f5013a55a3 (\"hw/arm/smmuv3-accel: Add support for ATS\")\nReviewed-by: Eric Auger <eric.auger@redhat.com>\nTested-by: Eric Auger <eric.auger@redhat.com>\nReviewed-by: Shameer Kolothum <skolothumtho@nvidia.com>\nTested-by: Shameer Kolothum <skolothumtho@nvidia.com>\nSigned-off-by: Nathan Chen <nathanc@nvidia.com>\nMessage-id: 20260323182454.1416110-2-nathanc@nvidia.com\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n hw/arm/smmuv3-accel.c | 6 ++++++\n 1 file changed, 6 insertions(+)", "diff": "diff --git a/hw/arm/smmuv3-accel.c b/hw/arm/smmuv3-accel.c\nindex 17306cd04b..2bb142c47f 100644\n--- a/hw/arm/smmuv3-accel.c\n+++ b/hw/arm/smmuv3-accel.c\n@@ -101,6 +101,12 @@ smmuv3_accel_check_hw_compatible(SMMUv3State *s,\n smmuv3_oas_bits(FIELD_EX32(s->idr[5], IDR5, OAS)));\n return false;\n }\n+ /* Check ATS value opted is compatible with Host SMMUv3 */\n+ if (FIELD_EX32(info->idr[0], IDR0, ATS) <\n+ FIELD_EX32(s->idr[0], IDR0, ATS)) {\n+ error_setg(errp, \"Host SMMUv3 doesn't support Address Translation Services\");\n+ return false;\n+ }\n \n /* QEMU SMMUv3 supports GRAN4K/GRAN16K/GRAN64K translation granules */\n if (FIELD_EX32(info->idr[5], IDR5, GRAN4K) !=\n", "prefixes": [ "PULL", "04/11" ] }