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GET /api/patches/2213455/?format=api
{ "id": 2213455, "url": "http://patchwork.ozlabs.org/api/patches/2213455/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260319205256.998876-1-poros@redhat.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260319205256.998876-1-poros@redhat.com>", "list_archive_url": null, "date": "2026-03-19T20:52:56", "name": "[iwl-net,v4] ice: fix missing dpll notifications for SW pins", "commit_ref": null, "pull_url": null, "state": "under-review", "archived": false, "hash": "03e8caf3df702558dcec87998dc3091ea6d63e4a", "submitter": { "id": 74657, "url": "http://patchwork.ozlabs.org/api/people/74657/?format=api", "name": "Petr Oros", "email": "poros@redhat.com" }, "delegate": { "id": 109701, "url": "http://patchwork.ozlabs.org/api/users/109701/?format=api", "username": "anguy11", "first_name": "Anthony", "last_name": "Nguyen", "email": "anthony.l.nguyen@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260319205256.998876-1-poros@redhat.com/mbox/", "series": [ { "id": 496712, "url": "http://patchwork.ozlabs.org/api/series/496712/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=496712", "date": "2026-03-19T20:52:56", "name": "[iwl-net,v4] ice: fix missing dpll notifications for SW pins", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/496712/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2213455/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2213455/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=8++BtRde;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=2605:bc80:3010::136; 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client-ip=170.10.129.124;\n helo=us-smtp-delivery-124.mimecast.com; envelope-from=poros@redhat.com;\n receiver=<UNKNOWN>", "DMARC-Filter": "OpenDMARC Filter v1.4.2 smtp2.osuosl.org 2AB1340DD6", "X-MC-Unique": "pHpjlvk4OxSbyGwG68z_pg-1", "X-Mimecast-MFC-AGG-ID": "pHpjlvk4OxSbyGwG68z_pg_1773953583", "From": "Petr Oros <poros@redhat.com>", "To": "netdev@vger.kernel.org", "Date": "Thu, 19 Mar 2026 21:52:56 +0100", "Message-ID": "<20260319205256.998876-1-poros@redhat.com>", "MIME-Version": "1.0", "X-Scanned-By": "MIMEDefang 3.0 on 10.30.177.12", "X-Mimecast-MFC-PROC-ID": "wDvrKEHo9fGRhOskXgxiWYactdY45BqlF0Kcezpj3Os_1773953583", "X-Mimecast-Originator": "redhat.com", "Content-Transfer-Encoding": "8bit", "content-type": "text/plain; charset=\"US-ASCII\"; x-default=true", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=redhat.com;\n s=mimecast20190719; t=1773953591;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding;\n bh=pDuNk1maIwkM81h0xNfMndhfHmB77PaC4WV88nssjB0=;\n b=DOASXJJ9cJ9omM/nK13X1VpIsSp+mB0UMxHOwu0uREqwEduuaoIvRAn9xF+pEZl6PnLeFO\n 1cjeKFEToZ4cuJBa+rb5qT0dcWrtzfoqb1zyyiEgc2Ax3kygwEQObsVTabYEN3JsYfH9m4\n OWQcZU6+SS4b9oh8mAb0KyVzkrNtvvw=", "X-Mailman-Original-Authentication-Results": [ "smtp2.osuosl.org;\n dmarc=pass (p=quarantine dis=none)\n header.from=redhat.com", "smtp2.osuosl.org;\n dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com\n header.a=rsa-sha256 header.s=mimecast20190719 header.b=DOASXJJ9" ], "Subject": "[Intel-wired-lan] [PATCH iwl-net v4] ice: fix missing dpll\n notifications for SW pins", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "ivecera@redhat.com, Przemek Kitszel <przemyslaw.kitszel@intel.com>,\n Eric Dumazet <edumazet@google.com>,\n Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,\n Andrew Lunn <andrew+netdev@lunn.ch>,\n Tony Nguyen <anthony.l.nguyen@intel.com>,\n Simon Horman <horms@kernel.org>, intel-wired-lan@lists.osuosl.org,\n Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,\n \"David S. Miller\" <davem@davemloft.net>, linux-kernel@vger.kernel.org", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "The SMA/U.FL pin redesign (commit 2dd5d03c77e2 (\"ice: redesign dpll\nsma/u.fl pins control\")) introduced software-controlled pins that wrap\nbacking CGU input/output pins, but never updated the notification and\ndata paths to propagate pin events to these SW wrappers.\n\nThere are three problems:\n\n1) ice_dpll_notify_changes() sends dpll_pin_change_ntf() only for the\n direct CGU input pin stored in d->active_input. When the active\n input changes, SW pins (SMA/U.FL) that wrap the old or new active\n input never receive a change notification. As a result, userspace\n consumers such as synce4l that monitor SMA pins via dpll netlink\n never learn when the pin state transitions (e.g. from SELECTABLE to\n CONNECTED).\n\n2) ice_dpll_phase_offset_get() returns p->phase_offset for non-active\n SW pins, but this field is never updated for SW pins. The PPS phase\n offset monitor updates the backing CGU input's phase_offset\n (p->input->phase_offset), not the SW pin's own field. As a result\n non-active SW pins always report zero phase offset even when the\n backing CGU input has valid PPS measurements.\n\n3) ice_dpll_pins_notify_mask() does not propagate phase offset change\n notifications to SW pins either. When a HW CGU pin gets a phase\n offset change notification, the SMA/U.FL pin wrapping it is never\n notified, so userspace consumers (ts2phc, synce4l) monitoring SW\n pins via dpll netlink never receive phase offset updates.\n\nFix all three by:\n\n - In ice_dpll_phase_offset_get(), return the backing CGU input's\n phase_offset for input-direction SW pins instead of the SW pin's own\n (always zero) field.\n\n - Introduce ice_dpll_pin_ntf(), a thin wrapper around\n dpll_pin_change_ntf() that also sends notifications to any\n registered SMA/U.FL pin whose backing CGU input matches. Replace\n all direct dpll_pin_change_ntf() calls in the periodic notification\n paths with ice_dpll_pin_ntf(), so SW pins are automatically notified\n whenever their backing HW pin is.\n\nFixes: 2dd5d03c77e2 (\"ice: redesign dpll sma/u.fl pins control\")\nSigned-off-by: Petr Oros <poros@redhat.com>\n---\nv4:\n - expanded scope to also fix phase offset reporting and phase offset\n notifications for SW pins (problems 2 and 3 above)\n - replaced ice_dpll_sw_pin_needs_notify() with ice_dpll_pin_ntf(),\n a unified wrapper that covers all notification paths\n - squashed into a single patch\nv3: https://lore.kernel.org/all/20260220140700.2910174-1-poros@redhat.com/\n - added kdoc for ice_dpll_sw_pin_needs_notify() helper\nv2: https://lore.kernel.org/all/20260219131500.2271897-1-poros@redhat.com/\n - extracted ice_dpll_sw_pin_needs_notify() helper for readability\n - moved loop variable into for() scope\nv1: https://lore.kernel.org/all/20260218211414.1411163-1-poros@redhat.com/\n---\n drivers/net/ethernet/intel/ice/ice_dpll.c | 47 +++++++++++++++++------\n 1 file changed, 36 insertions(+), 11 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c\nindex 62f75701d65205..5cfa19da099bfc 100644\n--- a/drivers/net/ethernet/intel/ice/ice_dpll.c\n+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c\n@@ -1915,7 +1915,10 @@ ice_dpll_phase_offset_get(const struct dpll_pin *pin, void *pin_priv,\n \t\t\t\t d->active_input == p->input->pin))\n \t\t*phase_offset = d->phase_offset * ICE_DPLL_PHASE_OFFSET_FACTOR;\n \telse if (d->phase_offset_monitor_period)\n-\t\t*phase_offset = p->phase_offset * ICE_DPLL_PHASE_OFFSET_FACTOR;\n+\t\t*phase_offset = (p->input &&\n+\t\t\t\t p->direction == DPLL_PIN_DIRECTION_INPUT ?\n+\t\t\t\t p->input->phase_offset :\n+\t\t\t\t p->phase_offset) * ICE_DPLL_PHASE_OFFSET_FACTOR;\n \telse\n \t\t*phase_offset = 0;\n \tmutex_unlock(&pf->dplls.lock);\n@@ -2609,6 +2612,27 @@ static u64 ice_generate_clock_id(struct ice_pf *pf)\n \treturn pci_get_dsn(pf->pdev);\n }\n \n+/**\n+ * ice_dpll_pin_ntf - notify pin change including any SW pin wrappers\n+ * @dplls: pointer to dplls struct\n+ * @pin: the dpll_pin that changed\n+ *\n+ * Send a change notification for @pin and for any registered SMA/U.FL pin\n+ * whose backing CGU input matches @pin.\n+ */\n+static void ice_dpll_pin_ntf(struct ice_dplls *dplls, struct dpll_pin *pin)\n+{\n+\tdpll_pin_change_ntf(pin);\n+\tfor (int i = 0; i < ICE_DPLL_PIN_SW_NUM; i++) {\n+\t\tif (dplls->sma[i].pin && dplls->sma[i].input &&\n+\t\t dplls->sma[i].input->pin == pin)\n+\t\t\tdpll_pin_change_ntf(dplls->sma[i].pin);\n+\t\tif (dplls->ufl[i].pin && dplls->ufl[i].input &&\n+\t\t dplls->ufl[i].input->pin == pin)\n+\t\t\tdpll_pin_change_ntf(dplls->ufl[i].pin);\n+\t}\n+}\n+\n /**\n * ice_dpll_notify_changes - notify dpll subsystem about changes\n * @d: pointer do dpll\n@@ -2617,6 +2641,7 @@ static u64 ice_generate_clock_id(struct ice_pf *pf)\n */\n static void ice_dpll_notify_changes(struct ice_dpll *d)\n {\n+\tstruct ice_dplls *dplls = &d->pf->dplls;\n \tbool pin_notified = false;\n \n \tif (d->prev_dpll_state != d->dpll_state) {\n@@ -2625,17 +2650,17 @@ static void ice_dpll_notify_changes(struct ice_dpll *d)\n \t}\n \tif (d->prev_input != d->active_input) {\n \t\tif (d->prev_input)\n-\t\t\tdpll_pin_change_ntf(d->prev_input);\n+\t\t\tice_dpll_pin_ntf(dplls, d->prev_input);\n \t\td->prev_input = d->active_input;\n \t\tif (d->active_input) {\n-\t\t\tdpll_pin_change_ntf(d->active_input);\n+\t\t\tice_dpll_pin_ntf(dplls, d->active_input);\n \t\t\tpin_notified = true;\n \t\t}\n \t}\n \tif (d->prev_phase_offset != d->phase_offset) {\n \t\td->prev_phase_offset = d->phase_offset;\n \t\tif (!pin_notified && d->active_input)\n-\t\t\tdpll_pin_change_ntf(d->active_input);\n+\t\t\tice_dpll_pin_ntf(dplls, d->active_input);\n \t}\n }\n \n@@ -2664,6 +2689,7 @@ static bool ice_dpll_is_pps_phase_monitor(struct ice_pf *pf)\n \n /**\n * ice_dpll_pins_notify_mask - notify dpll subsystem about bulk pin changes\n+ * @dplls: pointer to dplls struct\n * @pins: array of ice_dpll_pin pointers registered within dpll subsystem\n * @pin_num: number of pins\n * @phase_offset_ntf_mask: bitmask of pin indexes to notify\n@@ -2673,15 +2699,14 @@ static bool ice_dpll_is_pps_phase_monitor(struct ice_pf *pf)\n *\n * Context: Must be called while pf->dplls.lock is released.\n */\n-static void ice_dpll_pins_notify_mask(struct ice_dpll_pin *pins,\n+static void ice_dpll_pins_notify_mask(struct ice_dplls *dplls,\n+\t\t\t\t struct ice_dpll_pin *pins,\n \t\t\t\t u8 pin_num,\n \t\t\t\t u32 phase_offset_ntf_mask)\n {\n-\tint i = 0;\n-\n-\tfor (i = 0; i < pin_num; i++)\n-\t\tif (phase_offset_ntf_mask & (1 << i))\n-\t\t\tdpll_pin_change_ntf(pins[i].pin);\n+\tfor (int i = 0; i < pin_num; i++)\n+\t\tif (phase_offset_ntf_mask & BIT(i))\n+\t\t\tice_dpll_pin_ntf(dplls, pins[i].pin);\n }\n \n /**\n@@ -2857,7 +2882,7 @@ static void ice_dpll_periodic_work(struct kthread_work *work)\n \tice_dpll_notify_changes(de);\n \tice_dpll_notify_changes(dp);\n \tif (phase_offset_ntf)\n-\t\tice_dpll_pins_notify_mask(d->inputs, d->num_inputs,\n+\t\tice_dpll_pins_notify_mask(d, d->inputs, d->num_inputs,\n \t\t\t\t\t phase_offset_ntf);\n \n resched:\n", "prefixes": [ "iwl-net", "v4" ] }