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GET /api/patches/2202596/?format=api
{ "id": 2202596, "url": "http://patchwork.ozlabs.org/api/patches/2202596/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260227203944.746471-7-chad@jablonski.xyz/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260227203944.746471-7-chad@jablonski.xyz>", "list_archive_url": null, "date": "2026-02-27T20:39:32", "name": "[v9,06/18] ati-vga: Add scissor clipping register support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3d39f0a8303d6a40b304354cc1e5de6abccce086", "submitter": { "id": 91805, "url": "http://patchwork.ozlabs.org/api/people/91805/?format=api", "name": "Chad Jablonski", "email": "chad@jablonski.xyz" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260227203944.746471-7-chad@jablonski.xyz/mbox/", "series": [ { "id": 493814, "url": "http://patchwork.ozlabs.org/api/series/493814/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=493814", "date": "2026-02-27T20:39:27", "name": "ati-vga: Implement HOST_DATA transfers to enable X.org text rendering", "version": 9, "mbox": "http://patchwork.ozlabs.org/series/493814/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2202596/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2202596/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=jablonski.xyz header.i=@jablonski.xyz\n header.a=rsa-sha256 header.s=fm2 header.b=CeV/gHxu;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=messagingengine.com header.i=@messagingengine.com\n header.a=rsa-sha256 header.s=fm3 header.b=lrW2RDvh;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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These registers are also updated\nwhen the src and/or dst clipping fields on DP_GUI_MASTER_CNTL are set\nto default clipping.\n\nScissor clipping is used when rendering text in X.org. The r128 driver\nsends host data much wider than is necessary to draw a glyph and cuts it\ndown to size using clipping before rendering. The actual clipping\nimplementation follows in a future patch.\n\nThis also includes a very minor refactor of the combined\ndefault_sc_bottom_right field in the registers struct to\ndefault_sc_bottom and default_sc_right. This was done to\nstay consistent with the other scissor registers and prevent repeated\nmasking and extraction.\n\nSigned-off-by: Chad Jablonski <chad@jablonski.xyz>\nReviewed-by: BALATON Zoltan <balaton@eik.bme.hu>\n\n---\n\nv5: Removed unused default_sc_bottom_right field\n---\n hw/display/ati.c | 70 +++++++++++++++++++++++++++++++++++++++++--\n hw/display/ati_int.h | 9 +++++-\n hw/display/ati_regs.h | 2 ++\n 3 files changed, 78 insertions(+), 3 deletions(-)", "diff": "diff --git a/hw/display/ati.c b/hw/display/ati.c\nindex 26fc74b19b..6cf243bcf9 100644\n--- a/hw/display/ati.c\n+++ b/hw/display/ati.c\n@@ -514,7 +514,32 @@ static uint64_t ati_mm_read(void *opaque, hwaddr addr, unsigned int size)\n val |= s->regs.default_tile << 16;\n break;\n case DEFAULT_SC_BOTTOM_RIGHT:\n- val = s->regs.default_sc_bottom_right;\n+ val = (s->regs.default_sc_bottom << 16) |\n+ s->regs.default_sc_right;\n+ break;\n+ case SC_TOP:\n+ val = s->regs.sc_top;\n+ break;\n+ case SC_LEFT:\n+ val = s->regs.sc_left;\n+ break;\n+ case SC_BOTTOM:\n+ val = s->regs.sc_bottom;\n+ break;\n+ case SC_RIGHT:\n+ val = s->regs.sc_right;\n+ break;\n+ case SRC_SC_BOTTOM:\n+ val = s->regs.src_sc_bottom;\n+ break;\n+ case SRC_SC_RIGHT:\n+ val = s->regs.src_sc_right;\n+ break;\n+ case SC_TOP_LEFT:\n+ case SC_BOTTOM_RIGHT:\n+ case SRC_SC_BOTTOM_RIGHT:\n+ qemu_log_mask(LOG_GUEST_ERROR,\n+ \"Read from write-only register 0x%x\\n\", (unsigned)addr);\n break;\n default:\n break;\n@@ -877,6 +902,16 @@ static void ati_mm_write(void *opaque, hwaddr addr,\n s->regs.dst_offset = s->regs.default_offset;\n s->regs.dst_pitch = s->regs.default_pitch;\n }\n+ if (!(data & GMC_SRC_CLIPPING)) {\n+ s->regs.src_sc_right = s->regs.default_sc_right;\n+ s->regs.src_sc_bottom = s->regs.default_sc_bottom;\n+ }\n+ if (!(data & GMC_DST_CLIPPING)) {\n+ s->regs.sc_top = 0;\n+ s->regs.sc_left = 0;\n+ s->regs.sc_right = s->regs.default_sc_right;\n+ s->regs.sc_bottom = s->regs.default_sc_bottom;\n+ }\n break;\n case DST_WIDTH_X:\n s->regs.dst_x = data & 0x3fff;\n@@ -956,7 +991,38 @@ static void ati_mm_write(void *opaque, hwaddr addr,\n }\n break;\n case DEFAULT_SC_BOTTOM_RIGHT:\n- s->regs.default_sc_bottom_right = data & 0x3fff3fff;\n+ s->regs.default_sc_right = data & 0x3fff;\n+ s->regs.default_sc_bottom = (data >> 16) & 0x3fff;\n+ break;\n+ case SC_TOP_LEFT:\n+ s->regs.sc_left = data & 0x3fff;\n+ s->regs.sc_top = (data >> 16) & 0x3fff;\n+ break;\n+ case SC_LEFT:\n+ s->regs.sc_left = data & 0x3fff;\n+ break;\n+ case SC_TOP:\n+ s->regs.sc_top = data & 0x3fff;\n+ break;\n+ case SC_BOTTOM_RIGHT:\n+ s->regs.sc_right = data & 0x3fff;\n+ s->regs.sc_bottom = (data >> 16) & 0x3fff;\n+ break;\n+ case SC_RIGHT:\n+ s->regs.sc_right = data & 0x3fff;\n+ break;\n+ case SC_BOTTOM:\n+ s->regs.sc_bottom = data & 0x3fff;\n+ break;\n+ case SRC_SC_BOTTOM_RIGHT:\n+ s->regs.src_sc_right = data & 0x3fff;\n+ s->regs.src_sc_bottom = (data >> 16) & 0x3fff;\n+ break;\n+ case SRC_SC_RIGHT:\n+ s->regs.src_sc_right = data & 0x3fff;\n+ break;\n+ case SRC_SC_BOTTOM:\n+ s->regs.src_sc_bottom = data & 0x3fff;\n break;\n default:\n break;\ndiff --git a/hw/display/ati_int.h b/hw/display/ati_int.h\nindex 708cc1dd3a..98f57ca5fa 100644\n--- a/hw/display/ati_int.h\n+++ b/hw/display/ati_int.h\n@@ -78,14 +78,21 @@ typedef struct ATIVGARegs {\n uint32_t dp_brush_frgd_clr;\n uint32_t dp_src_frgd_clr;\n uint32_t dp_src_bkgd_clr;\n+ uint16_t sc_top;\n+ uint16_t sc_left;\n+ uint16_t sc_bottom;\n+ uint16_t sc_right;\n+ uint16_t src_sc_bottom;\n+ uint16_t src_sc_right;\n uint32_t dp_cntl;\n uint32_t dp_datatype;\n uint32_t dp_mix;\n uint32_t dp_write_mask;\n uint32_t default_offset;\n uint32_t default_pitch;\n+ uint16_t default_sc_bottom;\n+ uint16_t default_sc_right;\n uint32_t default_tile;\n- uint32_t default_sc_bottom_right;\n } ATIVGARegs;\n \n struct ATIVGAState {\ndiff --git a/hw/display/ati_regs.h b/hw/display/ati_regs.h\nindex 0a0825db04..3999edb9b7 100644\n--- a/hw/display/ati_regs.h\n+++ b/hw/display/ati_regs.h\n@@ -397,6 +397,8 @@\n #define GMC_DST_PITCH_OFFSET_CNTL 0x00000002\n #define GMC_SRC_CLIP_DEFAULT 0x00000000\n #define GMC_DST_CLIP_DEFAULT 0x00000000\n+#define GMC_SRC_CLIPPING 0x00000004\n+#define GMC_DST_CLIPPING 0x00000008\n #define GMC_BRUSH_SOLIDCOLOR 0x000000d0\n #define GMC_SRC_DSTCOLOR 0x00003000\n #define GMC_BYTE_ORDER_MSB_TO_LSB 0x00000000\n", "prefixes": [ "v9", "06/18" ] }