get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/2197404/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2197404,
    "url": "http://patchwork.ozlabs.org/api/patches/2197404/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260217212707.2450423-16-cassel@kernel.org/",
    "project": {
        "id": 28,
        "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api",
        "name": "Linux PCI development",
        "link_name": "linux-pci",
        "list_id": "linux-pci.vger.kernel.org",
        "list_email": "linux-pci@vger.kernel.org",
        "web_url": null,
        "scm_url": null,
        "webscm_url": null,
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260217212707.2450423-16-cassel@kernel.org>",
    "list_archive_url": null,
    "date": "2026-02-17T21:27:11",
    "name": "[5/9] PCI: dwc: Replace BAR_RESERVED with BAR_DISABLED in glue drivers",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "e9489be7a16338630b56a3b240936916cd0dffa0",
    "submitter": {
        "id": 87751,
        "url": "http://patchwork.ozlabs.org/api/people/87751/?format=api",
        "name": "Niklas Cassel",
        "email": "cassel@kernel.org"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260217212707.2450423-16-cassel@kernel.org/mbox/",
    "series": [
        {
            "id": 492482,
            "url": "http://patchwork.ozlabs.org/api/series/492482/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=492482",
            "date": "2026-02-17T21:27:06",
            "name": "PCI: endpoint differentiate between disabled and reserved BARs",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/492482/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2197404/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2197404/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "\n <linux-pci+bounces-47512-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-pci@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=kernel.org header.i=@kernel.org header.a=rsa-sha256\n header.s=k20201202 header.b=dFAPruJ7;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-pci+bounces-47512-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=\"dFAPruJ7\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=10.30.226.201"
        ],
        "Received": [
            "from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fFt6r4pB3z1xpl\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 18 Feb 2026 08:28:36 +1100 (AEDT)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id 7E37C3025924\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 17 Feb 2026 21:28:02 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 7DD8C2DC357;\n\tTue, 17 Feb 2026 21:28:01 +0000 (UTC)",
            "from smtp.kernel.org (aws-us-west-2-korg-mail-1.web.codeaurora.org\n [10.30.226.201])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 579AD28C006;\n\tTue, 17 Feb 2026 21:28:01 +0000 (UTC)",
            "by smtp.kernel.org (Postfix) with ESMTPSA id B5605C4CEF7;\n\tTue, 17 Feb 2026 21:27:55 +0000 (UTC)"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1771363681; cv=none;\n b=T5OTc2QQUvx82HrBTBtFg1bOCp1SWaCW9GwSKj0/tzVEENpX915Ndrz9WkBHgkKLnNB/H6q6XnHikZZSlo2J1kf8Z4gJTWIvwoS/PT4H8P2Rae+YCm/ZJK88AmHPa5gnvE7pfwxTyhPoguvsADOJKTZ8h6cRb4tGy1ll8NC+cU8=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1771363681; c=relaxed/simple;\n\tbh=DLNJ6thciQ1FKfVLXLBIkij44la3XwigLb80Cl2oDMM=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=YnQGVYxfRs849f8qhJbX1ffv+CAUJlND1hhLu3rlrOlFaF+oQSz0ZiazbEh7uafAbIzEN2hU/xGd2B2Dylh2t6Wzk5w1Y6ZBk3rSsdcRWIwf95xEu2Z53E96iAGJaBNQZ6DHlwU0BH2x14UUGhspQbENuIxEq8kXgjafmqlHI8I=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dkim=pass (2048-bit key) header.d=kernel.org header.i=@kernel.org\n header.b=dFAPruJ7; arc=none smtp.client-ip=10.30.226.201",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple; d=kernel.org;\n\ts=k20201202; t=1771363681;\n\tbh=DLNJ6thciQ1FKfVLXLBIkij44la3XwigLb80Cl2oDMM=;\n\th=From:To:Cc:Subject:Date:In-Reply-To:References:From;\n\tb=dFAPruJ7oNmB/6OQ2buMqtV2VMS9EVMtiTfMkhszpe1fAfZXUoCT9eLz0e2a4qtd2\n\t SmaahcBBn74i2BHuv+RpTlb4Okud8413t0Y1CfJ6g+CUNG7nO1bawQekMUSdSLlAhP\n\t BNIZxANMEfkRq+OidscQlDaHXTsGqlN1IjKa0YoePQElNH8pPYRyy1UPID+ud1FC/8\n\t 9iCHg/2yCGtzLvGDj9RIIAPrZSyHGDw38gAHXMOdd5dsn94JyfO9/LPfr7OeJ+XxMD\n\t zTWEt/iw0XvgHJvDC/xi8AE41mPAv5F6USPv04JG6Z6mgLAwzCd2IKkOYPGJ6t/VVU\n\t YOOUSmCHFLLpg==",
        "From": "Niklas Cassel <cassel@kernel.org>",
        "To": "Richard Zhu <hongxing.zhu@nxp.com>, Lucas Stach <l.stach@pengutronix.de>,\n Lorenzo Pieralisi <lpieralisi@kernel.org>, =?utf-8?q?Krzysztof_Wilczy=C5=84?=\n\t=?utf-8?q?ski?= <kwilczynski@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>, Rob Herring <robh@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>, Frank Li <Frank.Li@nxp.com>,\n Sascha Hauer <s.hauer@pengutronix.de>,\n Pengutronix Kernel Team <kernel@pengutronix.de>,\n Fabio Estevam <festevam@gmail.com>,\n Marek Vasut <marek.vasut+renesas@gmail.com>,\n Yoshihiro Shimoda <yoshihiro.shimoda.uh@renesas.com>,\n Geert Uytterhoeven <geert+renesas@glider.be>,\n Magnus Damm <magnus.damm@gmail.com>,\n Thierry Reding <thierry.reding@gmail.com>,\n Jonathan Hunter <jonathanh@nvidia.com>,\n Kunihiko Hayashi <hayashi.kunihiko@socionext.com>,\n Masami Hiramatsu <mhiramat@kernel.org>",
        "Cc": "Manikanta Maddireddy <mmaddireddy@nvidia.com>,\n\tKoichiro Den <den@valinux.co.jp>,\n\tDamien Le Moal <dlemoal@kernel.org>,\n\tNiklas Cassel <cassel@kernel.org>,\n\tlinux-pci@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\timx@lists.linux.dev,\n\tlinux-renesas-soc@vger.kernel.org,\n\tlinux-tegra@vger.kernel.org",
        "Subject": "[PATCH 5/9] PCI: dwc: Replace BAR_RESERVED with BAR_DISABLED in glue\n drivers",
        "Date": "Tue, 17 Feb 2026 22:27:11 +0100",
        "Message-ID": "<20260217212707.2450423-16-cassel@kernel.org>",
        "X-Mailer": "git-send-email 2.53.0",
        "In-Reply-To": "<20260217212707.2450423-11-cassel@kernel.org>",
        "References": "<20260217212707.2450423-11-cassel@kernel.org>",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-pci@vger.kernel.org",
        "List-Id": "<linux-pci.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "X-Developer-Signature": "v=1; a=openpgp-sha256; l=4691; i=cassel@kernel.org;\n h=from:subject; bh=DLNJ6thciQ1FKfVLXLBIkij44la3XwigLb80Cl2oDMM=;\n b=owGbwMvMwCV2MsVw8cxjvkWMp9WSGDKn3NX7eofZL7l0boT87F2/nh3pD4+584evSZ7tm97N1\n 4Zrf7O+6ChlYRDjYpAVU2Tx/eGyv7jbfcpxxTs2MHNYmUCGMHBxCsBE5G8w/M/7lBqTn/vUik+u\n 87b5OW2efJFlp5dvk2nZ7cF6INMw/g4jww6Xu419J9mSrokUP75pFvxIVW2FfN0hF9Xnxzk55qV\n VMgAA",
        "X-Developer-Key": "i=cassel@kernel.org; a=openpgp;\n fpr=5ADE635C0E631CBBD5BE065A352FE6582ED9B5DA",
        "Content-Transfer-Encoding": "8bit"
    },
    "content": "Most DWC based EPC glue drivers that have BARs marked as BAR_RESERVED in\nepc_features also call dw_pcie_ep_reset_bar() for these reserved BARs in\nep->ops->init().\n\nAn EPF driver will be able to get/enable BARs that have been disabled/reset\nunless they are marked as BAR_RESERVED (see pci_epc_get_next_free_bar()).\n\nThus all EPC drivers that have a BAR marked as BAR_RESERVED in epc_features\nAND call dw_pcie_ep_reset_bar() should really be marked as BAR_DISABLED.\n\nBARs that are marked as BAR_RESERVED in epc_features but for which\ndw_pcie_ep_reset_bar() is not called in ep->ops->init() are still kept as\nBAR_RESERVED.\n\nNo EPC drivers outside drivers/pci/controllers/dwc mark their BARs as\nBAR_RESERVED, so there is nothing to do in non-DWC based EPC drivers.\n\nSigned-off-by: Niklas Cassel <cassel@kernel.org>\n---\n drivers/pci/controller/dwc/pci-imx6.c         | 12 ++++++------\n drivers/pci/controller/dwc/pcie-rcar-gen4.c   |  6 +++---\n drivers/pci/controller/dwc/pcie-tegra194.c    |  8 ++++----\n drivers/pci/controller/dwc/pcie-uniphier-ep.c |  4 ++--\n 4 files changed, 15 insertions(+), 15 deletions(-)",
    "diff": "diff --git a/drivers/pci/controller/dwc/pci-imx6.c b/drivers/pci/controller/dwc/pci-imx6.c\nindex a5b8d0b71677..ec1e3557ca53 100644\n--- a/drivers/pci/controller/dwc/pci-imx6.c\n+++ b/drivers/pci/controller/dwc/pci-imx6.c\n@@ -1433,19 +1433,19 @@ static int imx_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,\n static const struct pci_epc_features imx8m_pcie_epc_features = {\n \tDWC_EPC_COMMON_FEATURES,\n \t.msi_capable = true,\n-\t.bar[BAR_1] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_3] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_1] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_3] = { .type = BAR_DISABLED, },\n \t.bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = SZ_256, },\n-\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t.align = SZ_64K,\n };\n \n static const struct pci_epc_features imx8q_pcie_epc_features = {\n \tDWC_EPC_COMMON_FEATURES,\n \t.msi_capable = true,\n-\t.bar[BAR_1] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_3] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_1] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_3] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t.align = SZ_64K,\n };\n \ndiff --git a/drivers/pci/controller/dwc/pcie-rcar-gen4.c b/drivers/pci/controller/dwc/pcie-rcar-gen4.c\nindex a6912e85e4dd..9dd05bac22b9 100644\n--- a/drivers/pci/controller/dwc/pcie-rcar-gen4.c\n+++ b/drivers/pci/controller/dwc/pcie-rcar-gen4.c\n@@ -422,10 +422,10 @@ static int rcar_gen4_pcie_ep_raise_irq(struct dw_pcie_ep *ep, u8 func_no,\n static const struct pci_epc_features rcar_gen4_pcie_epc_features = {\n \tDWC_EPC_COMMON_FEATURES,\n \t.msi_capable = true,\n-\t.bar[BAR_1] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_3] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_1] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_3] = { .type = BAR_DISABLED, },\n \t.bar[BAR_4] = { .type = BAR_FIXED, .fixed_size = 256 },\n-\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t.align = SZ_1M,\n };\n \ndiff --git a/drivers/pci/controller/dwc/pcie-tegra194.c b/drivers/pci/controller/dwc/pcie-tegra194.c\nindex 31aa9a494dbc..9f9453e8cd23 100644\n--- a/drivers/pci/controller/dwc/pcie-tegra194.c\n+++ b/drivers/pci/controller/dwc/pcie-tegra194.c\n@@ -1994,10 +1994,10 @@ static const struct pci_epc_features tegra_pcie_epc_features = {\n \t.bar[BAR_0] = { .type = BAR_FIXED, .fixed_size = SZ_1M,\n \t\t\t.only_64bit = true, },\n \t.bar[BAR_1] = { .type = BAR_64BIT_UPPER, },\n-\t.bar[BAR_2] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_3] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_4] = { .type = BAR_RESERVED, },\n-\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_2] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_3] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_4] = { .type = BAR_DISABLED, },\n+\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t.align = SZ_64K,\n };\n \ndiff --git a/drivers/pci/controller/dwc/pcie-uniphier-ep.c b/drivers/pci/controller/dwc/pcie-uniphier-ep.c\nindex f873a1659592..5bde3ee682b5 100644\n--- a/drivers/pci/controller/dwc/pcie-uniphier-ep.c\n+++ b/drivers/pci/controller/dwc/pcie-uniphier-ep.c\n@@ -429,8 +429,8 @@ static const struct uniphier_pcie_ep_soc_data uniphier_pro5_data = {\n \t\t.bar[BAR_1] = { .type = BAR_64BIT_UPPER, },\n \t\t.bar[BAR_2] = { .only_64bit = true, },\n \t\t.bar[BAR_3] = { .type = BAR_64BIT_UPPER, },\n-\t\t.bar[BAR_4] = { .type = BAR_RESERVED, },\n-\t\t.bar[BAR_5] = { .type = BAR_RESERVED, },\n+\t\t.bar[BAR_4] = { .type = BAR_DISABLED, },\n+\t\t.bar[BAR_5] = { .type = BAR_DISABLED, },\n \t},\n };\n \n",
    "prefixes": [
        "5/9"
    ]
}