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GET /api/patches/2197391/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2197391,
    "url": "http://patchwork.ozlabs.org/api/patches/2197391/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260217212245.95321-7-ltaylorsimpson@gmail.com/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260217212245.95321-7-ltaylorsimpson@gmail.com>",
    "list_archive_url": null,
    "date": "2026-02-17T21:22:43",
    "name": "[v3,6/8] Hexagon (target/hexagon) Disassembly of invalid packets",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "b25074d475855135875429165d1a9ba1451d4f4a",
    "submitter": {
        "id": 86757,
        "url": "http://patchwork.ozlabs.org/api/people/86757/?format=api",
        "name": "Taylor Simpson",
        "email": "ltaylorsimpson@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260217212245.95321-7-ltaylorsimpson@gmail.com/mbox/",
    "series": [
        {
            "id": 492479,
            "url": "http://patchwork.ozlabs.org/api/series/492479/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=492479",
            "date": "2026-02-17T21:22:40",
            "name": "Hexagon (target/hexagon) Check opcodes versions",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/492479/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2197391/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2197391/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Taylor Simpson <ltaylorsimpson@gmail.com>",
        "To": "qemu-devel@nongnu.org",
        "Cc": "brian.cain@oss.qualcomm.com, matheus.bernardino@oss.qualcomm.com,\n sid.manning@oss.qualcomm.com, marco.liebel@oss.qualcomm.com,\n richard.henderson@linaro.org, philmd@linaro.org, ale@rev.ng, anjo@rev.ng,\n ltaylorsimpson@gmail.com",
        "Subject": "[PATCH v3 6/8] Hexagon (target/hexagon) Disassembly of invalid\n packets",
        "Date": "Tue, 17 Feb 2026 14:22:43 -0700",
        "Message-ID": "<20260217212245.95321-7-ltaylorsimpson@gmail.com>",
        "X-Mailer": "git-send-email 2.43.0",
        "In-Reply-To": "<20260217212245.95321-1-ltaylorsimpson@gmail.com>",
        "References": "<20260217212245.95321-1-ltaylorsimpson@gmail.com>",
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        "Precedence": "list",
        "List-Id": "qemu development <qemu-devel.nongnu.org>",
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        "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"
    },
    "content": "We pass the Hexagon CPU definition to disassemble_hexagon.  This allows\ndecode_packet to know if the opcodes are supported.\n\nNote that we print valid instructions in a packet when one or more is\ninvalid.  Rather than this\n0x0002128c:  0x1eae4fec\t{\t<invalid>\n0x00021290:  0x1c434c04\t\t<invalid>\n0x00021294:  0x1e03edf0\t\t<invalid> }\n\nWe print this\n0x0002128c:  0x1eae4fec\t{\t<invalid>\n0x00021290:  0x1c434c04\t\tV4.w = vadd(V12.w,V3.w)\n0x00021294:  0x1e03edf0\t\tV16 = V13 }\n\nCo-authored-by: Matheus Tavares Bernardino <matheus.bernardino@oss.qualcomm.com>\nCo-authored-by: Brian Cain <brian.cain@oss.qualcomm.com>\nSigned-off-by: Taylor Simpson <ltaylorsimpson@gmail.com>\n---\n target/hexagon/cpu_bits.h  |  4 +++-\n target/hexagon/printinsn.h |  3 ++-\n disas/hexagon.c            |  3 ++-\n target/hexagon/cpu.c       |  2 ++\n target/hexagon/decode.c    | 25 +++++++++++++++++++++----\n target/hexagon/printinsn.c |  9 +++++++--\n 6 files changed, 37 insertions(+), 9 deletions(-)",
    "diff": "diff --git a/target/hexagon/cpu_bits.h b/target/hexagon/cpu_bits.h\nindex 19beca81c0..aaac6b9ea6 100644\n--- a/target/hexagon/cpu_bits.h\n+++ b/target/hexagon/cpu_bits.h\n@@ -19,6 +19,7 @@\n #define HEXAGON_CPU_BITS_H\n \n #include \"qemu/bitops.h\"\n+#include \"cpu-qom.h\"\n \n #define PCALIGN 4\n #define PCALIGN_MASK (PCALIGN - 1)\n@@ -65,6 +66,7 @@ static inline bool is_packet_end(uint32_t endocing)\n     return ((bits == 0x3) || (bits == 0x0));\n }\n \n-int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc, GString *buf);\n+int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc, GString *buf,\n+                        const HexagonCPUDef *hex_def);\n \n #endif\ndiff --git a/target/hexagon/printinsn.h b/target/hexagon/printinsn.h\nindex 2ecd1731d0..6f84ef93c3 100644\n--- a/target/hexagon/printinsn.h\n+++ b/target/hexagon/printinsn.h\n@@ -18,10 +18,11 @@\n #ifndef HEXAGON_PRINTINSN_H\n #define HEXAGON_PRINTINSN_H\n \n+#include \"cpu-qom.h\"\n #include \"insn.h\"\n \n void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,\n-                         target_ulong pc);\n+                         target_ulong pc, const HexagonCPUDef *hex_def);\n void snprint_a_pkt_debug(GString *buf, Packet *pkt);\n \n #endif\ndiff --git a/disas/hexagon.c b/disas/hexagon.c\nindex c1a4ffc5f6..36b8321c26 100644\n--- a/disas/hexagon.c\n+++ b/disas/hexagon.c\n@@ -31,6 +31,7 @@\n \n int print_insn_hexagon(bfd_vma memaddr, struct disassemble_info *info)\n {\n+    const HexagonCPUDef *hex_def = (const HexagonCPUDef *)info->target_info;\n     uint32_t words[PACKET_WORDS_MAX];\n     bool found_end = false;\n     GString *buf;\n@@ -58,7 +59,7 @@ int print_insn_hexagon(bfd_vma memaddr, struct disassemble_info *info)\n     }\n \n     buf = g_string_sized_new(PACKET_BUFFER_LEN);\n-    len = disassemble_hexagon(words, i, memaddr, buf);\n+    len = disassemble_hexagon(words, i, memaddr, buf, hex_def);\n     (*info->fprintf_func)(info->stream, \"%s\", buf->str);\n     g_string_free(buf, true);\n \ndiff --git a/target/hexagon/cpu.c b/target/hexagon/cpu.c\nindex 949d509a15..001ea3c4ef 100644\n--- a/target/hexagon/cpu.c\n+++ b/target/hexagon/cpu.c\n@@ -297,8 +297,10 @@ static void hexagon_cpu_reset_hold(Object *obj, ResetType type)\n static void hexagon_cpu_disas_set_info(const CPUState *cs,\n                                        disassemble_info *info)\n {\n+    const HexagonCPU *cpu = HEXAGON_CPU(cs);\n     info->print_insn = print_insn_hexagon;\n     info->endian = BFD_ENDIAN_LITTLE;\n+    info->target_info = HEXAGON_CPU_GET_CLASS(cpu)->hex_def;\n }\n \n static void hexagon_cpu_realize(DeviceState *dev, Error **errp)\ndiff --git a/target/hexagon/decode.c b/target/hexagon/decode.c\nindex b8a1cd5b12..c4cf430e5a 100644\n--- a/target/hexagon/decode.c\n+++ b/target/hexagon/decode.c\n@@ -828,19 +828,36 @@ int decode_packet(DisasContext *ctx, int max_words, const uint32_t *words,\n \n /* Used for \"-d in_asm\" logging */\n int disassemble_hexagon(uint32_t *words, int nwords, bfd_vma pc,\n-                        GString *buf)\n+                        GString *buf, const HexagonCPUDef  *hex_def)\n {\n+    HexagonCPUDef any_def = {\n+        .hex_version = HEX_VER_ANY,  /* Allow decode to accept anything */\n+    };\n     DisasContext ctx;\n     Packet pkt;\n \n     memset(&ctx, 0, sizeof(DisasContext));\n+    ctx.hex_def = &any_def;\n     ctx.pkt = &pkt;\n \n     if (decode_packet(&ctx, nwords, words, &pkt, true) > 0) {\n-        snprint_a_pkt_disas(buf, &pkt, words, pc);\n+        snprint_a_pkt_disas(buf, &pkt, words, pc, hex_def);\n         return pkt.encod_pkt_size_in_bytes;\n     } else {\n-        g_string_assign(buf, \"<invalid>\");\n-        return 0;\n+        for (int i = 0; i < nwords; i++) {\n+            g_string_append_printf(buf, \"0x\" TARGET_FMT_lx \"\\t\", words[i]);\n+            if (i == 0) {\n+                g_string_append(buf, \"{\");\n+            }\n+            g_string_append(buf, \"\\t\");\n+            g_string_append(buf, \"<invalid>\");\n+            if (i < nwords - 1) {\n+                pc += 4;\n+                g_string_append_printf(buf, \"\\n0x\" TARGET_FMT_lx \":  \",\n+                                       (target_ulong)pc);\n+            }\n+        }\n+        g_string_append(buf, \" }\");\n+        return nwords * sizeof(uint32_t);\n     }\n }\ndiff --git a/target/hexagon/printinsn.c b/target/hexagon/printinsn.c\nindex 4865cdd133..22b305f018 100644\n--- a/target/hexagon/printinsn.c\n+++ b/target/hexagon/printinsn.c\n@@ -21,6 +21,7 @@\n #include \"insn.h\"\n #include \"reg_fields.h\"\n #include \"internal.h\"\n+#include \"decode.h\"\n \n static const char *sreg2str(unsigned int reg)\n {\n@@ -51,7 +52,7 @@ static void snprintinsn(GString *buf, Insn *insn)\n }\n \n void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,\n-                         target_ulong pc)\n+                         target_ulong pc, const HexagonCPUDef *hex_def)\n {\n     bool has_endloop0 = false;\n     bool has_endloop1 = false;\n@@ -83,7 +84,11 @@ void snprint_a_pkt_disas(GString *buf, Packet *pkt, uint32_t *words,\n         }\n \n         g_string_append(buf, \"\\t\");\n-        snprintinsn(buf, &(pkt->insn[i]));\n+        if (opcode_supported(pkt->insn[i].opcode, hex_def)) {\n+            snprintinsn(buf, &(pkt->insn[i]));\n+        } else {\n+            g_string_append(buf, \"<invalid>\");\n+        }\n \n         if (i < pkt->num_insns - 1) {\n             /*\n",
    "prefixes": [
        "v3",
        "6/8"
    ]
}