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GET /api/patches/2197382/?format=api
{ "id": 2197382, "url": "http://patchwork.ozlabs.org/api/patches/2197382/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-mtd/patch/20260217211427.9120-1-ses1er@gmail.com/", "project": { "id": 3, "url": "http://patchwork.ozlabs.org/api/projects/3/?format=api", "name": "Linux MTD development", "link_name": "linux-mtd", "list_id": "linux-mtd.lists.infradead.org", "list_email": "linux-mtd@lists.infradead.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260217211427.9120-1-ses1er@gmail.com>", "list_archive_url": null, "date": "2026-02-17T21:14:27", "name": "mtd: spinand: add support for additional Dosilicon models", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "1510f706e4e3e38462204d8da48a540ed528c3e7", "submitter": { "id": 92660, "url": "http://patchwork.ozlabs.org/api/people/92660/?format=api", "name": "Qing Wu", "email": "ses1er@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-mtd/patch/20260217211427.9120-1-ses1er@gmail.com/mbox/", "series": [ { "id": 492478, "url": "http://patchwork.ozlabs.org/api/series/492478/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-mtd/list/?series=492478", "date": "2026-02-17T21:14:27", "name": "mtd: spinand: add support for additional Dosilicon models", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/492478/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2197382/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2197382/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=bO4N4HVo;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=I9aY3RZa;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: Add support for additional Dosilicon SPI NAND chips.\n Datasheets\n for chips included in this patch:\n https://www.dosilicon.com/SPI%20NAND%20Flash.html\n Tested on a TP-Link TL-7DR7250 with a Dosilicon DS35Q1GB (0xE5 0xF1)\n Content analysis details: (-2.0 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [2607:f8b0:4864:20:0:0:0:f2f listed in]\n [list.dnswl.org]\n -0.0 SPF_PASS SPF: sender matches SPF record\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n provider\n [ses1er(at)gmail.com]\n 0.1 URIBL_SBL_A Contains URL's A record listed in the Spamhaus\n SBL\n blocklist\n [URI: ns11.xincache.com/112.80.181.45]\n [URI: ns12.xincache.com/112.80.181.111]", "X-BeenThere": "linux-mtd@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "Linux MTD discussion mailing list <linux-mtd.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/linux-mtd>,\n <mailto:linux-mtd-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/linux-mtd/>", "List-Post": "<mailto:linux-mtd@lists.infradead.org>", "List-Help": "<mailto:linux-mtd-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/linux-mtd>,\n <mailto:linux-mtd-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"linux-mtd\" <linux-mtd-bounces@lists.infradead.org>", "Errors-To": "linux-mtd-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "Add support for additional Dosilicon SPI NAND chips.\n\nDatasheets for chips included in this patch: https://www.dosilicon.com/SPI%20NAND%20Flash.html\n\nTested on a TP-Link TL-7DR7250 with a Dosilicon DS35Q1GB (0xE5 0xF1)\n\nSigned-off-by: Qing Wu <ses1er@gmail.com>\n---\n drivers/mtd/nand/spi/dosilicon.c | 219 ++++++++++++++++++++++++++++---\n 1 file changed, 204 insertions(+), 15 deletions(-)", "diff": "diff --git a/drivers/mtd/nand/spi/dosilicon.c b/drivers/mtd/nand/spi/dosilicon.c\nindex f99899866ceb..790671b65060 100644\n--- a/drivers/mtd/nand/spi/dosilicon.c\n+++ b/drivers/mtd/nand/spi/dosilicon.c\n@@ -1,6 +1,7 @@\n // SPDX-License-Identifier: GPL-2.0\n /*\n * Author: Ahmed Naseef <naseefkm@gmail.com>\n+ * Additions: Qing Wu <ses1er@gmail.com>\n */\n \n #include <linux/device.h>\n@@ -9,21 +10,27 @@\n \n #define SPINAND_MFR_DOSILICON 0xE5\n \n+#define DOSICON_STATUS_ECC_MASK\t\t\tGENMASK(6, 4)\n+#define DOSICON_STATUS_ECC_NO_BITFLIPS\t\t(0 << 4)\n+#define DOSICON_STATUS_ECC_1TO3_BITFLIPS\t(1 << 4)\n+#define DOSICON_STATUS_ECC_4TO6_BITFLIPS\t(3 << 4)\n+#define DOSICON_STATUS_ECC_7TO8_BITFLIPS\t(5 << 4)\n+\n static SPINAND_OP_VARIANTS(read_cache_variants,\n-\t\tSPINAND_PAGE_READ_FROM_CACHE_1S_1S_4S_OP(0, 1, NULL, 0, 0),\n-\t\tSPINAND_PAGE_READ_FROM_CACHE_1S_1S_2S_OP(0, 1, NULL, 0, 0),\n-\t\tSPINAND_PAGE_READ_FROM_CACHE_FAST_1S_1S_1S_OP(0, 1, NULL, 0, 0),\n-\t\tSPINAND_PAGE_READ_FROM_CACHE_1S_1S_1S_OP(0, 1, NULL, 0, 0));\n+\t\tSPINAND_PAGE_READ_FROM_CACHE_X4_OP(0, 1, NULL, 0),\n+\t\tSPINAND_PAGE_READ_FROM_CACHE_X2_OP(0, 1, NULL, 0),\n+\t\tSPINAND_PAGE_READ_FROM_CACHE_OP(true, 0, 1, NULL, 0),\n+\t\tSPINAND_PAGE_READ_FROM_CACHE_OP(false, 0, 1, NULL, 0));\n \n static SPINAND_OP_VARIANTS(write_cache_variants,\n-\t\tSPINAND_PROG_LOAD_1S_1S_4S_OP(true, 0, NULL, 0),\n-\t\tSPINAND_PROG_LOAD_1S_1S_1S_OP(true, 0, NULL, 0));\n+\t\tSPINAND_PROG_LOAD_X4(true, 0, NULL, 0),\n+\t\tSPINAND_PROG_LOAD(true, 0, NULL, 0));\n \n static SPINAND_OP_VARIANTS(update_cache_variants,\n-\t\tSPINAND_PROG_LOAD_1S_1S_4S_OP(false, 0, NULL, 0),\n-\t\tSPINAND_PROG_LOAD_1S_1S_1S_OP(false, 0, NULL, 0));\n+\t\tSPINAND_PROG_LOAD_X4(false, 0, NULL, 0),\n+\t\tSPINAND_PROG_LOAD(false, 0, NULL, 0));\n \n-static int ds35xx_ooblayout_ecc(struct mtd_info *mtd, int section,\n+static int ds35xxga_ooblayout_ecc(struct mtd_info *mtd, int section,\n \t\t\t\tstruct mtd_oob_region *region)\n {\n \tif (section > 3)\n@@ -35,7 +42,7 @@ static int ds35xx_ooblayout_ecc(struct mtd_info *mtd, int section,\n \treturn 0;\n }\n \n-static int ds35xx_ooblayout_free(struct mtd_info *mtd, int section,\n+static int ds35xxga_ooblayout_free(struct mtd_info *mtd, int section,\n \t\t\t\t struct mtd_oob_region *region)\n {\n \tif (section > 3)\n@@ -53,11 +60,67 @@ static int ds35xx_ooblayout_free(struct mtd_info *mtd, int section,\n \treturn 0;\n }\n \n-static const struct mtd_ooblayout_ops ds35xx_ooblayout = {\n-\t.ecc = ds35xx_ooblayout_ecc,\n-\t.free = ds35xx_ooblayout_free,\n+static const struct mtd_ooblayout_ops ds35xxga_ooblayout = {\n+\t.ecc = ds35xxga_ooblayout_ecc,\n+\t.free = ds35xxga_ooblayout_free,\n };\n \n+static int ds35xxgb_ooblayout_ecc(struct mtd_info *mtd, int section,\n+\t\t\t\t struct mtd_oob_region *region)\n+{\n+\tif (section)\n+\t\treturn -ERANGE;\n+\n+\tregion->offset = 64;\n+\tregion->length = 64;\n+\n+\treturn 0;\n+}\n+\n+static int ds35xxgb_ooblayout_free(struct mtd_info *mtd, int section,\n+\t\t\t\t struct mtd_oob_region *region)\n+{\n+\tif (section)\n+\t\treturn -ERANGE;\n+\n+\t/* Reserve 1 bytes for the BBM. */\n+\tregion->offset = 1;\n+\tregion->length = 63;\n+\n+\treturn 0;\n+}\n+\n+static const struct mtd_ooblayout_ops ds35xxgb_ooblayout = {\n+\t.ecc = ds35xxgb_ooblayout_ecc,\n+\t.free = ds35xxgb_ooblayout_free,\n+};\n+\n+static int ds35xxgb_ecc_get_status(struct spinand_device *spinand,\n+\t\t\t\t u8 status)\n+{\n+\tswitch (status & DOSICON_STATUS_ECC_MASK) {\n+\tcase STATUS_ECC_NO_BITFLIPS:\n+\t\treturn 0;\n+\n+\tcase STATUS_ECC_UNCOR_ERROR:\n+\t\treturn -EBADMSG;\n+\n+\tcase DOSICON_STATUS_ECC_1TO3_BITFLIPS:\n+\t\treturn 3;\n+\n+\tcase DOSICON_STATUS_ECC_4TO6_BITFLIPS:\n+\t\treturn 6;\n+\n+\tcase DOSICON_STATUS_ECC_7TO8_BITFLIPS:\n+\t\treturn 8;\n+\n+\tdefault:\n+\t\tbreak;\n+\t}\n+\n+\treturn -EINVAL;\n+}\n+\n static const struct spinand_info dosilicon_spinand_table[] = {\n \tSPINAND_INFO(\"DS35Q1GA\",\n \t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x71),\n@@ -67,7 +130,16 @@ static const struct spinand_info dosilicon_spinand_table[] = {\n \t\t\t\t\t &write_cache_variants,\n \t\t\t\t\t &update_cache_variants),\n \t\tSPINAND_HAS_QE_BIT,\n-\t\tSPINAND_ECCINFO(&ds35xx_ooblayout, NULL)),\n+\t\tSPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),\n+\tSPINAND_INFO(\"DS35Q2GA\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x72),\n+\t\tNAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),\n+\t\tNAND_ECCREQ(4, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),\n \tSPINAND_INFO(\"DS35M1GA\",\n \t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x21),\n \t\tNAND_MEMORG(1, 2048, 64, 64, 1024, 20, 1, 1, 1),\n@@ -76,7 +148,124 @@ static const struct spinand_info dosilicon_spinand_table[] = {\n \t\t\t\t\t &write_cache_variants,\n \t\t\t\t\t &update_cache_variants),\n \t\tSPINAND_HAS_QE_BIT,\n-\t\tSPINAND_ECCINFO(&ds35xx_ooblayout, NULL)),\n+\t\tSPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),\n+\tSPINAND_INFO(\"DS35M2GA\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x22),\n+\t\tNAND_MEMORG(1, 2048, 64, 64, 2048, 40, 2, 1, 1),\n+\t\tNAND_ECCREQ(4, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxga_ooblayout, NULL)),\n+\tSPINAND_INFO(\"DS35Q2GB\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF2),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 2048, 40, 2, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35M1GB\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA1),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35Q1GB\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF1),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35Q4GM\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF4),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 4096, 80, 2, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35Q12B\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xF5),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35M12B\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xA5),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35Q1GD-IB\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x51),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 1024, 20, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t&write_cache_variants,\n+\t\t\t\t\t&update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35M4GB-IB\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x64),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35Q4GB-IB\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB4),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 4096, 40, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35Q12C-IB\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x75),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35M12C-IB\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0x25),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 512, 10, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n+\tSPINAND_INFO(\"DS35Q2GBS\",\n+\t\tSPINAND_ID(SPINAND_READID_METHOD_OPCODE_DUMMY, 0xB2),\n+\t\tNAND_MEMORG(1, 2048, 128, 64, 2048, 40, 1, 1, 1),\n+\t\tNAND_ECCREQ(8, 512),\n+\t\tSPINAND_INFO_OP_VARIANTS(&read_cache_variants,\n+\t\t\t\t\t &write_cache_variants,\n+\t\t\t\t\t &update_cache_variants),\n+\t\tSPINAND_HAS_QE_BIT,\n+\t\tSPINAND_ECCINFO(&ds35xxgb_ooblayout, ds35xxgb_ecc_get_status)),\n };\n \n static const struct spinand_manufacturer_ops dosilicon_spinand_manuf_ops = {\n", "prefixes": [] }