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GET /api/patches/2197140/?format=api
{ "id": 2197140, "url": "http://patchwork.ozlabs.org/api/patches/2197140/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260217080601.3808847-3-den@valinux.co.jp/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260217080601.3808847-3-den@valinux.co.jp>", "list_archive_url": null, "date": "2026-02-17T08:05:54", "name": "[v8,2/9] PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "f1c67d56482771bd848d75e0ef7cdc797787fc52", "submitter": { "id": 91573, "url": "http://patchwork.ozlabs.org/api/people/91573/?format=api", "name": "Koichiro Den", "email": "den@valinux.co.jp" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260217080601.3808847-3-den@valinux.co.jp/mbox/", "series": [ { "id": 492390, "url": "http://patchwork.ozlabs.org/api/series/492390/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=492390", "date": "2026-02-17T08:05:52", "name": "PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback", "version": 8, "mbox": "http://patchwork.ozlabs.org/series/492390/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2197140/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2197140/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-47427-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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dkim=pass header.d=valinux.co.jp; arc=none" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=valinux.co.jp;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=spInnTauDhyUjwxofCAO5D7/6vcd1NV/KlDf0/6wvIw=;\n b=GXxLCKUxE+BxKI/oue2Gbyj5IBq0/KXuie8cf6rroWbhF0guSN4zyka3YXK72GK6jOo37GEehg8eUNC9eMOu37lnRMZ7yxumlAvVaMpkazKIDEY5xOUgYN9jJ0QKBkB1uBgHYbozvHlxTfpd2Dd4Hp76izLhl4nkc3s+WQZDWUc=", "From": "Koichiro Den <den@valinux.co.jp>", "To": "jingoohan1@gmail.com,\n\tmani@kernel.org,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\trobh@kernel.org,\n\tbhelgaas@google.com,\n\theiko@sntech.de,\n\tkishon@kernel.org,\n\tjdmason@kudzu.us,\n\tdave.jiang@intel.com,\n\tallenbh@gmail.com,\n\tcassel@kernel.org,\n\tshawn.lin@rock-chips.com,\n\tFrank.Li@nxp.com", "Cc": "linux-pci@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tlinux-arm-kernel@lists.infradead.org,\n\tlinux-rockchip@lists.infradead.org,\n\tntb@lists.linux.dev", "Subject": "[PATCH v8 2/9] PCI: dw-rockchip: Describe RK3588 BAR4 DMA ctrl window", "Date": "Tue, 17 Feb 2026 17:05:54 +0900", "Message-ID": "<20260217080601.3808847-3-den@valinux.co.jp>", "X-Mailer": "git-send-email 2.51.0", "In-Reply-To": "<20260217080601.3808847-1-den@valinux.co.jp>", "References": "<20260217080601.3808847-1-den@valinux.co.jp>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "TYWPR01CA0028.jpnprd01.prod.outlook.com\n (2603:1096:400:aa::15) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:405:38f::10)", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "TY7P286MB7722:EE_|OS7P286MB7132:EE_", "X-MS-Office365-Filtering-Correlation-Id": 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"X-OriginatorOrg": "valinux.co.jp", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 2f852bc6-c1d4-4fbb-267b-08de6dfb68a7", "X-MS-Exchange-CrossTenant-AuthSource": "TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "17 Feb 2026 08:06:09.4038\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "7a57bee8-f73d-4c5f-a4f7-d72c91c8c111", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n DfBOo6YAXULZwvr9H8ybiatH572pqctDwJCFthVVLkpGP4FMLQM+BHAB7Wg9y8AJbrTI3dph1UTthNJEAIol4A==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "OS7P286MB7132" }, "content": "On RK3588 PCIe3_4L in EP mode, the integrated DMA controller registers\nare permanently mapped to BAR4 and must not be repurposed by EPF\ndrivers.\n\nWhen the remote peer needs to access these registers, it must use the\nfixed BAR4 window instead of creating another inbound mapping in a\ndifferent BAR. Mixing the fixed window with an additional mapping can\nlead to incorrect behavior.\n\nAdvertise the DMA controller MMIO window as a reserved BAR subregion so\nEPF drivers can reuse it safely.\n\nSigned-off-by: Koichiro Den <den@valinux.co.jp>\n---\n drivers/pci/controller/dwc/pcie-dw-rockchip.c | 15 ++++++++++++++-\n 1 file changed, 14 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/pci/controller/dwc/pcie-dw-rockchip.c b/drivers/pci/controller/dwc/pcie-dw-rockchip.c\nindex 5b17da63151d..ecc28093c589 100644\n--- a/drivers/pci/controller/dwc/pcie-dw-rockchip.c\n+++ b/drivers/pci/controller/dwc/pcie-dw-rockchip.c\n@@ -403,6 +403,15 @@ static const struct pci_epc_features rockchip_pcie_epc_features_rk3568 = {\n \t.bar[BAR_5] = { .type = BAR_RESIZABLE, },\n };\n \n+static const struct pci_epc_bar_rsvd_region rk3588_bar4_rsvd[] = {\n+\t{\n+\t\t/* DMA_CAP (BAR4: DMA Port Logic Structure) */\n+\t\t.type = PCI_EPC_BAR_RSVD_DMA_CTRL_MMIO,\n+\t\t.offset = 0x0,\n+\t\t.size = 0x2000,\n+\t},\n+};\n+\n /*\n * BAR4 on rk3588 exposes the ATU Port Logic Structure to the host regardless of\n * iATU settings for BAR4. This means that BAR4 cannot be used by an EPF driver,\n@@ -420,7 +429,11 @@ static const struct pci_epc_features rockchip_pcie_epc_features_rk3588 = {\n \t.bar[BAR_1] = { .type = BAR_RESIZABLE, },\n \t.bar[BAR_2] = { .type = BAR_RESIZABLE, },\n \t.bar[BAR_3] = { .type = BAR_RESIZABLE, },\n-\t.bar[BAR_4] = { .type = BAR_RESERVED, },\n+\t.bar[BAR_4] = {\n+\t\t.type = BAR_RESERVED,\n+\t\t.nr_rsvd_regions = ARRAY_SIZE(rk3588_bar4_rsvd),\n+\t\t.rsvd_regions = rk3588_bar4_rsvd,\n+\t},\n \t.bar[BAR_5] = { .type = BAR_RESIZABLE, },\n };\n \n", "prefixes": [ "v8", "2/9" ] }