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GET /api/patches/2197089/?format=api
{ "id": 2197089, "url": "http://patchwork.ozlabs.org/api/patches/2197089/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260217-i2c-dpaux-irqsafe-v2-1-635a4c43b1a7@nvidia.com/", "project": { "id": 35, "url": "http://patchwork.ozlabs.org/api/projects/35/?format=api", "name": "Linux I2C development", "link_name": "linux-i2c", "list_id": "linux-i2c.vger.kernel.org", "list_email": "linux-i2c@vger.kernel.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260217-i2c-dpaux-irqsafe-v2-1-635a4c43b1a7@nvidia.com>", "list_archive_url": null, "date": "2026-02-17T04:00:31", "name": "[v2] i2c: tegra: Don't mark devices with pins as IRQ safe", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "0dd3a8c5aab6973d49a962d05931a5763f56f0b0", "submitter": { "id": 26499, "url": "http://patchwork.ozlabs.org/api/people/26499/?format=api", "name": "Mikko Perttunen", "email": "mperttunen@nvidia.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-i2c/patch/20260217-i2c-dpaux-irqsafe-v2-1-635a4c43b1a7@nvidia.com/mbox/", "series": [ { "id": 492369, "url": "http://patchwork.ozlabs.org/api/series/492369/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-i2c/list/?series=492369", "date": "2026-02-17T04:00:31", "name": "[v2] i2c: tegra: Don't mark devices with pins as IRQ safe", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492369/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2197089/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2197089/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-i2c+bounces-16019-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-i2c@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", 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"X-MS-Exchange-AntiSpam-MessageData-1": "WVyqbuVdg5UEqg==", "X-OriginatorOrg": "Nvidia.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 936a082b-3b5b-4e44-bc9c-08de6dd93743", "X-MS-Exchange-CrossTenant-AuthSource": "SJ2PR12MB9161.namprd12.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "17 Feb 2026 04:01:24.1729\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "43083d15-7273-40c1-b7db-39efd9ccc17a", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n gDyZ+rq6/4qoWNs4c9O5IVu6sHsFR0rODPSqVYLE/1zmk9geCsyUP4iN3tRqwRfDboNBs2DfJL8RJo198DcVMw==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "PH8PR12MB6723" }, "content": "I2C devices with associated pinctrl states (DPAUX I2C controllers)\nwill change pinctrl state during runtime PM. This requires taking\na mutex, so these devices cannot be marked as IRQ safe.\n\nAdd PINCTRL as requirement for COMPILE_TEST to avoid build errors.\n\nSigned-off-by: Mikko Perttunen <mperttunen@nvidia.com>\n---\nChanges in v2:\n- Removed incorrect reference to lockdep in commit message.\n- Added PINCTRL dependency when building for COMPILE_TEST.\n Tegra platforms already globally select PINCTRL, but COMPILE_TEST\n configurations may not.\n- Link to v1: https://lore.kernel.org/r/20260202-i2c-dpaux-irqsafe-v1-1-5b1847e8bc97@nvidia.com\n---\n drivers/i2c/busses/Kconfig | 2 +-\n drivers/i2c/busses/i2c-tegra.c | 5 ++++-\n 2 files changed, 5 insertions(+), 2 deletions(-)\n\n\n---\nbase-commit: 4f938c7d3b25d87b356af4106c2682caf8c835a2\nchange-id: 20260202-i2c-dpaux-irqsafe-edc04628b401", "diff": "diff --git a/drivers/i2c/busses/Kconfig b/drivers/i2c/busses/Kconfig\nindex e11d50750e63..09152088b79f 100644\n--- a/drivers/i2c/busses/Kconfig\n+++ b/drivers/i2c/busses/Kconfig\n@@ -1211,7 +1211,7 @@ config I2C_SYNQUACER\n \n config I2C_TEGRA\n \ttristate \"NVIDIA Tegra internal I2C controller\"\n-\tdepends on ARCH_TEGRA || (COMPILE_TEST && (ARC || ARM || ARM64 || M68K || RISCV || SUPERH || SPARC))\n+\tdepends on ARCH_TEGRA || (COMPILE_TEST && (ARC || ARM || ARM64 || M68K || RISCV || SUPERH || SPARC) && PINCTRL)\n \t# COMPILE_TEST needs architectures with readsX()/writesX() primitives\n \thelp\n \t If you say yes to this option, support will be included for the\ndiff --git a/drivers/i2c/busses/i2c-tegra.c b/drivers/i2c/busses/i2c-tegra.c\nindex bec619b9af4e..4eaeb395d5db 100644\n--- a/drivers/i2c/busses/i2c-tegra.c\n+++ b/drivers/i2c/busses/i2c-tegra.c\n@@ -2047,8 +2047,11 @@ static int tegra_i2c_probe(struct platform_device *pdev)\n \t *\n \t * VI I2C device shouldn't be marked as IRQ-safe because VI I2C won't\n \t * be used for atomic transfers. ACPI device is not IRQ safe also.\n+\t *\n+\t * Devices with pinctrl states cannot be marked IRQ-safe as the pinctrl\n+\t * state transitions during runtime PM require mutexes.\n \t */\n-\tif (!IS_VI(i2c_dev) && !has_acpi_companion(i2c_dev->dev))\n+\tif (!IS_VI(i2c_dev) && !has_acpi_companion(i2c_dev->dev) && !i2c_dev->dev->pins)\n \t\tpm_runtime_irq_safe(i2c_dev->dev);\n \n \tpm_runtime_enable(i2c_dev->dev);\n", "prefixes": [ "v2" ] }