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GET /api/patches/2196978/?format=api
{ "id": 2196978, "url": "http://patchwork.ozlabs.org/api/patches/2196978/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260216191213.2556073-10-dmitry.osipenko@collabora.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260216191213.2556073-10-dmitry.osipenko@collabora.com>", "list_archive_url": null, "date": "2026-02-16T19:12:04", "name": "[v17,09/18] virtio-gpu: Support asynchronous fencing", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d05bb0b2f0ab33dee7f5f4a37fa29af0f3f75407", "submitter": { "id": 83453, "url": "http://patchwork.ozlabs.org/api/people/83453/?format=api", "name": "Dmitry Osipenko", "email": "dmitry.osipenko@collabora.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260216191213.2556073-10-dmitry.osipenko@collabora.com/mbox/", "series": [ { "id": 492344, "url": "http://patchwork.ozlabs.org/api/series/492344/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=492344", "date": "2026-02-16T19:11:55", "name": "Support virtio-gpu DRM native context and MAP_FIXED API", "version": 17, "mbox": "http://patchwork.ozlabs.org/series/492344/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196978/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196978/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=collabora.com header.i=dmitry.osipenko@collabora.com\n header.a=rsa-sha256 header.s=zohomail header.b=jweBHw+m;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Mon, 16 Feb 2026 14:13:59 -0500", "by mx.zohomail.com with SMTPS id 1771269220750330.1637863055522;\n Mon, 16 Feb 2026 11:13:40 -0800 (PST)" ], "ARC-Seal": "i=1; a=rsa-sha256; t=1771269222; cv=none;\n d=zohomail.com; s=zohoarc;\n b=ewv0UmF6qdQ1NAQIEXg9wF4lr42akl398yNUcbjb4GOfsFKHD9urdHPOorawpp+EkuDBn8p2U6TVyV//TNab9ec0GILQKheBvzgtyO0b/sh2Zw1LULcpX3JfoUkxLwtDPIzk8YHyMl9tk9C39AZ7/C1mcJ+Ju2j+HTTVUSIjogI=", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=zohomail.com;\n s=zohoarc; t=1771269222;\n h=Content-Type:Content-Transfer-Encoding:Cc:Cc:Date:Date:From:From:In-Reply-To:MIME-Version:Message-ID:References:Subject:Subject:To:To:Message-Id:Reply-To;\n bh=nAeaxL4KxDA9p7Z4I31M0hbp9rxG8CrViMlN4r0GhWs=;\n b=kItBMZ8UvZF1MRYn4paQOjE8v4KTY8Uv5vAu+cllfo65j7tgj4zKU++0wgWKlaiFyMv1niYrHxlwTj79XAuADxCN4M+Na6PNIJ4GBby1lX52SphSTgbbOyndVgGOLZU9Pje2UQ+G9Pp5wHjau8fO/pA+NV/oh4RBqxzp7hFR/cs=", "ARC-Authentication-Results": "i=1; mx.zohomail.com;\n dkim=pass header.i=collabora.com;\n spf=pass smtp.mailfrom=dmitry.osipenko@collabora.com;\n dmarc=pass header.from=<dmitry.osipenko@collabora.com>", "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; t=1771269222;\n s=zohomail; d=collabora.com; i=dmitry.osipenko@collabora.com;\n h=From:From:To:To:Cc:Cc:Subject:Subject:Date:Date:Message-ID:In-Reply-To:References:MIME-Version:Content-Type:Content-Transfer-Encoding:Message-Id:Reply-To;\n bh=nAeaxL4KxDA9p7Z4I31M0hbp9rxG8CrViMlN4r0GhWs=;\n b=jweBHw+mzt0s202i2fLYwcjGiL1BMqkvScdDndr5PVVDtULOGR70LRHAuAdlXb2f\n Fl/Ph/1MNMbJqTYmeJh123p561X0XOuMHEu7dF18iybd8pwDjgao+yXwHEnGbBZ7ehe\n aa5lPRhJKCaLlLiVw650rGK77Ufv2oOWPHBpD1rc=", "From": "Dmitry Osipenko <dmitry.osipenko@collabora.com>", "To": "Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>,\n Huang Rui <ray.huang@amd.com>,\n =?utf-8?q?Marc-Andr=C3=A9_Lureau?= <marcandre.lureau@redhat.com>,\n\t=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>,\n Gerd Hoffmann <kraxel@redhat.com>,\n =?utf-8?q?Alex_Benn=C3=A9e?= <alex.bennee@linaro.org>,\n Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>,\n \"Michael S . Tsirkin\" <mst@redhat.com>, Paolo Bonzini <pbonzini@redhat.com>,\n Yiwei Zhang <zzyiwei@gmail.com>, Sergio Lopez Pascual <slp@redhat.com>", "Cc": "Gert Wollny <gert.wollny@collabora.com>, qemu-devel@nongnu.org,\n Gurchetan Singh <gurchetansingh@chromium.org>, Alyssa Ross <hi@alyssa.is>,\n\t=?utf-8?q?Roger_Pau_Monn=C3=A9?= <roger.pau@citrix.com>,\n Alex Deucher <alexander.deucher@amd.com>,\n Stefano Stabellini <stefano.stabellini@amd.com>, =?utf-8?q?Christian_K?=\n\t=?utf-8?q?=C3=B6nig?= <christian.koenig@amd.com>,\n Xenia Ragiadakou <xenia.ragiadakou@amd.com>,\n Honglei Huang <honglei1.huang@amd.com>, Julia Zhang <julia.zhang@amd.com>,\n Chen Jiqian <Jiqian.Chen@amd.com>, Rob Clark <robdclark@gmail.com>,\n Robert Beckett <bob.beckett@collabora.com>", "Subject": "[PATCH v17 09/18] virtio-gpu: Support asynchronous fencing", "Date": "Mon, 16 Feb 2026 22:12:04 +0300", "Message-ID": "<20260216191213.2556073-10-dmitry.osipenko@collabora.com>", "X-Mailer": "git-send-email 2.52.0", "In-Reply-To": "<20260216191213.2556073-1-dmitry.osipenko@collabora.com>", "References": "<20260216191213.2556073-1-dmitry.osipenko@collabora.com>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-ZohoMailClient": "External", "Received-SPF": "pass client-ip=136.143.188.107;\n envelope-from=dmitry.osipenko@collabora.com; helo=sender4-pp-e107.zoho.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_MSPIKE_H4=0.001, RCVD_IN_MSPIKE_WL=0.001,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_NONE=0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Support asynchronous fencing feature of virglrenderer. It allows Qemu to\nhandle fence as soon as it's signalled instead of periodically polling\nthe fence status. This feature is required for enabling DRM context\nsupport in Qemu because legacy fencing mode isn't supported for DRM\ncontexts in virglrenderer.\n\nReviewed-by: Akihiko Odaki <akihiko.odaki@daynix.com>\nAcked-by: Michael S. Tsirkin <mst@redhat.com>\nTested-by: Alex Bennée <alex.bennee@linaro.org>\nReviewed-by: Alex Bennée <alex.bennee@linaro.org>\nAcked-by: Pierre-Eric Pelloux-Prayer <pierre-eric.pelloux-prayer@amd.com>\nReviewed-by: Yiwei Zhang <zzyiwei@gmail.com>\nTested-by: Yiwei Zhang <zzyiwei@gmail.com>\nSigned-off-by: Dmitry Osipenko <dmitry.osipenko@collabora.com>\n---\n hw/display/virtio-gpu-gl.c | 5 ++\n hw/display/virtio-gpu-virgl.c | 127 +++++++++++++++++++++++++++++++++\n include/hw/virtio/virtio-gpu.h | 11 +++\n meson.build | 2 +\n 4 files changed, 145 insertions(+)", "diff": "diff --git a/hw/display/virtio-gpu-gl.c b/hw/display/virtio-gpu-gl.c\nindex b98ef2ef9877..3e0680880e14 100644\n--- a/hw/display/virtio-gpu-gl.c\n+++ b/hw/display/virtio-gpu-gl.c\n@@ -169,6 +169,11 @@ static void virtio_gpu_gl_device_unrealize(DeviceState *qdev)\n if (gl->renderer_state >= RS_INITED) {\n #if VIRGL_VERSION_MAJOR >= 1\n qemu_bh_delete(gl->cmdq_resume_bh);\n+\n+ if (gl->async_fence_bh) {\n+ virtio_gpu_virgl_reset_async_fences(g);\n+ qemu_bh_delete(gl->async_fence_bh);\n+ }\n #endif\n if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {\n timer_free(gl->print_stats);\ndiff --git a/hw/display/virtio-gpu-virgl.c b/hw/display/virtio-gpu-virgl.c\nindex 05f22a418d71..49bf7117c098 100644\n--- a/hw/display/virtio-gpu-virgl.c\n+++ b/hw/display/virtio-gpu-virgl.c\n@@ -24,6 +24,23 @@\n \n #include <virglrenderer.h>\n \n+/*\n+ * VIRGL_CHECK_VERSION available since libvirglrenderer 1.0.1 and was fixed\n+ * in 1.1.0. Undefine bugged version of the macro and provide our own.\n+ */\n+#if defined(VIRGL_CHECK_VERSION) && \\\n+ VIRGL_VERSION_MAJOR == 1 && VIRGL_VERSION_MINOR < 1\n+#undef VIRGL_CHECK_VERSION\n+#endif\n+\n+#ifndef VIRGL_CHECK_VERSION\n+#define VIRGL_CHECK_VERSION(major, minor, micro) \\\n+ (VIRGL_VERSION_MAJOR > (major) || \\\n+ VIRGL_VERSION_MAJOR == (major) && VIRGL_VERSION_MINOR > (minor) || \\\n+ VIRGL_VERSION_MAJOR == (major) && VIRGL_VERSION_MINOR == (minor) && \\\n+ VIRGL_VERSION_MICRO >= (micro))\n+#endif\n+\n struct virtio_gpu_virgl_resource {\n struct virtio_gpu_simple_resource base;\n MemoryRegion *mr;\n@@ -1092,6 +1109,103 @@ static void virgl_write_context_fence(void *opaque, uint32_t ctx_id,\n }\n #endif\n \n+void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g)\n+{\n+ struct virtio_gpu_virgl_context_fence *f;\n+ VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);\n+\n+ while (!QSLIST_EMPTY(&gl->async_fenceq)) {\n+ f = QSLIST_FIRST(&gl->async_fenceq);\n+\n+ QSLIST_REMOVE_HEAD(&gl->async_fenceq, next);\n+\n+ g_free(f);\n+ }\n+}\n+\n+#if VIRGL_CHECK_VERSION(1, 1, 2)\n+static void virtio_gpu_virgl_async_fence_bh(void *opaque)\n+{\n+ QSLIST_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq;\n+ struct virtio_gpu_ctrl_command *cmd, *tmp;\n+ struct virtio_gpu_virgl_context_fence *f;\n+ VirtIOGPU *g = opaque;\n+ VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);\n+\n+ if (gl->renderer_state != RS_INITED) {\n+ return;\n+ }\n+\n+ QSLIST_MOVE_ATOMIC(&async_fenceq, &gl->async_fenceq);\n+\n+ while (!QSLIST_EMPTY(&async_fenceq)) {\n+ f = QSLIST_FIRST(&async_fenceq);\n+\n+ QSLIST_REMOVE_HEAD(&async_fenceq, next);\n+\n+ QTAILQ_FOREACH_SAFE(cmd, &g->fenceq, next, tmp) {\n+ /*\n+ * the guest can end up emitting fences out of order\n+ * so we should check all fenced cmds not just the first one.\n+ */\n+ if (cmd->cmd_hdr.fence_id > f->fence_id) {\n+ continue;\n+ }\n+ if (cmd->cmd_hdr.flags & VIRTIO_GPU_FLAG_INFO_RING_IDX) {\n+ if (cmd->cmd_hdr.ring_idx != f->ring_idx) {\n+ continue;\n+ }\n+ if (cmd->cmd_hdr.ctx_id != f->ctx_id) {\n+ continue;\n+ }\n+ }\n+ virtio_gpu_ctrl_response_nodata(g, cmd, VIRTIO_GPU_RESP_OK_NODATA);\n+ QTAILQ_REMOVE(&g->fenceq, cmd, next);\n+ g_free(cmd);\n+ }\n+\n+ trace_virtio_gpu_fence_resp(f->fence_id);\n+ g_free(f);\n+ g->inflight--;\n+ if (virtio_gpu_stats_enabled(g->parent_obj.conf)) {\n+ trace_virtio_gpu_dec_inflight_fences(g->inflight);\n+ }\n+ }\n+}\n+\n+static void\n+virtio_gpu_virgl_push_async_fence(VirtIOGPU *g, uint32_t ctx_id,\n+ uint32_t ring_idx, uint64_t fence_id)\n+{\n+ struct virtio_gpu_virgl_context_fence *f;\n+ VirtIOGPUGL *gl = VIRTIO_GPU_GL(g);\n+\n+ f = g_new(struct virtio_gpu_virgl_context_fence, 1);\n+ f->ctx_id = ctx_id;\n+ f->ring_idx = ring_idx;\n+ f->fence_id = fence_id;\n+\n+ QSLIST_INSERT_HEAD_ATOMIC(&gl->async_fenceq, f, next);\n+\n+ qemu_bh_schedule(gl->async_fence_bh);\n+}\n+\n+static void virgl_write_async_fence(void *opaque, uint32_t fence)\n+{\n+ VirtIOGPU *g = opaque;\n+\n+ virtio_gpu_virgl_push_async_fence(g, 0, UINT32_MAX, fence);\n+}\n+\n+static void virgl_write_async_context_fence(void *opaque, uint32_t ctx_id,\n+ uint32_t ring_idx, uint64_t fence)\n+{\n+ VirtIOGPU *g = opaque;\n+\n+ virtio_gpu_virgl_push_async_fence(g, ctx_id, ring_idx, fence);\n+}\n+#endif\n+\n static virgl_renderer_gl_context\n virgl_create_context(void *opaque, int scanout_idx,\n struct virgl_renderer_gl_ctx_param *params)\n@@ -1193,6 +1307,8 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g)\n void virtio_gpu_virgl_reset(VirtIOGPU *g)\n {\n virgl_renderer_reset();\n+\n+ virtio_gpu_virgl_reset_async_fences(g);\n }\n \n int virtio_gpu_virgl_init(VirtIOGPU *g)\n@@ -1205,6 +1321,12 @@ int virtio_gpu_virgl_init(VirtIOGPU *g)\n if (qemu_egl_display) {\n virtio_gpu_3d_cbs.version = 4;\n virtio_gpu_3d_cbs.get_egl_display = virgl_get_egl_display;\n+#if VIRGL_CHECK_VERSION(1, 1, 2)\n+ virtio_gpu_3d_cbs.write_fence = virgl_write_async_fence;\n+ virtio_gpu_3d_cbs.write_context_fence = virgl_write_async_context_fence;\n+ flags |= VIRGL_RENDERER_ASYNC_FENCE_CB;\n+ flags |= VIRGL_RENDERER_THREAD_SYNC;\n+#endif\n }\n #endif\n #ifdef VIRGL_RENDERER_D3D11_SHARE_TEXTURE\n@@ -1238,6 +1360,11 @@ int virtio_gpu_virgl_init(VirtIOGPU *g)\n gl->cmdq_resume_bh = aio_bh_new(qemu_get_aio_context(),\n virtio_gpu_virgl_resume_cmdq_bh,\n g);\n+#if VIRGL_CHECK_VERSION(1, 1, 2)\n+ gl->async_fence_bh = aio_bh_new(qemu_get_aio_context(),\n+ virtio_gpu_virgl_async_fence_bh,\n+ g);\n+#endif\n #endif\n \n return 0;\ndiff --git a/include/hw/virtio/virtio-gpu.h b/include/hw/virtio/virtio-gpu.h\nindex 58e0f91fda65..16e9f6914f07 100644\n--- a/include/hw/virtio/virtio-gpu.h\n+++ b/include/hw/virtio/virtio-gpu.h\n@@ -233,6 +233,13 @@ struct VirtIOGPUClass {\n Error **errp);\n };\n \n+struct virtio_gpu_virgl_context_fence {\n+ uint32_t ctx_id;\n+ uint32_t ring_idx;\n+ uint64_t fence_id;\n+ QSLIST_ENTRY(virtio_gpu_virgl_context_fence) next;\n+};\n+\n /* VirtIOGPUGL renderer states */\n typedef enum {\n RS_START, /* starting state */\n@@ -250,6 +257,9 @@ struct VirtIOGPUGL {\n QEMUTimer *print_stats;\n \n QEMUBH *cmdq_resume_bh;\n+\n+ QEMUBH *async_fence_bh;\n+ QSLIST_HEAD(, virtio_gpu_virgl_context_fence) async_fenceq;\n };\n \n struct VhostUserGPU {\n@@ -379,5 +389,6 @@ void virtio_gpu_virgl_reset_scanout(VirtIOGPU *g);\n void virtio_gpu_virgl_reset(VirtIOGPU *g);\n int virtio_gpu_virgl_init(VirtIOGPU *g);\n GArray *virtio_gpu_virgl_get_capsets(VirtIOGPU *g);\n+void virtio_gpu_virgl_reset_async_fences(VirtIOGPU *g);\n \n #endif\ndiff --git a/meson.build b/meson.build\nindex 7b56a4b2775e..b72d28131891 100644\n--- a/meson.build\n+++ b/meson.build\n@@ -2515,6 +2515,8 @@ config_host_data.set('CONFIG_VNC_JPEG', jpeg.found())\n config_host_data.set('CONFIG_VNC_SASL', sasl.found())\n if virgl.found()\n config_host_data.set('VIRGL_VERSION_MAJOR', virgl.version().split('.')[0])\n+ config_host_data.set('VIRGL_VERSION_MINOR', virgl.version().split('.')[1])\n+ config_host_data.set('VIRGL_VERSION_MICRO', virgl.version().split('.')[2])\n endif\n config_host_data.set('CONFIG_VIRTFS', have_virtfs)\n config_host_data.set('CONFIG_VTE', vte.found())\n", "prefixes": [ "v17", "09/18" ] }