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GET /api/patches/2196916/?format=api
{ "id": 2196916, "url": "http://patchwork.ozlabs.org/api/patches/2196916/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260216-topic-sm8650-ayaneo-pocket-s2-base-v4-9-802c82795431@linaro.org/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260216-topic-sm8650-ayaneo-pocket-s2-base-v4-9-802c82795431@linaro.org>", "list_archive_url": null, "date": "2026-02-16T14:21:53", "name": "[v4,9/9] arm64: dts: qcom: add basic devicetree for Ayaneo Pocket S2 gaming console", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "3e8386a4a67f3efb4010bd7edc6402bb59305bb7", "submitter": { "id": 84903, "url": "http://patchwork.ozlabs.org/api/people/84903/?format=api", "name": "Neil Armstrong", "email": "neil.armstrong@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260216-topic-sm8650-ayaneo-pocket-s2-base-v4-9-802c82795431@linaro.org/mbox/", "series": [ { "id": 492314, "url": "http://patchwork.ozlabs.org/api/series/492314/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=492314", "date": "2026-02-16T14:21:44", "name": "arm64: dts: qcom: Add support for the Ayaneo Pocket S2", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/492314/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196916/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196916/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-47375-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", 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<neil.armstrong@linaro.org>", "Date": "Mon, 16 Feb 2026 15:21:53 +0100", "Subject": "[PATCH v4 9/9] arm64: dts: qcom: add basic devicetree for Ayaneo\n Pocket S2 gaming console", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "8bit", "Message-Id": "\n <20260216-topic-sm8650-ayaneo-pocket-s2-base-v4-9-802c82795431@linaro.org>", "References": "\n <20260216-topic-sm8650-ayaneo-pocket-s2-base-v4-0-802c82795431@linaro.org>", "In-Reply-To": "\n <20260216-topic-sm8650-ayaneo-pocket-s2-base-v4-0-802c82795431@linaro.org>", "To": "Greg Kroah-Hartman <gregkh@linuxfoundation.org>,\n Rob Herring <robh@kernel.org>, Krzysztof Kozlowski <krzk+dt@kernel.org>,\n Conor Dooley <conor+dt@kernel.org>,\n Geert Uytterhoeven <geert+renesas@glider.be>,\n Magnus Damm <magnus.damm@gmail.com>, Bartosz Golaszewski <brgl@kernel.org>,\n Manivannan Sadhasivam <mani@kernel.org>,\n Bjorn Helgaas <bhelgaas@google.com>, Bjorn Andersson <andersson@kernel.org>,\n Konrad Dybcio <konradybcio@kernel.org>", "Cc": "linux-usb@vger.kernel.org, devicetree@vger.kernel.org,\n linux-kernel@vger.kernel.org, linux-renesas-soc@vger.kernel.org,\n linux-pci@vger.kernel.org, linux-arm-msm@vger.kernel.org,\n Neil Armstrong <neil.armstrong@linaro.org>,\n KancyJoe <kancy2333@outlook.com>,\n Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=openpgp-sha256; l=41931;\n i=neil.armstrong@linaro.org; h=from:subject:message-id;\n bh=haRtb4oppRr0cqRPO9Rg/d5KuUauLClXFlpPYxVqvZA=;\n b=owEBbQKS/ZANAwAKAXfc29rIyEnRAcsmYgBpkyf+AOj2h5jsvWQLCYL41jEPOL6gGhWsvFwIZ6xQ\n U1ARfEmJAjMEAAEKAB0WIQQ9U8YmyFYF/h30LIt33NvayMhJ0QUCaZMn/gAKCRB33NvayMhJ0SidD/\n 9XBQX5YahOgstomVVHjOmkrLUuTERQn18kcdp3YUnXD6CnDMFyM5DndojT8pn8Nid+2ETw+XUQcvRp\n 5NPvMR51i5/a30dBZvHMOAw8hlJPq62V3P36pMQo8+iVmtSXa03wMHkPDjBH24m5yxPDg+SDPt6GpO\n f18UPKcdQLra8OeEwC6rKfh9xQ7nzDNnsk5HL6eNEupUwvulKATNp62r8Vw8M0vb4bvxGMpw2PNh8p\n dx3840XuUlYKgnQPopZEb5HMzGThfNp4bYLcVr5CJy0eQfNcT+KMs7KFXGlZl7EEMTuzqNls3i7kiL\n 2j5h7JnzgjJEXUuk91dtvMT8TqVMamg9VtdPDaZTXFrXaA2GlkbgGpEQutLTTWSML+LqKL+UjlvclT\n zqQzZdM8SwEIELCvfyQ7OyQCIrTaV6WxHDt+gh5q8yTlEwhbOTaZOdME7wzcXvmMMVu5HADNGk/DBk\n xwvXJsK3i9+fgyPd2Rn9fZ93PnSfGQsRnfNwfDWbBwvh6qURwo751/UZOdVcaR/inof1u0Y3PN69lo\n fplkDhMGs0FnJ/KknMyGwB1Z7bT/4jNCjDrhtlnleC3OYaHbyBpqiFHu/nguSGXPwF10NPcv7F7XFl\n b0sjcPtkIMy5cNva2+jnSxywHKOf0eIrOJFnLs6Wt9khRSLaljit643MH+AA==", "X-Developer-Key": "i=neil.armstrong@linaro.org; a=openpgp;\n fpr=89EC3D058446217450F22848169AB7B1A4CFF8AE" }, "content": "From: KancyJoe <kancy2333@outlook.com>\n\nAdd initial Device Tree for the Ayaneo Pocket S2 gaming console based\non the Qualcomm Snapdragon 8 Gen 3 platform.\n\nThe design is similar to a phone without the modem, the game control\nis handled via a standalone controller connected to a PCIe USB\ncontroller.\n\nDisplay panel support will be added in a second time.\n\nSigned-off-by: KancyJoe <kancy2333@outlook.com>\nReviewed-by: Konrad Dybcio <konrad.dybcio@oss.qualcomm.com>\nSigned-off-by: Neil Armstrong <neil.armstrong@linaro.org>\n---\n arch/arm64/boot/dts/qcom/Makefile | 1 +\n .../boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts | 1551 ++++++++++++++++++++\n arch/arm64/boot/dts/qcom/sm8650.dtsi | 46 +-\n 3 files changed, 1575 insertions(+), 23 deletions(-)", "diff": "diff --git a/arch/arm64/boot/dts/qcom/Makefile b/arch/arm64/boot/dts/qcom/Makefile\nindex 6f34d5ed331c..1ba29755e5ba 100644\n--- a/arch/arm64/boot/dts/qcom/Makefile\n+++ b/arch/arm64/boot/dts/qcom/Makefile\n@@ -313,6 +313,7 @@ dtb-$(CONFIG_ARCH_QCOM)\t+= sm8550-mtp.dtb\n dtb-$(CONFIG_ARCH_QCOM)\t+= sm8550-qrd.dtb\n dtb-$(CONFIG_ARCH_QCOM)\t+= sm8550-samsung-q5q.dtb\n dtb-$(CONFIG_ARCH_QCOM)\t+= sm8550-sony-xperia-yodo-pdx234.dtb\n+dtb-$(CONFIG_ARCH_QCOM)\t+= sm8650-ayaneo-pocket-s2.dtb\n \n sm8650-hdk-display-card-dtbs\t:= sm8650-hdk.dtb sm8650-hdk-display-card.dtbo\n \ndiff --git a/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts b/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts\nnew file mode 100644\nindex 000000000000..0dc994f4e48d\n--- /dev/null\n+++ b/arch/arm64/boot/dts/qcom/sm8650-ayaneo-pocket-s2.dts\n@@ -0,0 +1,1551 @@\n+// SPDX-License-Identifier: BSD-3-Clause\n+/*\n+ * Copyright (c) 2023, Linaro Limited\n+ * Copyright (c) 2025, Kancy Joe <kancy2333@outlook.com>\n+ */\n+\n+/dts-v1/;\n+\n+#include <dt-bindings/leds/common.h>\n+#include <dt-bindings/pinctrl/qcom,pmic-gpio.h>\n+#include <dt-bindings/regulator/qcom,rpmh-regulator.h>\n+#include \"sm8650.dtsi\"\n+#include \"pm8550.dtsi\"\n+#include \"pm8550b.dtsi\"\n+#define PMK8550VE_SID 8\n+#include \"pm8550ve.dtsi\"\n+#include \"pm8550vs.dtsi\"\n+#include \"pmk8550.dtsi\"\n+\n+/delete-node/ &rmtfs_mem;\n+/delete-node/ &hwfence_shbuf;\n+\n+/ {\n+\tmodel = \"AYANEO Pocket S2 (Pro)\";\n+\tcompatible = \"ayaneo,pocket-s2\", \"qcom,sm8650\";\n+\tchassis-type = \"handset\";\n+\n+\taliases {\n+\t\tserial0 = &uart15;\n+\t\tserial1 = &uart14;\n+\t};\n+\n+\twcd939x: audio-codec {\n+\t\tcompatible = \"qcom,wcd9395-codec\", \"qcom,wcd9390-codec\";\n+\n+\t\tpinctrl-0 = <&wcd_default>;\n+\t\tpinctrl-names = \"default\";\n+\n+\t\tqcom,micbias1-microvolt = <1800000>;\n+\t\tqcom,micbias2-microvolt = <1800000>;\n+\t\tqcom,micbias3-microvolt = <1800000>;\n+\t\tqcom,micbias4-microvolt = <1800000>;\n+\t\tqcom,mbhc-buttons-vthreshold-microvolt = <75000 150000 237000 500000 500000 500000 500000 500000>;\n+\t\tqcom,mbhc-headset-vthreshold-microvolt = <1700000>;\n+\t\tqcom,mbhc-headphone-vthreshold-microvolt = <50000>;\n+\t\tqcom,rx-device = <&wcd_rx>;\n+\t\tqcom,tx-device = <&wcd_tx>;\n+\n+\t\treset-gpios = <&tlmm 107 GPIO_ACTIVE_LOW>;\n+\n+\t\tvdd-buck-supply = <&vreg_l15b_1p8>;\n+\t\tvdd-rxtx-supply = <&vreg_l15b_1p8>;\n+\t\tvdd-io-supply = <&vreg_l15b_1p8>;\n+\t\tvdd-mic-bias-supply = <&vreg_bob1>;\n+\n+\t\t#sound-dai-cells = <1>;\n+\t};\n+\n+\tchosen {\n+\t\tstdout-path = \"serial0:115200n8\";\n+\t};\n+\n+\tfan: fan {\n+\t\tcompatible = \"pwm-fan\";\n+\n+\t\tinterrupts-extended = <&tlmm 14 IRQ_TYPE_EDGE_FALLING>;\n+\n+\t\tpwms = <&pm8550_pwm 3 50000>;\n+\n+\t\tfan-supply = <&fan_pwr>;\n+\n+\t\t#cooling-cells = <2>;\n+\t\tcooling-levels = <0 16 32 45 60 80 105 130 155 180 205 230 255>;\n+\n+\t\tpinctrl-0 = <&fan_int>, <&pwm_fan_ctrl_active>;\n+\t\tpinctrl-1 = <&pwm_fan_ctrl_sleep>;\n+\t\tpinctrl-names = \"default\", \"sleep\";\n+\t};\n+\n+\tfan_pwr: fan-pwr-regulator {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"fan_pwr\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\n+\t\tgpios = <&tlmm 125 GPIO_ACTIVE_HIGH>;\n+\t\tenable-active-high;\n+\n+\t\tvin-supply = <&fan_vdd>;\n+\n+\t\tpinctrl-0 = <&fan_pwr_pins>;\n+\t\tpinctrl-names = \"default\";\n+\t};\n+\n+\tfan_vdd: fan-vdd-regulator {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"fan_vdd\";\n+\t\tregulator-min-microvolt = <5000000>;\n+\t\tregulator-max-microvolt = <5000000>;\n+\n+\t\tgpios = <&tlmm 124 GPIO_ACTIVE_HIGH>;\n+\t\tenable-active-high;\n+\n+\t\tvin-supply = <&vph_pwr>;\n+\n+\t\tpinctrl-0 = <&fan_vdd_pins>;\n+\t\tpinctrl-names = \"default\";\n+\t};\n+\n+\tgpio-keys {\n+\t\tcompatible = \"gpio-keys\";\n+\n+\t\tpinctrl-0 = <&volume_up_n>;\n+\t\tpinctrl-names = \"default\";\n+\n+\t\tkey-volume-up {\n+\t\t\tlabel = \"Volume Up\";\n+\t\t\tlinux,code = <KEY_VOLUMEUP>;\n+\t\t\tgpios = <&pm8550_gpios 6 GPIO_ACTIVE_LOW>;\n+\t\t\tdebounce-interval = <15>;\n+\t\t\tlinux,can-disable;\n+\t\t\twakeup-source;\n+\t\t};\n+\t};\n+\n+\tpmic-glink {\n+\t\tcompatible = \"qcom,sm8650-pmic-glink\",\n+\t\t\t \"qcom,sm8550-pmic-glink\",\n+\t\t\t \"qcom,pmic-glink\";\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\torientation-gpios = <&tlmm 29 GPIO_ACTIVE_HIGH>;\n+\n+\t\tconnector@0 {\n+\t\t\tcompatible = \"usb-c-connector\";\n+\t\t\treg = <0>;\n+\n+\t\t\tpower-role = \"dual\";\n+\t\t\tdata-role = \"dual\";\n+\n+\t\t\tports {\n+\t\t\t\t#address-cells = <1>;\n+\t\t\t\t#size-cells = <0>;\n+\n+\t\t\t\tport@0 {\n+\t\t\t\t\treg = <0>;\n+\n+\t\t\t\t\tpmic_glink_hs_in: endpoint {\n+\t\t\t\t\t\tremote-endpoint = <&usb_1_dwc3_hs>;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\n+\t\t\t\tport@1 {\n+\t\t\t\t\treg = <1>;\n+\n+\t\t\t\t\tpmic_glink_ss_in: endpoint {\n+\t\t\t\t\t\tremote-endpoint = <&redriver_ss_out>;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\n+\t\t\t\tport@2 {\n+\t\t\t\t\treg = <2>;\n+\n+\t\t\t\t\tpmic_glink_sbu: endpoint {\n+\t\t\t\t\t\tremote-endpoint = <&wcd_usbss_sbu_mux>;\n+\t\t\t\t\t};\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n+\n+\tupd720201_avdd33_reg: upd720201-avdd33-regulator {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"upd720201_avdd33\";\n+\t\tregulator-min-microvolt = <3300000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\n+\t\tgpios = <&tlmm 123 GPIO_ACTIVE_HIGH>;\n+\t\tenable-active-high;\n+\n+\t\tvin-supply = <&vph_pwr>;\n+\n+\t\tpinctrl-0 = <&upd720201_avdd33>;\n+\t\tpinctrl-names = \"default\";\n+\t};\n+\n+\tupd720201_vdd10_reg: upd720201-vdd10-regulator {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"upd720201_vdd10\";\n+\t\tregulator-min-microvolt = <1050000>;\n+\t\tregulator-max-microvolt = <1050000>;\n+\n+\t\tgpios = <&tlmm 122 GPIO_ACTIVE_HIGH>;\n+\t\tenable-active-high;\n+\n+\t\tvin-supply = <&vph_pwr>;\n+\n+\t\tpinctrl-0 = <&upd720201_vdd10>;\n+\t\tpinctrl-names = \"default\";\n+\t};\n+\n+\tupd720201_vdd33_reg: upd720201-vdd33-regulator {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"upd720201_vdd33\";\n+\t\tregulator-min-microvolt = <3300000>;\n+\t\tregulator-max-microvolt = <3300000>;\n+\n+\t\tgpios = <&tlmm 121 GPIO_ACTIVE_HIGH>;\n+\t\tenable-active-high;\n+\n+\t\tvin-supply = <&vph_pwr>;\n+\n+\t\tpinctrl-0 = <&upd720201_vdd33>;\n+\t\tpinctrl-names = \"default\";\n+\t};\n+\n+\tsound {\n+\t\tcompatible = \"qcom,sm8650-sndcard\", \"qcom,sm8450-sndcard\";\n+\t\tmodel = \"SM8650-APS2\";\n+\t\taudio-routing = \"SpkrLeft IN\", \"WSA_SPK1 OUT\",\n+\t\t\t\t\"SpkrRight IN\", \"WSA_SPK2 OUT\",\n+\t\t\t\t\"IN1_HPHL\", \"HPHL_OUT\",\n+\t\t\t\t\"IN2_HPHR\", \"HPHR_OUT\",\n+\t\t\t\t\"AMIC1\", \"MIC BIAS1\",\n+\t\t\t\t\"AMIC2\", \"MIC BIAS2\",\n+\t\t\t\t\"AMIC3\", \"MIC BIAS3\",\n+\t\t\t\t\"AMIC4\", \"MIC BIAS3\",\n+\t\t\t\t\"AMIC5\", \"MIC BIAS4\",\n+\t\t\t\t\"TX SWR_INPUT0\", \"ADC1_OUTPUT\",\n+\t\t\t\t\"TX SWR_INPUT1\", \"ADC2_OUTPUT\",\n+\t\t\t\t\"TX SWR_INPUT7\", \"DMIC1_OUTPUT\",\n+\t\t\t\t\"TX SWR_INPUT8\", \"DMIC2_OUTPUT\";\n+\n+\t\twcd-playback-dai-link {\n+\t\t\tlink-name = \"WCD Playback\";\n+\n+\t\t\tcodec {\n+\t\t\t\tsound-dai = <&wcd939x 0>,\n+\t\t\t\t\t <&swr1 0>,\n+\t\t\t\t\t <&lpass_rxmacro 0>;\n+\t\t\t};\n+\n+\t\t\tcpu {\n+\t\t\t\tsound-dai = <&q6apmbedai RX_CODEC_DMA_RX_0>;\n+\t\t\t};\n+\n+\t\t\tplatform {\n+\t\t\t\tsound-dai = <&q6apm>;\n+\t\t\t};\n+\t\t};\n+\n+\t\twcd-capture-dai-link {\n+\t\t\tlink-name = \"WCD Capture\";\n+\t\t\tcodec {\n+\t\t\t\tsound-dai = <&wcd939x 1>,\n+\t\t\t\t\t <&swr2 0>,\n+\t\t\t\t\t <&lpass_txmacro 0>;\n+\t\t\t};\n+\n+\t\t\tcpu {\n+\t\t\t\tsound-dai = <&q6apmbedai TX_CODEC_DMA_TX_3>;\n+\t\t\t};\n+\n+\n+\t\t\tplatform {\n+\t\t\t\tsound-dai = <&q6apm>;\n+\t\t\t};\n+\t\t};\n+\n+\t\twsa-dai-link {\n+\t\t\tlink-name = \"WSA Playback\";\n+\n+\t\t\tcodec {\n+\t\t\t\tsound-dai = <&right_spkr>,\n+\t\t\t\t\t <&left_spkr>,\n+\t\t\t\t\t <&swr3 0>,\n+\t\t\t\t\t <&lpass_wsa2macro 0>;\n+\t\t\t};\n+\n+\t\t\tcpu {\n+\t\t\t\tsound-dai = <&q6apmbedai WSA_CODEC_DMA_RX_0>;\n+\t\t\t};\n+\n+\t\t\tplatform {\n+\t\t\t\tsound-dai = <&q6apm>;\n+\t\t\t};\n+\t\t};\n+\n+\t\tva-dai-link {\n+\t\t\tlink-name = \"VA Capture\";\n+\n+\t\t\tcodec {\n+\t\t\t\tsound-dai = <&lpass_vamacro 0>;\n+\t\t\t};\n+\n+\t\t\tcpu {\n+\t\t\t\tsound-dai = <&q6apmbedai VA_CODEC_DMA_TX_0>;\n+\t\t\t};\n+\n+\t\t\tplatform {\n+\t\t\t\tsound-dai = <&q6apm>;\n+\t\t\t};\n+\t\t};\n+\n+\t\tdp-dai-link {\n+\t\t\tlink-name = \"DisplayPort Playback\";\n+\n+\t\t\tcodec {\n+\t\t\t\tsound-dai = <&mdss_dp0>;\n+\t\t\t};\n+\n+\t\t\tcpu {\n+\t\t\t\tsound-dai = <&q6apmbedai DISPLAY_PORT_RX_0>;\n+\t\t\t};\n+\n+\t\t\tplatform {\n+\t\t\t\tsound-dai = <&q6apm>;\n+\t\t\t};\n+\t\t};\n+\t};\n+\n+\tvph_pwr: vph-pwr-regulator {\n+\t\tcompatible = \"regulator-fixed\";\n+\n+\t\tregulator-name = \"vph_pwr\";\n+\t\tregulator-min-microvolt = <3700000>;\n+\t\tregulator-max-microvolt = <3700000>;\n+\n+\t\tregulator-always-on;\n+\t\tregulator-boot-on;\n+\t};\n+\n+\twcn7850-pmu {\n+\t\tcompatible = \"qcom,wcn7850-pmu\";\n+\n+\t\tpinctrl-names = \"default\";\n+\t\tpinctrl-0 = <&wlan_en>, <&bt_default>;\n+\n+\t\twlan-enable-gpios = <&tlmm 16 GPIO_ACTIVE_HIGH>;\n+\t\tbt-enable-gpios = <&tlmm 17 GPIO_ACTIVE_HIGH>;\n+\n+\t\tvdd-supply = <&vreg_s4i_0p85>;\n+\t\tvddio-supply = <&vreg_l15b_1p8>;\n+\t\tvddio1p2-supply = <&vreg_l3c_1p2>;\n+\t\tvddaon-supply = <&vreg_s2c_0p8>;\n+\t\tvdddig-supply = <&vreg_s3c_0p9>;\n+\t\tvddrfa1p2-supply = <&vreg_s1c_1p2>;\n+\t\tvddrfa1p8-supply = <&vreg_s6c_1p8>;\n+\n+\t\tclocks = <&rpmhcc RPMH_RF_CLK1>;\n+\n+\t\tregulators {\n+\t\t\tvreg_pmu_rfa_cmn: ldo0 {\n+\t\t\t\tregulator-name = \"vreg_pmu_rfa_cmn\";\n+\t\t\t};\n+\n+\t\t\tvreg_pmu_aon_0p59: ldo1 {\n+\t\t\t\tregulator-name = \"vreg_pmu_aon_0p59\";\n+\t\t\t};\n+\n+\t\t\tvreg_pmu_wlcx_0p8: ldo2 {\n+\t\t\t\tregulator-name = \"vreg_pmu_wlcx_0p8\";\n+\t\t\t};\n+\n+\t\t\tvreg_pmu_wlmx_0p85: ldo3 {\n+\t\t\t\tregulator-name = \"vreg_pmu_wlmx_0p85\";\n+\t\t\t};\n+\n+\t\t\tvreg_pmu_btcmx_0p85: ldo4 {\n+\t\t\t\tregulator-name = \"vreg_pmu_btcmx_0p85\";\n+\t\t\t};\n+\n+\t\t\tvreg_pmu_rfa_0p8: ldo5 {\n+\t\t\t\tregulator-name = \"vreg_pmu_rfa_0p8\";\n+\t\t\t};\n+\n+\t\t\tvreg_pmu_rfa_1p2: ldo6 {\n+\t\t\t\tregulator-name = \"vreg_pmu_rfa_1p2\";\n+\t\t\t};\n+\n+\t\t\tvreg_pmu_rfa_1p8: ldo7 {\n+\t\t\t\tregulator-name = \"vreg_pmu_rfa_1p8\";\n+\t\t\t};\n+\n+\t\t\tvreg_pmu_pcie_0p9: ldo8 {\n+\t\t\t\tregulator-name = \"vreg_pmu_pcie_0p9\";\n+\t\t\t};\n+\n+\t\t\tvreg_pmu_pcie_1p8: ldo9 {\n+\t\t\t\tregulator-name = \"vreg_pmu_pcie_1p8\";\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&apps_rsc {\n+\tregulators-0 {\n+\t\tcompatible = \"qcom,pm8550-rpmh-regulators\";\n+\n+\t\tvdd-bob1-supply = <&vph_pwr>;\n+\t\tvdd-bob2-supply = <&vph_pwr>;\n+\t\tvdd-l2-l13-l14-supply = <&vreg_bob1>;\n+\t\tvdd-l3-supply = <&vreg_s1c_1p2>;\n+\t\tvdd-l5-l16-supply = <&vreg_bob1>;\n+\t\tvdd-l6-l7-supply = <&vreg_bob1>;\n+\t\tvdd-l8-l9-supply = <&vreg_bob1>;\n+\t\tvdd-l11-supply = <&vreg_s1c_1p2>;\n+\t\tvdd-l12-supply = <&vreg_s6c_1p8>;\n+\t\tvdd-l15-supply = <&vreg_s6c_1p8>;\n+\t\tvdd-l17-supply = <&vreg_bob2>;\n+\n+\t\tqcom,pmic-id = \"b\";\n+\n+\t\tvreg_bob1: bob1 {\n+\t\t\tregulator-name = \"vreg_bob1\";\n+\t\t\tregulator-min-microvolt = <3296000>;\n+\t\t\tregulator-max-microvolt = <3960000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_bob2: bob2 {\n+\t\t\tregulator-name = \"vreg_bob2\";\n+\t\t\tregulator-min-microvolt = <2720000>;\n+\t\t\tregulator-max-microvolt = <3008000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l2b_3p0: ldo2 {\n+\t\t\tregulator-name = \"vreg_l2b_3p0\";\n+\t\t\tregulator-min-microvolt = <3008000>;\n+\t\t\tregulator-max-microvolt = <3008000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l5b_3p1: ldo5 {\n+\t\t\tregulator-name = \"vreg_l5b_3p1\";\n+\t\t\tregulator-min-microvolt = <3104000>;\n+\t\t\tregulator-max-microvolt = <3104000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l6b_1p8: ldo6 {\n+\t\t\tregulator-name = \"vreg_l6b_1p8\";\n+\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\tregulator-max-microvolt = <3008000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l7b_1p8: ldo7 {\n+\t\t\tregulator-name = \"vreg_l7b_1p8\";\n+\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\tregulator-max-microvolt = <3008000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l8b_1p8: ldo8 {\n+\t\t\tregulator-name = \"vreg_l8b_1p8\";\n+\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\tregulator-max-microvolt = <3008000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l9b_2p9: ldo9 {\n+\t\t\tregulator-name = \"vreg_l9b_2p9\";\n+\t\t\tregulator-min-microvolt = <2960000>;\n+\t\t\tregulator-max-microvolt = <3008000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l11b_1p2: ldo11 {\n+\t\t\tregulator-name = \"vreg_l11b_1p2\";\n+\t\t\tregulator-min-microvolt = <1200000>;\n+\t\t\tregulator-max-microvolt = <1504000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l12b_1p8: ldo12 {\n+\t\t\tregulator-name = \"vreg_l12b_1p8\";\n+\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\tregulator-max-microvolt = <1800000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l13b_3p0: ldo13 {\n+\t\t\tregulator-name = \"vreg_l13b_3p0\";\n+\t\t\tregulator-min-microvolt = <3000000>;\n+\t\t\tregulator-max-microvolt = <3000000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l14b_3p2: ldo14 {\n+\t\t\tregulator-name = \"vreg_l14b_3p2\";\n+\t\t\tregulator-min-microvolt = <3200000>;\n+\t\t\tregulator-max-microvolt = <3200000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l15b_1p8: ldo15 {\n+\t\t\tregulator-name = \"vreg_l15b_1p8\";\n+\t\t\tregulator-min-microvolt = <1800000>;\n+\t\t\tregulator-max-microvolt = <1800000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l16b_2p8: ldo16 {\n+\t\t\tregulator-name = \"vreg_l16b_2p8\";\n+\t\t\tregulator-min-microvolt = <2800000>;\n+\t\t\tregulator-max-microvolt = <2800000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-always-on;\n+\t\t\tregulator-boot-on;\n+\t\t};\n+\n+\t\tvreg_l17b_2p5: ldo17 {\n+\t\t\tregulator-name = \"vreg_l17b_2p5\";\n+\t\t\tregulator-min-microvolt = <2504000>;\n+\t\t\tregulator-max-microvolt = <2504000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\t};\n+\n+\tregulators-1 {\n+\t\tcompatible = \"qcom,pm8550vs-rpmh-regulators\";\n+\n+\t\tvdd-l1-supply = <&vreg_s1c_1p2>;\n+\t\tvdd-l2-supply = <&vreg_s1c_1p2>;\n+\t\tvdd-l3-supply = <&vreg_s1c_1p2>;\n+\t\tvdd-s1-supply = <&vph_pwr>;\n+\t\tvdd-s2-supply = <&vph_pwr>;\n+\t\tvdd-s3-supply = <&vph_pwr>;\n+\t\tvdd-s4-supply = <&vph_pwr>;\n+\t\tvdd-s5-supply = <&vph_pwr>;\n+\t\tvdd-s6-supply = <&vph_pwr>;\n+\n+\t\tqcom,pmic-id = \"c\";\n+\n+\t\tvreg_s1c_1p2: smps1 {\n+\t\t\tregulator-name = \"vreg_s1c_1p2\";\n+\t\t\tregulator-min-microvolt = <1256000>;\n+\t\t\tregulator-max-microvolt = <1348000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_s2c_0p8: smps2 {\n+\t\t\tregulator-name = \"vreg_s2c_0p8\";\n+\t\t\tregulator-min-microvolt = <852000>;\n+\t\t\tregulator-max-microvolt = <1036000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_s3c_0p9: smps3 {\n+\t\t\tregulator-name = \"vreg_s3c_0p9\";\n+\t\t\tregulator-min-microvolt = <976000>;\n+\t\t\tregulator-max-microvolt = <1064000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_s4c_1p2: smps4 {\n+\t\t\tregulator-name = \"vreg_s4c_1p2\";\n+\t\t\tregulator-min-microvolt = <1224000>;\n+\t\t\tregulator-max-microvolt = <1280000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_s5c_0p7: smps5 {\n+\t\t\tregulator-name = \"vreg_s5c_0p7\";\n+\t\t\tregulator-min-microvolt = <752000>;\n+\t\t\tregulator-max-microvolt = <900000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_s6c_1p8: smps6 {\n+\t\t\tregulator-name = \"vreg_s6c_1p8\";\n+\t\t\tregulator-min-microvolt = <1856000>;\n+\t\t\tregulator-max-microvolt = <2000000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l1c_1p2: ldo1 {\n+\t\t\tregulator-name = \"vreg_l1c_1p2\";\n+\t\t\tregulator-min-microvolt = <1200000>;\n+\t\t\tregulator-max-microvolt = <1200000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l3c_1p2: ldo3 {\n+\t\t\tregulator-name = \"vreg_l3c_1p2\";\n+\t\t\tregulator-min-microvolt = <1200000>;\n+\t\t\tregulator-max-microvolt = <1200000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-always-on;\n+\t\t\tregulator-boot-on;\n+\t\t};\n+\t};\n+\n+\tregulators-2 {\n+\t\tcompatible = \"qcom,pm8550vs-rpmh-regulators\";\n+\n+\t\tvdd-l1-supply = <&vreg_s3c_0p9>;\n+\n+\t\tqcom,pmic-id = \"d\";\n+\n+\t\tvreg_l1d_0p88: ldo1 {\n+\t\t\tregulator-name = \"vreg_l1d_0p88\";\n+\t\t\tregulator-min-microvolt = <912000>;\n+\t\t\tregulator-max-microvolt = <920000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\t};\n+\n+\tregulators-3 {\n+\t\tcompatible = \"qcom,pm8550vs-rpmh-regulators\";\n+\n+\t\tvdd-l3-supply = <&vreg_s3c_0p9>;\n+\n+\t\tqcom,pmic-id = \"e\";\n+\n+\t\tvreg_l3e_0p9: ldo3 {\n+\t\t\tregulator-name = \"vreg_l3e_0p9\";\n+\t\t\tregulator-min-microvolt = <880000>;\n+\t\t\tregulator-max-microvolt = <920000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\t};\n+\n+\tregulators-4 {\n+\t\tcompatible = \"qcom,pm8550vs-rpmh-regulators\";\n+\n+\t\tvdd-l1-supply = <&vreg_s3c_0p9>;\n+\t\tvdd-l3-supply = <&vreg_s3c_0p9>;\n+\n+\t\tqcom,pmic-id = \"g\";\n+\n+\t\tvreg_l1g_0p91: ldo1 {\n+\t\t\tregulator-name = \"vreg_l1g_0p91\";\n+\t\t\tregulator-min-microvolt = <912000>;\n+\t\t\tregulator-max-microvolt = <920000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l3g_0p91: ldo3 {\n+\t\t\tregulator-name = \"vreg_l3g_0p91\";\n+\t\t\tregulator-min-microvolt = <880000>;\n+\t\t\tregulator-max-microvolt = <912000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\t};\n+\n+\tregulators-5 {\n+\t\tcompatible = \"qcom,pm8550ve-rpmh-regulators\";\n+\n+\t\tvdd-l1-supply = <&vreg_s3c_0p9>;\n+\t\tvdd-l2-supply = <&vreg_s3c_0p9>;\n+\t\tvdd-l3-supply = <&vreg_s1c_1p2>;\n+\t\tvdd-s4-supply = <&vph_pwr>;\n+\n+\t\tqcom,pmic-id = \"i\";\n+\n+\t\tvreg_s4i_0p85: smps4 {\n+\t\t\tregulator-name = \"vreg_s4i_0p85\";\n+\t\t\tregulator-min-microvolt = <852000>;\n+\t\t\tregulator-max-microvolt = <1004000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l1i_0p88: ldo1 {\n+\t\t\tregulator-name = \"vreg_l1i_0p88\";\n+\t\t\tregulator-min-microvolt = <880000>;\n+\t\t\tregulator-max-microvolt = <912000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l2i_0p88: ldo2 {\n+\t\t\tregulator-name = \"vreg_l2i_0p88\";\n+\t\t\tregulator-min-microvolt = <880000>;\n+\t\t\tregulator-max-microvolt = <912000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\n+\t\tvreg_l3i_1p2: ldo3 {\n+\t\t\tregulator-name = \"vreg_l3i_0p91\";\n+\t\t\tregulator-min-microvolt = <1200000>;\n+\t\t\tregulator-max-microvolt = <1200000>;\n+\t\t\tregulator-initial-mode = <RPMH_REGULATOR_MODE_HPM>;\n+\t\t\tregulator-allow-set-load;\n+\t\t\tregulator-allowed-modes = <RPMH_REGULATOR_MODE_LPM\n+\t\t\t\t\t\t RPMH_REGULATOR_MODE_HPM>;\n+\t\t};\n+\t};\n+};\n+\n+&cpu2_top_thermal {\n+\ttrips {\n+\t\tcpu2_active: cpu2-active {\n+\t\t\ttemperature = <38000>;\n+\t\t\thysteresis = <2000>;\n+\t\t\ttype = \"active\";\n+\t\t};\n+\t};\n+\n+\tcooling-maps {\n+\t\tmap {\n+\t\t\ttrip = <&cpu2_active>;\n+\t\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t\t};\n+\t};\n+};\n+\n+&cpu3_top_thermal {\n+\ttrips {\n+\t\tcpu3_active: cpu3-active {\n+\t\t\ttemperature = <38000>;\n+\t\t\thysteresis = <2000>;\n+\t\t\ttype = \"active\";\n+\t\t};\n+\t};\n+\n+\tcooling-maps {\n+\t\tmap {\n+\t\t\ttrip = <&cpu3_active>;\n+\t\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t\t};\n+\t};\n+};\n+\n+&cpu4_top_thermal {\n+\ttrips {\n+\t\tcpu4_active: cpu4-active {\n+\t\t\ttemperature = <38000>;\n+\t\t\thysteresis = <2000>;\n+\t\t\ttype = \"active\";\n+\t\t};\n+\t};\n+\n+\tcooling-maps {\n+\t\tmap {\n+\t\t\ttrip = <&cpu4_active>;\n+\t\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t\t};\n+\t};\n+};\n+\n+&cpu5_top_thermal {\n+\ttrips {\n+\t\tcpu5_active: cpu5-active {\n+\t\t\ttemperature = <38000>;\n+\t\t\thysteresis = <2000>;\n+\t\t\ttype = \"active\";\n+\t\t};\n+\t};\n+\n+\tcooling-maps {\n+\t\tmap {\n+\t\t\ttrip = <&cpu5_active>;\n+\t\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t\t};\n+\t};\n+};\n+\n+&cpu6_top_thermal {\n+\ttrips {\n+\t\tcpu6_active: cpu6-active {\n+\t\t\ttemperature = <38000>;\n+\t\t\thysteresis = <2000>;\n+\t\t\ttype = \"active\";\n+\t\t};\n+\t};\n+\n+\tcooling-maps {\n+\t\tmap {\n+\t\t\ttrip = <&cpu6_active>;\n+\t\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t\t};\n+\t};\n+};\n+\n+&cpu7_top_thermal {\n+\ttrips {\n+\t\tcpu7_active: cpu7-active {\n+\t\t\ttemperature = <38000>;\n+\t\t\thysteresis = <2000>;\n+\t\t\ttype = \"active\";\n+\t\t};\n+\t};\n+\n+\tcooling-maps {\n+\t\tmap {\n+\t\t\ttrip = <&cpu7_active>;\n+\t\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t\t};\n+\t};\n+};\n+\n+&gpi_dma1 {\n+\tstatus = \"okay\";\n+};\n+\n+&gpi_dma2 {\n+\tstatus = \"okay\";\n+};\n+\n+&gpu0_cooling_maps {\n+\tmap1 {\n+\t\ttrip = <&gpu0_active>;\n+\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t};\n+};\n+\n+&gpu1_cooling_maps {\n+\tmap1 {\n+\t\ttrip = <&gpu1_active>;\n+\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t};\n+};\n+\n+&gpu2_cooling_maps {\n+\tmap1 {\n+\t\ttrip = <&gpu2_active>;\n+\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t};\n+};\n+\n+&gpu3_cooling_maps {\n+\tmap1 {\n+\t\ttrip = <&gpu3_active>;\n+\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t};\n+};\n+\n+&gpu4_cooling_maps {\n+\tmap1 {\n+\t\ttrip = <&gpu4_active>;\n+\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t};\n+};\n+\n+&gpu5_cooling_maps {\n+\tmap1 {\n+\t\ttrip = <&gpu5_active>;\n+\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t};\n+};\n+\n+&gpu6_cooling_maps {\n+\tmap1 {\n+\t\ttrip = <&gpu6_active>;\n+\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t};\n+};\n+\n+&gpu7_cooling_maps {\n+\tmap1 {\n+\t\ttrip = <&gpu7_active>;\n+\t\tcooling-device = <&fan THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n+\t};\n+};\n+\n+&gpu0_trips {\n+\tgpu0_active: trip-active {\n+\t\ttemperature = <38000>;\n+\t\thysteresis = <2000>;\n+\t\ttype = \"active\";\n+\t};\n+};\n+\n+&gpu1_trips {\n+\tgpu1_active: trip-active {\n+\t\ttemperature = <38000>;\n+\t\thysteresis = <2000>;\n+\t\ttype = \"active\";\n+\t};\n+};\n+\n+&gpu2_trips {\n+\tgpu2_active: trip-active {\n+\t\ttemperature = <38000>;\n+\t\thysteresis = <2000>;\n+\t\ttype = \"active\";\n+\t};\n+};\n+\n+&gpu3_trips {\n+\tgpu3_active: trip-active {\n+\t\ttemperature = <38000>;\n+\t\thysteresis = <2000>;\n+\t\ttype = \"active\";\n+\t};\n+};\n+\n+&gpu4_trips {\n+\tgpu4_active: trip-active {\n+\t\ttemperature = <38000>;\n+\t\thysteresis = <2000>;\n+\t\ttype = \"active\";\n+\t};\n+};\n+\n+&gpu5_trips {\n+\tgpu5_active: trip-active {\n+\t\ttemperature = <38000>;\n+\t\thysteresis = <2000>;\n+\t\ttype = \"active\";\n+\t};\n+};\n+\n+&gpu6_trips {\n+\tgpu6_active: trip-active {\n+\t\ttemperature = <38000>;\n+\t\thysteresis = <2000>;\n+\t\ttype = \"active\";\n+\t};\n+\n+};\n+\n+&gpu7_trips {\n+\tgpu7_active: trip-active {\n+\t\ttemperature = <38000>;\n+\t\thysteresis = <2000>;\n+\t\ttype = \"active\";\n+\t};\n+};\n+\n+&i2c3 {\n+\tclock-frequency = <100000>;\n+\n+\tstatus = \"okay\";\n+\n+\twcd_usbss: typec-mux@e {\n+\t\tcompatible = \"qcom,wcd9395-usbss\", \"qcom,wcd9390-usbss\";\n+\t\treg = <0xe>;\n+\n+\t\tvdd-supply = <&vreg_l15b_1p8>;\n+\t\treset-gpios = <&tlmm 152 GPIO_ACTIVE_HIGH>;\n+\n+\t\tmode-switch;\n+\t\torientation-switch;\n+\n+\t\tports {\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tport@0 {\n+\t\t\t\treg = <0>;\n+\n+\t\t\t\twcd_usbss_sbu_mux: endpoint {\n+\t\t\t\t\tremote-endpoint = <&pmic_glink_sbu>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&i2c6 {\n+\tclock-frequency = <100000>;\n+\n+\tstatus = \"okay\";\n+\n+\ttypec-mux@1c {\n+\t\tcompatible = \"onnn,nb7vpq904m\";\n+\t\treg = <0x1c>;\n+\n+\t\tvcc-supply = <&vreg_l15b_1p8>;\n+\n+\t\tretimer-switch;\n+\t\torientation-switch;\n+\n+\t\tports {\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\n+\t\t\tport@0 {\n+\t\t\t\treg = <0>;\n+\n+\t\t\t\tredriver_ss_out: endpoint {\n+\t\t\t\t\tremote-endpoint = <&pmic_glink_ss_in>;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tport@1 {\n+\t\t\t\treg = <1>;\n+\n+\t\t\t\tredriver_ss_in: endpoint {\n+\t\t\t\t\tremote-endpoint = <&usb_dp_qmpphy_out>;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n+\t};\n+};\n+\n+&iris {\n+\tstatus = \"okay\";\n+};\n+\n+&lpass_wsa2macro {\n+\tstatus = \"okay\";\n+};\n+\n+&mdss {\n+\tstatus = \"okay\";\n+};\n+\n+&mdss_dp0 {\n+\tstatus = \"okay\";\n+};\n+\n+&mdss_dp0_out {\n+\tstatus = \"okay\";\n+};\n+\n+&pcie0 {\n+\twake-gpios = <&tlmm 96 GPIO_ACTIVE_HIGH>;\n+\tperst-gpios = <&tlmm 94 GPIO_ACTIVE_LOW>;\n+\n+\tpinctrl-0 = <&pcie0_default_state>;\n+\tpinctrl-names = \"default\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&pcieport0 {\n+\twifi@0 {\n+\t\tcompatible = \"pci17cb,1107\";\n+\t\treg = <0x10000 0x0 0x0 0x0 0x0>;\n+\n+\t\tvddrfacmn-supply = <&vreg_pmu_rfa_cmn>;\n+\t\tvddaon-supply = <&vreg_pmu_aon_0p59>;\n+\t\tvddwlcx-supply = <&vreg_pmu_wlcx_0p8>;\n+\t\tvddwlmx-supply = <&vreg_pmu_wlmx_0p85>;\n+\t\tvddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;\n+\t\tvddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;\n+\t\tvddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;\n+\t\tvddpcie0p9-supply = <&vreg_pmu_pcie_0p9>;\n+\t\tvddpcie1p8-supply = <&vreg_pmu_pcie_1p8>;\n+\t};\n+};\n+\n+&pcie0_phy {\n+\tvdda-phy-supply = <&vreg_l1i_0p88>;\n+\tvdda-pll-supply = <&vreg_l3i_1p2>;\n+\n+\tstatus = \"okay\";\n+};\n+\n+&pcie1 {\n+\twake-gpios = <&tlmm 99 GPIO_ACTIVE_HIGH>;\n+\tperst-gpios = <&tlmm 97 GPIO_ACTIVE_LOW>;\n+\n+\tpinctrl-0 = <&pcie1_default_state>;\n+\tpinctrl-names = \"default\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&pcie1_port0 {\n+\t/* Renesas μPD720201 PCIe USB3.0 HOST CONTROLLER */\n+\tusb-controller@0 {\n+\t\tcompatible = \"pci1912,0014\";\n+\t\treg = <0x10000 0x0 0x0 0x0 0x0>;\n+\n+\t\tavdd33-supply = <&upd720201_avdd33_reg>;\n+\t\tvdd10-supply = <&upd720201_vdd10_reg>;\n+\t\tvdd33-supply = <&upd720201_vdd33_reg>;\n+\n+\t\tpinctrl-0 = <&gamepad_pwr_en>;\n+\t\tpinctrl-names = \"default\";\n+\t};\n+};\n+\n+&pcie1_phy {\n+\tvdda-phy-supply = <&vreg_l3e_0p9>;\n+\tvdda-pll-supply = <&vreg_l3i_1p2>;\n+\tvdda-qref-supply = <&vreg_l1i_0p88>;\n+\n+\tstatus = \"okay\";\n+};\n+\n+&pon_pwrkey {\n+\tstatus = \"okay\";\n+};\n+\n+&pon_resin {\n+\tlinux,code = <KEY_VOLUMEDOWN>;\n+\n+\tstatus = \"okay\";\n+};\n+\n+&pm8550_gpios {\n+\tvolume_up_n: volume-up-n-state {\n+\t\tpins = \"gpio6\";\n+\t\tfunction = \"normal\";\n+\t\tbias-pull-up;\n+\t\tinput-enable;\n+\t\tpower-source = <1>;\n+\t};\n+\n+\tpwm_fan_ctrl_active: pwm-fan-ctrl-active-state {\n+\t\tpins = \"gpio9\";\n+\t\tfunction = \"func1\";\n+\t\tbias-disable;\n+\t\tpower-source = <0>;\n+\t\tqcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;\n+\t};\n+\n+\tpwm_fan_ctrl_sleep: pwm-fan-ctrl-sleep-state {\n+\t\tpins = \"gpio9\";\n+\t\tfunction = \"normal\";\n+\t\toutput-high;\n+\t\tbias-disable;\n+\t\tpower-source = <0>;\n+\t\tqcom,drive-strength = <PMIC_GPIO_STRENGTH_LOW>;\n+\t};\n+\n+\tsdc2_card_det_n: sdc2-card-det-state {\n+\t\tpins = \"gpio12\";\n+\t\tfunction = \"normal\";\n+\t\tbias-pull-up;\n+\t\tinput-enable;\n+\t\toutput-disable;\n+\t\tpower-source = <1>; /* 1.8 V */\n+\t};\n+};\n+\n+&pm8550_pwm {\n+\tstatus = \"okay\";\n+\n+\tmulti-led {\n+\t\tcolor = <LED_COLOR_ID_RGB>;\n+\t\tfunction = LED_FUNCTION_STATUS;\n+\t\tlabel = \"Power Status\";\n+\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <0>;\n+\n+\t\tled@1 {\n+\t\t\treg = <1>;\n+\t\t\tcolor = <LED_COLOR_ID_RED>;\n+\t\t};\n+\n+\t\tled@2 {\n+\t\t\treg = <2>;\n+\t\t\tcolor = <LED_COLOR_ID_GREEN>;\n+\t\t};\n+\n+\t\tled@3 {\n+\t\t\treg = <3>;\n+\t\t\tcolor = <LED_COLOR_ID_BLUE>;\n+\t\t};\n+\t};\n+};\n+\n+&pm8550b_eusb2_repeater {\n+\tvdd18-supply = <&vreg_l15b_1p8>;\n+\tvdd3-supply = <&vreg_l5b_3p1>;\n+};\n+\n+&qup_i2c3_data_clk {\n+\t/* Use internal I2C pull-up */\n+\tbias-pull-up = <2200>;\n+};\n+\n+&qupv3_id_0 {\n+\tstatus = \"okay\";\n+};\n+\n+&qupv3_id_1 {\n+\tstatus = \"okay\";\n+};\n+\n+&remoteproc_adsp {\n+\tfirmware-name = \"qcom/sm8650/ayaneo/ps2/adsp.mbn\",\n+\t\t\t\"qcom/sm8650/ayaneo/ps2/adsp_dtb.mbn\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&remoteproc_cdsp {\n+\tfirmware-name = \"qcom/sm8650/ayaneo/ps2/cdsp.mbn\",\n+\t\t\t\"qcom/sm8650/ayaneo/ps2/cdsp_dtb.mbn\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&reserved_memory {\n+\tlost_reg_mem: lost-reg-mem {\n+\t\treg = <0 0x9b09c000 0 0x4000>;\n+\t\tno-map;\n+\t};\n+\n+\thwfence_shbuf: hwfence-shbuf@d4e23000 {\n+\t\treg = <0 0xd4e23000 0 0x2dd000>;\n+\t\tno-map;\n+\t};\n+\n+\tsplash_region: splash-region {\n+\t\tlabel = \"cont_splash_region\";\n+\t\treg = <0 0xd5100000 0 0x2b00000>;\n+\t\tno-map;\n+\t};\n+};\n+\n+&sdhc_2 {\n+\tcd-gpios = <&pm8550_gpios 12 GPIO_ACTIVE_LOW>;\n+\n+\tvmmc-supply = <&vreg_l9b_2p9>;\n+\tvqmmc-supply = <&vreg_l8b_1p8>;\n+\tbus-width = <4>;\n+\tno-sdio;\n+\tno-mmc;\n+\n+\tpinctrl-0 = <&sdc2_default>, <&sdc2_card_det_n>;\n+\tpinctrl-1 = <&sdc2_sleep>, <&sdc2_card_det_n>;\n+\tpinctrl-names = \"default\", \"sleep\";\n+\n+\tstatus = \"okay\";\n+};\n+\n+&sleep_clk {\n+\tclock-frequency = <32764>;\n+};\n+\n+&swr1 {\n+\tstatus = \"okay\";\n+\n+\t/* WCD9395 RX */\n+\twcd_rx: codec@0,4 {\n+\t\tcompatible = \"sdw20217010e00\";\n+\t\treg = <0 4>;\n+\n+\t\t/*\n+\t\t * WCD9395 RX Port 1 (HPH_L/R) <=> SWR1 Port 1 (HPH_L/R)\n+\t\t * WCD9395 RX Port 2 (CLSH) <=> SWR1 Port 2 (CLSH)\n+\t\t * WCD9395 RX Port 3 (COMP_L/R) <=> SWR1 Port 3 (COMP_L/R)\n+\t\t * WCD9395 RX Port 4 (LO) <=> SWR1 Port 4 (LO)\n+\t\t * WCD9395 RX Port 5 (DSD_L/R) <=> SWR1 Port 5 (DSD_L/R)\n+\t\t * WCD9395 RX Port 6 (HIFI_PCM_L/R) <=> SWR1 Port 9 (HIFI_PCM_L/R)\n+\t\t */\n+\t\tqcom,rx-port-mapping = <1 2 3 4 5 9>;\n+\t};\n+};\n+\n+&swr2 {\n+\tstatus = \"okay\";\n+\n+\t/* WCD9395 TX */\n+\twcd_tx: codec@0,3 {\n+\t\tcompatible = \"sdw20217010e00\";\n+\t\treg = <0 3>;\n+\n+\t\t/*\n+\t\t * WCD9395 TX Port 1 (ADC1,2,3,4) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)\n+\t\t * WCD9395 TX Port 2 (ADC3,4 & DMIC0,1) <=> SWR2 Port 2 (TX SWR_INPUT 0,1,2,3)\n+\t\t * WCD9395 TX Port 3 (DMIC0,1,2,3 & MBHC) <=> SWR2 Port 3 (TX SWR_INPUT 4,5,6,7)\n+\t\t * WCD9395 TX Port 4 (DMIC4,5,6,7) <=> SWR2 Port 4 (TX SWR_INPUT 8,9,10,11)\n+\t\t */\n+\t\tqcom,tx-port-mapping = <2 2 3 4>;\n+\t};\n+};\n+\n+&swr3 {\n+\tstatus = \"okay\";\n+\n+\tpinctrl-0 = <&wsa2_swr_active>, <&spkr_23_sd_n_active>;\n+\tpinctrl-names = \"default\";\n+\n+\t/* WSA8845, Speaker Left */\n+\tleft_spkr: speaker@0,0 {\n+\t\tcompatible = \"sdw20217020400\";\n+\t\treg = <0 0>;\n+\t\t#sound-dai-cells = <0>;\n+\t\treset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;\n+\t\tsound-name-prefix = \"SpkrLeft\";\n+\t\tvdd-1p8-supply = <&vreg_l15b_1p8>;\n+\t\tvdd-io-supply = <&vreg_l3c_1p2>;\n+\n+\t\t/*\n+\t\t * WSA8845 Port 1 (DAC) <=> SWR3 Port 1 (SPKR_L)\n+\t\t * WSA8845 Port 2 (COMP) <=> SWR3 Port 2 (SPKR_L_COMP)\n+\t\t * WSA8845 Port 3 (BOOST) <=> SWR3 Port 3 (SPKR_L_BOOST)\n+\t\t * WSA8845 Port 4 (PBR) <=> SWR3 Port 7 (PBR)\n+\t\t * WSA8845 Port 5 (VISENSE) <=> SWR3 Port 10 (SPKR_L_VI)\n+\t\t * WSA8845 Port 6 (CPS) <=> SWR3 Port 13 (CPS)\n+\t\t */\n+\t\tqcom,port-mapping = <1 2 3 7 10 13>;\n+\t};\n+\n+\t/* WSA8845, Speaker Right */\n+\tright_spkr: speaker@0,1 {\n+\t\tcompatible = \"sdw20217020400\";\n+\t\treg = <0 1>;\n+\t\t#sound-dai-cells = <0>;\n+\t\treset-gpios = <&tlmm 77 GPIO_ACTIVE_LOW>;\n+\t\tsound-name-prefix = \"SpkrRight\";\n+\t\tvdd-1p8-supply = <&vreg_l15b_1p8>;\n+\t\tvdd-io-supply = <&vreg_l3c_1p2>;\n+\n+\t\t/*\n+\t\t * WSA8845 Port 1 (DAC) <=> SWR3 Port 4 (SPKR_R)\n+\t\t * WSA8845 Port 2 (COMP) <=> SWR3 Port 5 (SPKR_R_COMP)\n+\t\t * WSA8845 Port 3 (BOOST) <=> SWR3 Port 6 (SPKR_R_BOOST)\n+\t\t * WSA8845 Port 4 (PBR) <=> SWR3 Port 7 (PBR)\n+\t\t * WSA8845 Port 5 (VISENSE) <=> SWR3 Port 11 (SPKR_R_VI)\n+\t\t * WSA8845 Port 6 (CPS) <=> SWR3 Port 13 (CPS)\n+\t\t */\n+\t\tqcom,port-mapping = <4 5 6 7 11 13>;\n+\t};\n+};\n+\n+&tlmm {\n+\t/* Reserved I/Os for NFC */\n+\tgpio-reserved-ranges = <32 4>, <36 1>, <38 6>, <74 1>;\n+\n+\tbt_default: bt-default-state {\n+\t\tbt-en-pins {\n+\t\t\tpins = \"gpio17\";\n+\t\t\tfunction = \"gpio\";\n+\t\t\tdrive-strength = <16>;\n+\t\t\tbias-disable;\n+\t\t};\n+\n+\t\tsw-ctrl-pins {\n+\t\t\tpins = \"gpio18\";\n+\t\t\tfunction = \"gpio\";\n+\t\t\tbias-pull-down;\n+\t\t};\n+\t};\n+\n+\tfan_pwr_pins: fan-pwr-state {\n+\t\tpins = \"gpio125\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <2>;\n+\t\tbias-disable;\n+\t};\n+\n+\tfan_vdd_pins: fan-vdd-state {\n+\t\tpins = \"gpio124\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <2>;\n+\t\tbias-disable;\n+\t};\n+\n+\tfan_int: fan-int-state {\n+\t\tpins = \"gpio14\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <2>;\n+\t\tbias-pull-up;\n+\t};\n+\n+\tupd720201_avdd33: upd720201-avdd33-state {\n+\t\tpins = \"gpio123\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <2>;\n+\t\tbias-disable;\n+\t};\n+\n+\tupd720201_vdd10: pd720201-vdd10-state {\n+\t\tpins = \"gpio122\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <2>;\n+\t\tbias-disable;\n+\t};\n+\n+\tupd720201_vdd33: upd720201-vdd33-state {\n+\t\tpins = \"gpio121\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <2>;\n+\t\tbias-disable;\n+\t};\n+\n+\tgamepad_pwr_en: gamepad-pwr-en-active-state {\n+\t\tpins = \"gpio28\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <2>;\n+\t\tbias-disable;\n+\t\toutput-high;\n+\t};\n+\n+\tspkr_23_sd_n_active: spkr-23-sd-n-active-state {\n+\t\tpins = \"gpio77\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <16>;\n+\t\tbias-disable;\n+\t};\n+\n+\tspkr_01_sd_n_active: spkr-01-sd-n-active-state {\n+\t\tpins = \"gpio21\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <16>;\n+\t\tbias-disable;\n+\t};\n+\n+\twcd_default: wcd-reset-n-active-state {\n+\t\tpins = \"gpio107\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <16>;\n+\t\tbias-disable;\n+\t};\n+\n+\twlan_en: wlan-en-state {\n+\t\tpins = \"gpio16\";\n+\t\tfunction = \"gpio\";\n+\t\tdrive-strength = <8>;\n+\t\tbias-pull-down;\n+\t};\n+};\n+\n+&uart14 {\n+\tstatus = \"okay\";\n+\n+\tbluetooth {\n+\t\tcompatible = \"qcom,wcn7850-bt\";\n+\n+\t\tvddrfacmn-supply = <&vreg_pmu_rfa_cmn>;\n+\t\tvddaon-supply = <&vreg_pmu_aon_0p59>;\n+\t\tvddwlcx-supply = <&vreg_pmu_wlcx_0p8>;\n+\t\tvddwlmx-supply = <&vreg_pmu_wlmx_0p85>;\n+\t\tvddrfa0p8-supply = <&vreg_pmu_rfa_0p8>;\n+\t\tvddrfa1p2-supply = <&vreg_pmu_rfa_1p2>;\n+\t\tvddrfa1p8-supply = <&vreg_pmu_rfa_1p8>;\n+\n+\t\tmax-speed = <3200000>;\n+\t};\n+};\n+\n+&uart15 {\n+\tstatus = \"okay\";\n+};\n+\n+&ufs_mem_hc {\n+\treset-gpios = <&tlmm 210 GPIO_ACTIVE_LOW>;\n+\n+\tvcc-supply = <&vreg_l17b_2p5>;\n+\tvcc-max-microamp = <1300000>;\n+\tvccq-supply = <&vreg_l1c_1p2>;\n+\tvccq-max-microamp = <1200000>;\n+\n+\tstatus = \"okay\";\n+};\n+\n+&ufs_mem_phy {\n+\tvdda-phy-supply = <&vreg_l1d_0p88>;\n+\tvdda-pll-supply = <&vreg_l3i_1p2>;\n+\n+\tstatus = \"okay\";\n+};\n+\n+/*\n+ * DPAUX -> WCD9395 -> USB_SBU -> USB-C\n+ * eUSB2 DP/DM -> PM85550HS -> eUSB2 DP/DM -> WCD9395 -> USB-C\n+ * USB SS -> NB7VPQ904MMUTWG -> USB-C\n+ */\n+\n+&usb_1 {\n+\tdr_mode = \"otg\";\n+\tusb-role-switch;\n+\n+\tstatus = \"okay\";\n+};\n+\n+&usb_1_dwc3_hs {\n+\tremote-endpoint = <&pmic_glink_hs_in>;\n+};\n+\n+&usb_1_hsphy {\n+\tvdd-supply = <&vreg_l1i_0p88>;\n+\tvdda12-supply = <&vreg_l3i_1p2>;\n+\n+\tphys = <&pm8550b_eusb2_repeater>;\n+\n+\tstatus = \"okay\";\n+};\n+\n+&usb_dp_qmpphy {\n+\tvdda-phy-supply = <&vreg_l3i_1p2>;\n+\tvdda-pll-supply = <&vreg_l3g_0p91>;\n+\n+\tstatus = \"okay\";\n+};\n+\n+&usb_dp_qmpphy_out {\n+\tremote-endpoint = <&redriver_ss_in>;\n+};\n+\n+&xo_board {\n+\tclock-frequency = <76800000>;\n+};\ndiff --git a/arch/arm64/boot/dts/qcom/sm8650.dtsi b/arch/arm64/boot/dts/qcom/sm8650.dtsi\nindex 6098d6201002..bae8ce2e8ad5 100644\n--- a/arch/arm64/boot/dts/qcom/sm8650.dtsi\n+++ b/arch/arm64/boot/dts/qcom/sm8650.dtsi\n@@ -3973,7 +3973,7 @@ opp-32000000-4 {\n \t\t\t\t};\n \t\t\t};\n \n-\t\t\tpcie@0 {\n+\t\t\tpcie1_port0: pcie@0 {\n \t\t\t\tdevice_type = \"pci\";\n \t\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n \t\t\t\tbus-range = <0x01 0xff>;\n@@ -7603,7 +7603,7 @@ cpuss3-critical {\n \t\t\t};\n \t\t};\n \n-\t\tcpu2-top-thermal {\n+\t\tcpu2_top_thermal: cpu2-top-thermal {\n \t\t\tthermal-sensors = <&tsens0 5>;\n \n \t\t\ttrips {\n@@ -7627,7 +7627,7 @@ cpu2-critical {\n \t\t\t};\n \t\t};\n \n-\t\tcpu3-top-thermal {\n+\t\tcpu3_top_thermal: cpu3-top-thermal {\n \t\t\tthermal-sensors = <&tsens0 7>;\n \n \t\t\ttrips {\n@@ -7651,7 +7651,7 @@ cpu3-critical {\n \t\t\t};\n \t\t};\n \n-\t\tcpu4-top-thermal {\n+\t\tcpu4_top_thermal: cpu4-top-thermal {\n \t\t\tthermal-sensors = <&tsens0 9>;\n \n \t\t\ttrips {\n@@ -7675,7 +7675,7 @@ cpu4-critical {\n \t\t\t};\n \t\t};\n \n-\t\tcpu5-top-thermal {\n+\t\tcpu5_top_thermal: cpu5-top-thermal {\n \t\t\tthermal-sensors = <&tsens0 11>;\n \n \t\t\ttrips {\n@@ -7699,7 +7699,7 @@ cpu5-critical {\n \t\t\t};\n \t\t};\n \n-\t\tcpu6-top-thermal {\n+\t\tcpu6_top_thermal: cpu6-top-thermal {\n \t\t\tthermal-sensors = <&tsens0 13>;\n \n \t\t\ttrips {\n@@ -7741,7 +7741,7 @@ aoss1-critical {\n \t\t\t};\n \t\t};\n \n-\t\tcpu7-top-thermal {\n+\t\tcpu7_top_thermal: cpu7-top-thermal {\n \t\t\tthermal-sensors = <&tsens1 1>;\n \n \t\t\ttrips {\n@@ -8004,14 +8004,14 @@ gpuss0-thermal {\n \n \t\t\tthermal-sensors = <&tsens2 1>;\n \n-\t\t\tcooling-maps {\n+\t\t\tgpu0_cooling_maps: cooling-maps {\n \t\t\t\tmap0 {\n \t\t\t\t\ttrip = <&gpu0_alert0>;\n \t\t\t\t\tcooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n \t\t\t\t};\n \t\t\t};\n \n-\t\t\ttrips {\n+\t\t\tgpu0_trips: trips {\n \t\t\t\tgpu0_alert0: trip-point0 {\n \t\t\t\t\ttemperature = <95000>;\n \t\t\t\t\thysteresis = <1000>;\n@@ -8037,14 +8037,14 @@ gpuss1-thermal {\n \n \t\t\tthermal-sensors = <&tsens2 2>;\n \n-\t\t\tcooling-maps {\n+\t\t\tgpu1_cooling_maps: cooling-maps {\n \t\t\t\tmap0 {\n \t\t\t\t\ttrip = <&gpu1_alert0>;\n \t\t\t\t\tcooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n \t\t\t\t};\n \t\t\t};\n \n-\t\t\ttrips {\n+\t\t\tgpu1_trips: trips {\n \t\t\t\tgpu1_alert0: trip-point0 {\n \t\t\t\t\ttemperature = <95000>;\n \t\t\t\t\thysteresis = <1000>;\n@@ -8070,14 +8070,14 @@ gpuss2-thermal {\n \n \t\t\tthermal-sensors = <&tsens2 3>;\n \n-\t\t\tcooling-maps {\n+\t\t\tgpu2_cooling_maps: cooling-maps {\n \t\t\t\tmap0 {\n \t\t\t\t\ttrip = <&gpu2_alert0>;\n \t\t\t\t\tcooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n \t\t\t\t};\n \t\t\t};\n \n-\t\t\ttrips {\n+\t\t\tgpu2_trips: trips {\n \t\t\t\tgpu2_alert0: trip-point0 {\n \t\t\t\t\ttemperature = <95000>;\n \t\t\t\t\thysteresis = <1000>;\n@@ -8103,14 +8103,14 @@ gpuss3-thermal {\n \n \t\t\tthermal-sensors = <&tsens2 4>;\n \n-\t\t\tcooling-maps {\n+\t\t\tgpu3_cooling_maps: cooling-maps {\n \t\t\t\tmap0 {\n \t\t\t\t\ttrip = <&gpu3_alert0>;\n \t\t\t\t\tcooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n \t\t\t\t};\n \t\t\t};\n \n-\t\t\ttrips {\n+\t\t\tgpu3_trips: trips {\n \t\t\t\tgpu3_alert0: trip-point0 {\n \t\t\t\t\ttemperature = <95000>;\n \t\t\t\t\thysteresis = <1000>;\n@@ -8136,14 +8136,14 @@ gpuss4-thermal {\n \n \t\t\tthermal-sensors = <&tsens2 5>;\n \n-\t\t\tcooling-maps {\n+\t\t\tgpu4_cooling_maps: cooling-maps {\n \t\t\t\tmap0 {\n \t\t\t\t\ttrip = <&gpu4_alert0>;\n \t\t\t\t\tcooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n \t\t\t\t};\n \t\t\t};\n \n-\t\t\ttrips {\n+\t\t\tgpu4_trips: trips {\n \t\t\t\tgpu4_alert0: trip-point0 {\n \t\t\t\t\ttemperature = <95000>;\n \t\t\t\t\thysteresis = <1000>;\n@@ -8169,14 +8169,14 @@ gpuss5-thermal {\n \n \t\t\tthermal-sensors = <&tsens2 6>;\n \n-\t\t\tcooling-maps {\n+\t\t\tgpu5_cooling_maps: cooling-maps {\n \t\t\t\tmap0 {\n \t\t\t\t\ttrip = <&gpu5_alert0>;\n \t\t\t\t\tcooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n \t\t\t\t};\n \t\t\t};\n \n-\t\t\ttrips {\n+\t\t\tgpu5_trips: trips {\n \t\t\t\tgpu5_alert0: trip-point0 {\n \t\t\t\t\ttemperature = <95000>;\n \t\t\t\t\thysteresis = <1000>;\n@@ -8202,14 +8202,14 @@ gpuss6-thermal {\n \n \t\t\tthermal-sensors = <&tsens2 7>;\n \n-\t\t\tcooling-maps {\n+\t\t\tgpu6_cooling_maps: cooling-maps {\n \t\t\t\tmap0 {\n \t\t\t\t\ttrip = <&gpu6_alert0>;\n \t\t\t\t\tcooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n \t\t\t\t};\n \t\t\t};\n \n-\t\t\ttrips {\n+\t\t\tgpu6_trips: trips {\n \t\t\t\tgpu6_alert0: trip-point0 {\n \t\t\t\t\ttemperature = <95000>;\n \t\t\t\t\thysteresis = <1000>;\n@@ -8235,14 +8235,14 @@ gpuss7-thermal {\n \n \t\t\tthermal-sensors = <&tsens2 8>;\n \n-\t\t\tcooling-maps {\n+\t\t\tgpu7_cooling_maps: cooling-maps {\n \t\t\t\tmap0 {\n \t\t\t\t\ttrip = <&gpu7_alert0>;\n \t\t\t\t\tcooling-device = <&gpu THERMAL_NO_LIMIT THERMAL_NO_LIMIT>;\n \t\t\t\t};\n \t\t\t};\n \n-\t\t\ttrips {\n+\t\t\tgpu7_trips: trips {\n \t\t\t\tgpu7_alert0: trip-point0 {\n \t\t\t\t\ttemperature = <95000>;\n \t\t\t\t\thysteresis = <1000>;\n", "prefixes": [ "v4", "9/9" ] }