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GET /api/patches/2196602/?format=api
{ "id": 2196602, "url": "http://patchwork.ozlabs.org/api/patches/2196602/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-9-mohamed@unpredictable.fr/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260215112543.4817-9-mohamed@unpredictable.fr>", "list_archive_url": null, "date": "2026-02-15T11:25:37", "name": "[v10,08/14] hvf: gate ARM_FEATURE_PMU register emulation behind not being at EL2", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "da7d5b1f4617209583c2a87cdb72412038d46b1f", "submitter": { "id": 91318, "url": "http://patchwork.ozlabs.org/api/people/91318/?format=api", "name": "Mohamed Mediouni", "email": "mohamed@unpredictable.fr" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260215112543.4817-9-mohamed@unpredictable.fr/mbox/", "series": [ { "id": 492211, "url": "http://patchwork.ozlabs.org/api/series/492211/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=492211", "date": "2026-02-15T11:25:32", "name": "HVF: Add support for platform vGIC and nested virtualisation", "version": 10, "mbox": "http://patchwork.ozlabs.org/series/492211/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196602/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196602/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=unpredictable.fr header.i=@unpredictable.fr\n header.a=rsa-sha256 header.s=sig1 header.b=In95AzLZ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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Sun, 15 Feb 2026 06:26:10 -0500", "from outbound.mr.icloud.com (unknown [127.0.0.2])\n by p00-icloudmta-asmtp-us-west-2a-100-percent-0 (Postfix) with ESMTPS id\n C9CED18004D5; Sun, 15 Feb 2026 11:26:06 +0000 (UTC)", "from localhost.localdomain (unknown [17.57.152.38])\n by p00-icloudmta-asmtp-us-west-2a-100-percent-0 (Postfix) with ESMTPSA id\n 3B9A118000A9; Sun, 15 Feb 2026 11:26:04 +0000 (UTC)" ], "Dkim-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=unpredictable.fr;\n s=sig1; t=1771154768; x=1773746768;\n bh=ZobmyIudfu7P7uUuPB0BU6gBIwq7faUFJCiyh8v9O8Q=;\n h=From:To:Subject:Date:Message-ID:MIME-Version:Content-Type:x-icloud-hme;\n b=In95AzLZfkxpy8Q7GY0YsPaRIqYiXs56WuPtg2BYsOX0cOXGuhGecpiLvPUFFxmuByKa1KP3HOz4HWNocwSEXqI3xaDnVcabQPNs1AIuKszTDPULfT6yyMKiymZbJT/ueLz6JGfgn5ixjFg6Gx+e32Y3vuOsGKfOe7M+002wgpMrt9vxkUk9kfb07MwxJlzEI/UZjgiQCfaBTusy9PafW2kmj/YJKQ55gmpGOJ/P5S9GSZWHkoGgNnBQYZdpH8utYsSDEbF8peP3J/QYw/CKAPw9FU0IvSp5sOpFc7UwMXTdneZLLgC0PVE8MUAfODAim14EtaFG8VKuxhTm8znLjg==", "mail-alias-created-date": "1752046281608", "From": "Mohamed Mediouni <mohamed@unpredictable.fr>", "To": "qemu-devel@nongnu.org", "Cc": "qemu-arm@nongnu.org, Peter Maydell <peter.maydell@linaro.org>,\n Mads Ynddal <mads@ynddal.dk>, Roman Bolshakov <rbolshakov@ddn.com>,\n Phil Dennis-Jordan <phil@philjordan.eu>, Alexander Graf <agraf@csgraf.de>,\n Paolo Bonzini <pbonzini@redhat.com>, Cameron Esfahani <dirty@apple.com>,\n Mohamed Mediouni <mohamed@unpredictable.fr>, =?utf-8?q?Philippe_Mathieu-Dau?=\n\t=?utf-8?q?d=C3=A9?= <philmd@linaro.org>", "Subject": "[PATCH v10 08/14] hvf: gate ARM_FEATURE_PMU register emulation behind\n not being at EL2", "Date": "Sun, 15 Feb 2026 12:25:37 +0100", "Message-ID": "<20260215112543.4817-9-mohamed@unpredictable.fr>", "X-Mailer": "git-send-email 2.50.1", "In-Reply-To": "<20260215112543.4817-1-mohamed@unpredictable.fr>", "References": "<20260215112543.4817-1-mohamed@unpredictable.fr>", "MIME-Version": "1.0", "Content-Type": "text/plain; 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helo=outbound.mr.icloud.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From Apple documentation:\n\n> When EL2 is disabled, PMU register accesses trigger \"Trapped MSR, MRS, or\n> System Instruction\" exceptions. When this happens, hv_vcpu_run() returns, and the\n> hv_vcpu_exit_t object contains the information about this exception.\n\n> When EL2 is enabled, the handling of PMU register accesses is determined by the PMUVer\n> field of ID_AA64DFR0_EL1 register.\n> If the PMUVer field value is zero or is invalid, PMU register accesses generate \"Undefined\"\n> exceptions, which are sent to the guest.\n> If the PMUVer field value is non-zero and valid, PMU register accesses are emulated by the framework.\n> The ID_AA64DFR0_EL1 register can be modified via hv_vcpu_set_sys_reg API.\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nReviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nTested-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n target/arm/hvf/hvf.c | 4 ++--\n 1 file changed, 2 insertions(+), 2 deletions(-)", "diff": "diff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c\nindex e0a51faf28..be1ff93e0e 100644\n--- a/target/arm/hvf/hvf.c\n+++ b/target/arm/hvf/hvf.c\n@@ -1285,7 +1285,7 @@ static int hvf_sysreg_read(CPUState *cpu, uint32_t reg, uint64_t *val)\n ARMCPU *arm_cpu = ARM_CPU(cpu);\n CPUARMState *env = &arm_cpu->env;\n \n- if (arm_feature(env, ARM_FEATURE_PMU)) {\n+ if (!hvf_nested_virt_enabled() && arm_feature(env, ARM_FEATURE_PMU)) {\n switch (reg) {\n case SYSREG_PMCR_EL0:\n *val = env->cp15.c9_pmcr;\n@@ -1546,7 +1546,7 @@ static int hvf_sysreg_write(CPUState *cpu, uint32_t reg, uint64_t val)\n SYSREG_OP2(reg),\n val);\n \n- if (arm_feature(env, ARM_FEATURE_PMU)) {\n+ if (!hvf_nested_virt_enabled() && arm_feature(env, ARM_FEATURE_PMU)) {\n switch (reg) {\n case SYSREG_PMCCNTR_EL0:\n pmu_op_start(env);\n", "prefixes": [ "v10", "08/14" ] }