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GET /api/patches/2196479/?format=api
{ "id": 2196479, "url": "http://patchwork.ozlabs.org/api/patches/2196479/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260214034135.220413-12-zhenzhong.duan@intel.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260214034135.220413-12-zhenzhong.duan@intel.com>", "list_archive_url": null, "date": "2026-02-14T03:41:31", "name": "[RFCv2,11/13] intel_iommu_accel: drop _lock suffix in vtd_flush_host_piotlb_all_locked()", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "294bdb33ad8305695b83ecd2b3527382baf9576b", "submitter": { "id": 81636, "url": "http://patchwork.ozlabs.org/api/people/81636/?format=api", "name": "Zhenzhong Duan", "email": "zhenzhong.duan@intel.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260214034135.220413-12-zhenzhong.duan@intel.com/mbox/", "series": [ { "id": 492156, "url": "http://patchwork.ozlabs.org/api/series/492156/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=492156", "date": "2026-02-14T03:41:20", "name": "intel_iommu: Enable PASID support for passthrough device", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/492156/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196479/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196479/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=intel.com header.i=@intel.com header.a=rsa-sha256\n header.s=Intel header.b=b6Ivixyk;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fCZd93P8Qz1xpY\n\tfor <incoming@patchwork.ozlabs.org>; Sat, 14 Feb 2026 14:43:25 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1vr6YD-0005E6-LQ; Fri, 13 Feb 2026 22:42:33 -0500", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1vr6YB-0005DU-EM\n for qemu-devel@nongnu.org; Fri, 13 Feb 2026 22:42:31 -0500", "from mgamail.intel.com ([198.175.65.12])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <zhenzhong.duan@intel.com>)\n id 1vr6Y9-0008J1-SE\n for qemu-devel@nongnu.org; Fri, 13 Feb 2026 22:42:31 -0500", "from orviesa009.jf.intel.com ([10.64.159.149])\n by orvoesa104.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Feb 2026 19:42:29 -0800", "from unknown (HELO gnr-sp-2s-612.sh.intel.com) ([10.112.230.229])\n by orviesa009-auth.jf.intel.com with ESMTP/TLS/ECDHE-RSA-AES256-GCM-SHA384;\n 13 Feb 2026 19:42:25 -0800" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/simple;\n d=intel.com; i=@intel.com; q=dns/txt; s=Intel;\n t=1771040550; x=1802576550;\n h=from:to:cc:subject:date:message-id:in-reply-to:\n references:mime-version:content-transfer-encoding;\n bh=ehaQvOENXTS0OCP62OfUZHfSY2q/JCq+zdIl3/5eVMQ=;\n b=b6Ivixykmc2X6xm1aEIKBkcmqgu3Jc1R+tJyOqOWs3XModejT5wzjBSu\n pW/Ac4zGrO92ytjQUTzHI6fdKn/pW+bcvsShQLKQglUBStmQgy9Nue520\n S5kvENEHS+a4sGxTY8xWiP3A19qpuQ8wyFftpZ+FOgLKBhXZa5uFMnz2R\n u9y5JIrRWqFW891mhsd2DyDTbmJEbzbI51kBZGEBQUGMlMfSo5Qv9e4Sw\n 3xRxuWw7iwWD6Hg4yeMLEcBiZojCFjDM1xVPadV6O8xJl/yE/2TZA++lK\n kvCoezufSsVKNky6QKko+SNpwCNgkrEv3cGjRqCOwj9iuPygnIII6iC3N w==;", "X-CSE-ConnectionGUID": [ "rNAhwzYDRUGKpUv3Z4ABCw==", "woshjByVTa2ZvaDFepDi2w==" ], "X-CSE-MsgGUID": [ "qfd133uLTCGVVWF3EgW3Tg==", "4PYcl7veTP+ycpW9F6M9Ug==" ], "X-IronPort-AV": [ "E=McAfee;i=\"6800,10657,11700\"; a=\"83666871\"", "E=Sophos;i=\"6.21,289,1763452800\"; d=\"scan'208\";a=\"83666871\"", "E=Sophos;i=\"6.21,289,1763452800\"; d=\"scan'208\";a=\"212933119\"" ], "X-ExtLoop1": "1", "From": "Zhenzhong Duan <zhenzhong.duan@intel.com>", "To": "qemu-devel@nongnu.org", "Cc": "alex@shazbot.org, clg@redhat.com, eric.auger@redhat.com, mst@redhat.com,\n jasowang@redhat.com, jgg@nvidia.com, nicolinc@nvidia.com,\n skolothumtho@nvidia.com, joao.m.martins@oracle.com,\n clement.mathieu--drif@eviden.com, kevin.tian@intel.com, yi.l.liu@intel.com,\n xudong.hao@intel.com, Zhenzhong Duan <zhenzhong.duan@intel.com>", "Subject": "[RFCv2 PATCH 11/13] intel_iommu_accel: drop _lock suffix in\n vtd_flush_host_piotlb_all_locked()", "Date": "Fri, 13 Feb 2026 22:41:31 -0500", "Message-ID": "<20260214034135.220413-12-zhenzhong.duan@intel.com>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260214034135.220413-1-zhenzhong.duan@intel.com>", "References": "<20260214034135.220413-1-zhenzhong.duan@intel.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=198.175.65.12;\n envelope-from=zhenzhong.duan@intel.com; helo=mgamail.intel.com", "X-Spam_score_int": "-43", "X-Spam_score": "-4.4", "X-Spam_bar": "----", "X-Spam_report": "(-4.4 / 5.0 requ) BAYES_00=-1.9, DKIMWL_WL_HIGH=-0.001,\n DKIM_SIGNED=0.1, DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_MED=-2.3, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "In order to support PASID, we have switched from looping vtd_as to vtd_hiod,\nvtd_hiod represents host passthrough device and never deferenced without BQL.\nSo we don't need extra iommu lock to protect it.\n\nSigned-off-by: Zhenzhong Duan <zhenzhong.duan@intel.com>\n---\n hw/i386/intel_iommu_accel.h | 14 +++++++-------\n hw/i386/intel_iommu.c | 7 ++++---\n hw/i386/intel_iommu_accel.c | 6 +++---\n 3 files changed, 14 insertions(+), 13 deletions(-)", "diff": "diff --git a/hw/i386/intel_iommu_accel.h b/hw/i386/intel_iommu_accel.h\nindex 1ae46d9250..3f1b1002b8 100644\n--- a/hw/i386/intel_iommu_accel.h\n+++ b/hw/i386/intel_iommu_accel.h\n@@ -24,9 +24,9 @@ typedef struct VTDACCELPASIDCacheEntry {\n bool vtd_check_hiod_accel(IntelIOMMUState *s, VTDHostIOMMUDevice *vtd_hiod,\n Error **errp);\n VTDHostIOMMUDevice *vtd_find_hiod_iommufd(VTDAddressSpace *as);\n-void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_id,\n- uint32_t pasid, hwaddr addr,\n- uint64_t npages, bool ih);\n+void vtd_flush_host_piotlb_all_accel(IntelIOMMUState *s, uint16_t domain_id,\n+ uint32_t pasid, hwaddr addr,\n+ uint64_t npages, bool ih);\n void vtd_pasid_cache_sync_accel(IntelIOMMUState *s, VTDPASIDCacheInfo *pc_info);\n void vtd_pasid_cache_reset_accel(IntelIOMMUState *s);\n void vtd_iommu_ops_update_accel(PCIIOMMUOps *ops);\n@@ -51,10 +51,10 @@ static inline bool vtd_propagate_guest_pasid(VTDAddressSpace *vtd_as,\n return true;\n }\n \n-static inline void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s,\n- uint16_t domain_id,\n- uint32_t pasid, hwaddr addr,\n- uint64_t npages, bool ih)\n+static inline void vtd_flush_host_piotlb_all_accel(IntelIOMMUState *s,\n+ uint16_t domain_id,\n+ uint32_t pasid, hwaddr addr,\n+ uint64_t npages, bool ih)\n {\n }\n \ndiff --git a/hw/i386/intel_iommu.c b/hw/i386/intel_iommu.c\nindex a8d760eb51..6483cb3d85 100644\n--- a/hw/i386/intel_iommu.c\n+++ b/hw/i386/intel_iommu.c\n@@ -2994,11 +2994,11 @@ static void vtd_piotlb_pasid_invalidate(IntelIOMMUState *s,\n info.domain_id = domain_id;\n info.pasid = pasid;\n \n+ vtd_flush_host_piotlb_all_accel(s, domain_id, pasid, 0, (uint64_t)-1,\n+ false);\n vtd_iommu_lock(s);\n g_hash_table_foreach_remove(s->iotlb, vtd_hash_remove_by_pasid,\n &info);\n- vtd_flush_host_piotlb_all_locked(s, domain_id, pasid, 0, (uint64_t)-1,\n- false);\n vtd_iommu_unlock(s);\n \n QLIST_FOREACH(vtd_as, &s->vtd_as_with_notifiers, next) {\n@@ -3028,10 +3028,11 @@ static void vtd_piotlb_page_invalidate(IntelIOMMUState *s, uint16_t domain_id,\n info.addr = addr;\n info.mask = ~((1 << am) - 1);\n \n+ vtd_flush_host_piotlb_all_accel(s, domain_id, pasid, addr, 1 << am, ih);\n+\n vtd_iommu_lock(s);\n g_hash_table_foreach_remove(s->iotlb,\n vtd_hash_remove_by_page_piotlb, &info);\n- vtd_flush_host_piotlb_all_locked(s, domain_id, pasid, addr, 1 << am, ih);\n vtd_iommu_unlock(s);\n \n vtd_iotlb_page_invalidate_notify(s, domain_id, addr, am, pasid);\ndiff --git a/hw/i386/intel_iommu_accel.c b/hw/i386/intel_iommu_accel.c\nindex d7c1ff6b74..acb1b1e238 100644\n--- a/hw/i386/intel_iommu_accel.c\n+++ b/hw/i386/intel_iommu_accel.c\n@@ -231,9 +231,9 @@ static void vtd_flush_host_piotlb(VTDACCELPASIDCacheEntry *vtd_pce,\n }\n }\n \n-void vtd_flush_host_piotlb_all_locked(IntelIOMMUState *s, uint16_t domain_id,\n- uint32_t pasid, hwaddr addr,\n- uint64_t npages, bool ih)\n+void vtd_flush_host_piotlb_all_accel(IntelIOMMUState *s, uint16_t domain_id,\n+ uint32_t pasid, hwaddr addr,\n+ uint64_t npages, bool ih)\n {\n struct iommu_hwpt_vtd_s1_invalidate cache_info = { 0 };\n VTDPIOTLBInvInfo piotlb_info;\n", "prefixes": [ "RFCv2", "11/13" ] }