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GET /api/patches/2196400/?format=api
{ "id": 2196400, "url": "http://patchwork.ozlabs.org/api/patches/2196400/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260213175032.32121-5-philmd@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260213175032.32121-5-philmd@linaro.org>", "list_archive_url": null, "date": "2026-02-13T17:50:31", "name": "[v4,4/5] system: Make qemu_arch_available() common code", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "1875f499bafa27bd8ca3b2ab99d723fb966264db", "submitter": { "id": 85046, "url": "http://patchwork.ozlabs.org/api/people/85046/?format=api", "name": "Philippe Mathieu-Daudé", "email": "philmd@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260213175032.32121-5-philmd@linaro.org/mbox/", "series": [ { "id": 492127, "url": "http://patchwork.ozlabs.org/api/series/492127/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=492127", "date": "2026-02-13T17:50:27", "name": "system: Make qemu_arch_available() common code", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/492127/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196400/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196400/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=yIq6EGex;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::432;\n envelope-from=philmd@linaro.org; helo=mail-wr1-x432.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=unavailable autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Remove the need of per-target QEMU_ARCH. Define the\nQEMU_ARCH_* constants based on SYS_EMU_TARGET_* ones,\nthemselves already exposed via target_arch(), allowing\nto check the current target is included in @arch_bitmask.\n\nSigned-off-by: Philippe Mathieu-Daudé <philmd@linaro.org>\n---\n meson.build | 2 --\n include/system/arch_init.h | 54 ++++++++++++++++++++++++--------------\n system/arch_init.c | 6 +++--\n system/meson.build | 2 +-\n 4 files changed, 39 insertions(+), 25 deletions(-)", "diff": "diff --git a/meson.build b/meson.build\nindex 4af32c3e1f2..fc79a1d9aed 100644\n--- a/meson.build\n+++ b/meson.build\n@@ -3375,8 +3375,6 @@ foreach target : target_dirs\n config_target_data.set(k, v)\n endif\n endforeach\n- config_target_data.set('QEMU_ARCH',\n- 'QEMU_ARCH_' + config_target['TARGET_BASE_ARCH'].to_upper())\n config_target_h += {target: configure_file(output: target + '-config-target.h',\n configuration: config_target_data)}\n \ndiff --git a/include/system/arch_init.h b/include/system/arch_init.h\nindex 92d50ba8d63..bb17d18a2b5 100644\n--- a/include/system/arch_init.h\n+++ b/include/system/arch_init.h\n@@ -1,30 +1,44 @@\n #ifndef QEMU_ARCH_INIT_H\n #define QEMU_ARCH_INIT_H\n \n+#include \"qapi/qapi-types-machine.h\"\n \n enum {\n- QEMU_ARCH_ALL = -1,\n- QEMU_ARCH_ALPHA = (1 << 0),\n- QEMU_ARCH_ARM = (1 << 1),\n- QEMU_ARCH_I386 = (1 << 3),\n- QEMU_ARCH_M68K = (1 << 4),\n- QEMU_ARCH_MICROBLAZE = (1 << 6),\n- QEMU_ARCH_MIPS = (1 << 7),\n- QEMU_ARCH_PPC = (1 << 8),\n- QEMU_ARCH_S390X = (1 << 9),\n- QEMU_ARCH_SH4 = (1 << 10),\n- QEMU_ARCH_SPARC = (1 << 11),\n- QEMU_ARCH_XTENSA = (1 << 12),\n- QEMU_ARCH_OR1K = (1 << 13),\n- QEMU_ARCH_TRICORE = (1 << 16),\n- QEMU_ARCH_HPPA = (1 << 18),\n- QEMU_ARCH_RISCV = (1 << 19),\n- QEMU_ARCH_RX = (1 << 20),\n- QEMU_ARCH_AVR = (1 << 21),\n- QEMU_ARCH_HEXAGON = (1 << 22),\n- QEMU_ARCH_LOONGARCH = (1 << 23),\n+ QEMU_ARCH_ALPHA = (1UL << SYS_EMU_TARGET_ALPHA),\n+ QEMU_ARCH_ARM = (1UL << SYS_EMU_TARGET_ARM) |\n+ (1UL << SYS_EMU_TARGET_AARCH64),\n+ QEMU_ARCH_I386 = (1UL << SYS_EMU_TARGET_I386) |\n+ (1UL << SYS_EMU_TARGET_X86_64),\n+ QEMU_ARCH_M68K = (1UL << SYS_EMU_TARGET_M68K),\n+ QEMU_ARCH_MICROBLAZE = (1UL << SYS_EMU_TARGET_MICROBLAZE) |\n+ (1UL << SYS_EMU_TARGET_MICROBLAZEEL),\n+ QEMU_ARCH_MIPS = (1UL << SYS_EMU_TARGET_MIPS) |\n+ (1UL << SYS_EMU_TARGET_MIPSEL) |\n+ (1UL << SYS_EMU_TARGET_MIPS64) |\n+ (1UL << SYS_EMU_TARGET_MIPS64EL),\n+ QEMU_ARCH_PPC = (1UL << SYS_EMU_TARGET_PPC) |\n+ (1UL << SYS_EMU_TARGET_PPC64),\n+ QEMU_ARCH_S390X = (1UL << SYS_EMU_TARGET_S390X),\n+ QEMU_ARCH_SH4 = (1UL << SYS_EMU_TARGET_SH4) |\n+ (1UL << SYS_EMU_TARGET_SH4EB),\n+ QEMU_ARCH_SPARC = (1UL << SYS_EMU_TARGET_SPARC) |\n+ (1UL << SYS_EMU_TARGET_SPARC64),\n+ QEMU_ARCH_XTENSA = (1UL << SYS_EMU_TARGET_XTENSA) |\n+ (1UL << SYS_EMU_TARGET_XTENSAEB),\n+ QEMU_ARCH_OR1K = (1UL << SYS_EMU_TARGET_OR1K),\n+ QEMU_ARCH_TRICORE = (1UL << SYS_EMU_TARGET_TRICORE),\n+ QEMU_ARCH_HPPA = (1UL << SYS_EMU_TARGET_HPPA),\n+ QEMU_ARCH_RISCV = (1UL << SYS_EMU_TARGET_RISCV32) |\n+ (1UL << SYS_EMU_TARGET_RISCV64),\n+ QEMU_ARCH_RX = (1UL << SYS_EMU_TARGET_RX),\n+ QEMU_ARCH_AVR = (1UL << SYS_EMU_TARGET_AVR),\n+ QEMU_ARCH_HEXAGON = (1UL << SYS_EMU_TARGET_HEXAGON),\n+ QEMU_ARCH_LOONGARCH = (1UL << SYS_EMU_TARGET_LOONGARCH64),\n+ QEMU_ARCH_ALL = UINT32_MAX,\n };\n \n+QEMU_BUILD_BUG_ON(SYS_EMU_TARGET__MAX > 32);\n+\n /**\n * qemu_arch_available:\n * @arch_bitmask: bitmask of QEMU_ARCH_* constants\ndiff --git a/system/arch_init.c b/system/arch_init.c\nindex d7ec6e69c79..604d5909ed0 100644\n--- a/system/arch_init.c\n+++ b/system/arch_init.c\n@@ -23,8 +23,10 @@\n */\n #include \"qemu/osdep.h\"\n #include \"system/arch_init.h\"\n+#include \"qemu/bitops.h\"\n+#include \"qemu/target-info-qapi.h\"\n \n-bool qemu_arch_available(uint32_t arch_bitmask);\n+bool qemu_arch_available(uint32_t arch_bitmask)\n {\n- return arch_bitmask & QEMU_ARCH;\n+ return extract32(arch_bitmask, target_arch(), 1);\n }\ndiff --git a/system/meson.build b/system/meson.build\nindex 4b69ef0f5fb..d91703d3dcc 100644\n--- a/system/meson.build\n+++ b/system/meson.build\n@@ -1,5 +1,4 @@\n specific_ss.add(when: 'CONFIG_SYSTEM_ONLY', if_true: [files(\n- 'arch_init.c',\n 'globals-target.c',\n )])\n \n@@ -8,6 +7,7 @@ system_ss.add(files(\n ), sdl, libpmem, libdaxctl)\n \n system_ss.add(files(\n+ 'arch_init.c',\n 'balloon.c',\n 'bootdevice.c',\n 'cpus.c',\n", "prefixes": [ "v4", "4/5" ] }