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GET /api/patches/2196347/?format=api
{ "id": 2196347, "url": "http://patchwork.ozlabs.org/api/patches/2196347/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260213141651.2231124-1-poros@redhat.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260213141651.2231124-1-poros@redhat.com>", "list_archive_url": null, "date": "2026-02-13T14:16:51", "name": "[net] ice: fix missing SMA pin initialization in DPLL subsystem", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "003b6904bbe73c678cf05dc2a32a497ffeed8482", "submitter": { "id": 74657, "url": "http://patchwork.ozlabs.org/api/people/74657/?format=api", "name": "Petr Oros", "email": "poros@redhat.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260213141651.2231124-1-poros@redhat.com/mbox/", "series": [ { "id": 492103, "url": "http://patchwork.ozlabs.org/api/series/492103/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=492103", "date": "2026-02-13T14:16:51", "name": "[net] ice: fix missing SMA pin initialization in DPLL subsystem", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/492103/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196347/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196347/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=SSTlSAGZ;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.138; 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client-ip=170.10.129.124;\n helo=us-smtp-delivery-124.mimecast.com; envelope-from=poros@redhat.com;\n receiver=<UNKNOWN>", "DMARC-Filter": "OpenDMARC Filter v1.4.2 smtp4.osuosl.org A0AEA40020", "X-MC-Unique": "jZXz3ExRNgOiIfbg2brh-Q-1", "X-Mimecast-MFC-AGG-ID": "jZXz3ExRNgOiIfbg2brh-Q_1770992235", "From": "Petr Oros <poros@redhat.com>", "To": "netdev@vger.kernel.org", "Date": "Fri, 13 Feb 2026 15:16:51 +0100", "Message-ID": "<20260213141651.2231124-1-poros@redhat.com>", "MIME-Version": "1.0", "X-Scanned-By": "MIMEDefang 3.0 on 10.30.177.12", "X-Mimecast-MFC-PROC-ID": "hTmqM2hEIMkFJHDANBXFfB12TLQ5R4I16Tn4vzCiuTY_1770992235", "X-Mimecast-Originator": "redhat.com", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=redhat.com;\n s=mimecast20190719; t=1770992241;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding;\n bh=aGM67z7MBG7JNFtGawWZM4e/8S6RBoOC2Sl8x67NLQ8=;\n b=AxJP2DayUTDBChzMbKaC5J9hlbNzMP0eU/0aEM8GiCSbWETDeA0YhVqe4epSvBKyuFK8iI\n iurd0WIsIiLBH1x7+tPmCiF6SHEzc0hzpbrFhT4CDcLdvgJ0pl1M7tVkO3f9OQnMBClSgr\n zCNe6B+boXIr32j6M4fCTB0qDtC0tec=", "X-Mailman-Original-Authentication-Results": [ "smtp4.osuosl.org;\n dmarc=pass (p=quarantine dis=none)\n header.from=redhat.com", "smtp4.osuosl.org;\n dkim=pass (1024-bit key) header.d=redhat.com header.i=@redhat.com\n header.a=rsa-sha256 header.s=mimecast20190719 header.b=AxJP2Day" ], "Subject": "[Intel-wired-lan] [PATCH net] ice: fix missing SMA pin\n initialization in DPLL subsystem", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "ivecera@redhat.com, Przemek Kitszel <przemyslaw.kitszel@intel.com>,\n Eric Dumazet <edumazet@google.com>,\n Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,\n Andrew Lunn <andrew+netdev@lunn.ch>,\n Tony Nguyen <anthony.l.nguyen@intel.com>,\n Simon Horman <horms@kernel.org>, intel-wired-lan@lists.osuosl.org,\n Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,\n \"David S. Miller\" <davem@davemloft.net>, linux-kernel@vger.kernel.org", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "The DPLL SMA/U.FL pin redesign introduced ice_dpll_sw_pin_frequency_get()\nwhich gates frequency reporting on the pin's active flag. This flag is\ndetermined by ice_dpll_sw_pins_update() from the PCA9575 GPIO expander\nstate. Before the redesign, SMA pins were exposed as direct HW\ninput/output pins and ice_dpll_frequency_get() returned the CGU\nfrequency unconditionally — the PCA9575 state was never consulted.\n\nThe PCA9575 powers on with all outputs high, setting ICE_SMA1_DIR_EN,\nICE_SMA1_TX_EN, ICE_SMA2_DIR_EN and ICE_SMA2_TX_EN. Nothing in the\ndriver writes the register during initialization, so\nice_dpll_sw_pins_update() sees all pins as inactive and\nice_dpll_sw_pin_frequency_get() permanently returns 0 Hz for every\nSW pin.\n\nFix this by writing a default SMA configuration in\nice_dpll_init_info_sw_pins(): clear all SMA bits, then set SMA1 and\nSMA2 as active inputs (DIR_EN=0) with U.FL1 output and U.FL2 input\ndisabled. Each SMA/U.FL pair shares a physical signal path so only\none pin per pair can be active at a time. U.FL pins still report\nfrequency 0 after this fix: U.FL1 (output-only) is disabled by\nICE_SMA1_TX_EN which keeps the TX output buffer off, and U.FL2\n(input-only) is disabled by ICE_SMA2_UFL2_RX_DIS. They can be\nactivated by changing the corresponding SMA pin direction via dpll\nnetlink.\n\nFixes: 2dd5d03c77e2 (\"ice: redesign dpll sma/u.fl pins control\")\nSigned-off-by: Petr Oros <poros@redhat.com>\n---\n drivers/net/ethernet/intel/ice/ice_dpll.c | 17 +++++++++++++++++\n 1 file changed, 17 insertions(+)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c\nindex 53b54e395a2ed8..c2ad39bfe177db 100644\n--- a/drivers/net/ethernet/intel/ice/ice_dpll.c\n+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c\n@@ -3545,6 +3545,7 @@ static int ice_dpll_init_info_sw_pins(struct ice_pf *pf)\n \tstruct ice_dpll_pin *pin;\n \tu32 phase_adj_max, caps;\n \tint i, ret;\n+\tu8 data;\n \n \tif (pf->hw.device_id == ICE_DEV_ID_E810C_QSFP)\n \t\tinput_idx_offset = ICE_E810_RCLK_PINS_NUM;\n@@ -3604,6 +3605,22 @@ static int ice_dpll_init_info_sw_pins(struct ice_pf *pf)\n \t\t}\n \t\tice_dpll_phase_range_set(&pin->prop.phase_range, phase_adj_max);\n \t}\n+\n+\t/* Initialize the SMA control register to a known-good default state.\n+\t * Without this write the PCA9575 GPIO expander retains its power-on\n+\t * default (all outputs high) which makes all SW pins appear inactive.\n+\t * Set SMA1 and SMA2 as active inputs, disable U.FL1 output and\n+\t * U.FL2 input.\n+\t */\n+\tret = ice_read_sma_ctrl(&pf->hw, &data);\n+\tif (ret)\n+\t\treturn ret;\n+\tdata &= ~ICE_ALL_SMA_MASK;\n+\tdata |= ICE_SMA1_TX_EN | ICE_SMA2_TX_EN | ICE_SMA2_UFL2_RX_DIS;\n+\tret = ice_write_sma_ctrl(&pf->hw, data);\n+\tif (ret)\n+\t\treturn ret;\n+\n \tret = ice_dpll_pin_state_update(pf, pin, ICE_DPLL_PIN_TYPE_SOFTWARE,\n \t\t\t\t\tNULL);\n \tif (ret)\n", "prefixes": [ "net" ] }