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GET /api/patches/2196320/?format=api
{ "id": 2196320, "url": "http://patchwork.ozlabs.org/api/patches/2196320/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260213123603.420941-2-a-garg7@ti.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260213123603.420941-2-a-garg7@ti.com>", "list_archive_url": null, "date": "2026-02-13T12:36:00", "name": "[RFC,1/4] PCI: Add documentation for DOE endpoint support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "4e4b350fbd84f94f51a5d984cf6612c7d42ffb20", "submitter": { "id": 92467, "url": "http://patchwork.ozlabs.org/api/people/92467/?format=api", "name": "Aksh Garg", "email": "a-garg7@ti.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260213123603.420941-2-a-garg7@ti.com/mbox/", "series": [ { "id": 492090, "url": "http://patchwork.ozlabs.org/api/series/492090/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=492090", "date": "2026-02-13T12:35:59", "name": "PCI: Add DOE support for endpoint", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/492090/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196320/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196320/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-47267-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n 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<linux-doc@vger.kernel.org>,\n\t<bhelgaas@google.com>, <corbet@lwn.net>, <cassel@kernel.org>", "CC": "<linux-kernel@vger.kernel.org>, <linux-arm-kernel@lists.infradead.org>,\n\t<s-vadapalli@ti.com>, <danishanwar@ti.com>, <srk@ti.com>, <a-garg7@ti.com>", "Subject": "[RFC PATCH 1/4] PCI: Add documentation for DOE endpoint support", "Date": "Fri, 13 Feb 2026 18:06:00 +0530", "Message-ID": "<20260213123603.420941-2-a-garg7@ti.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260213123603.420941-1-a-garg7@ti.com>", "References": "<20260213123603.420941-1-a-garg7@ti.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"UTF-8\"", "Content-Transfer-Encoding": "8bit", "X-C2ProcessedOrg": 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"X-Forefront-Antispam-Report": "\n\tCIP:198.47.23.195;CTRY:US;LANG:en;SCL:1;SRV:;IPV:NLI;SFV:NSPM;H:lewvzet201.ext.ti.com;PTR:InfoDomainNonexistent;CAT:NONE;SFS:(13230040)(1800799024)(82310400026)(36860700013)(376014);DIR:OUT;SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n\tFXVlMDW8PuDVvbn6FKzPRFVV0+dgBmFH98Iun3fpmGzqmvtGbVj37uG+4gDZ1y+v3p0n+A/Un8MHzsqDMko2fuCzOIIdGarQjaEMNiSHKDIUm8ZD6TMGT+fZwnBnYZc+y+i+kjy49SRW2uj8k7jUh0mtrXtvgfGWVF9/UmWoTcu0atTOGupvT7jcv6NFV6JPzPA+J+XhvSz/LBsu2ur85W5ZSaXV3hi635oWuiFN+9xuJnc+VOlj2IlEARV7OwIWTeEme3u5CB1gMJpjX9T5MpwQ+KTyuR4wMRZvG4ILogZhWn1WrjpBQo2AGI2JKSYo2tV4hW1gc6kt3S/1eyGusg2NIxJzhOUmdAWOI2veOTd2xw+AJG99zAVNQEXenuJQQ2/LBkwDw7cyY0MhLekOi3ptPlf6zWpkazb2Fvz7q6676bP+uwuJrn3NumXvFXg9", "X-OriginatorOrg": "ti.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "13 Feb 2026 12:36:16.4225\n (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 87948c03-6c1d-4618-ef3a-08de6afc7b44", "X-MS-Exchange-CrossTenant-Id": "e5b49634-450b-4709-8abb-1e2b19b982b7", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7;Ip=[198.47.23.195];Helo=[lewvzet201.ext.ti.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n\tSJ1PEPF00001CE4.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "MW6PR10MB7552" }, "content": "From: Aksh Garg <a-garg7@ti.com>\n\nDocument the architecture and implementation details for the Data Object\nExchange (DOE) framework for PCIe Endpoint devices.\n\nCo-developed-by: Siddharth Vadapalli <s-vadapalli@ti.com>\nSigned-off-by: Siddharth Vadapalli <s-vadapalli@ti.com>\nSigned-off-by: Aksh Garg <a-garg7@ti.com>\n---\n Documentation/PCI/index.rst | 1 +\n Documentation/PCI/pci-doe-ep.rst | 291 +++++++++++++++++++++++++++++++\n 2 files changed, 292 insertions(+)\n create mode 100644 Documentation/PCI/pci-doe-ep.rst", "diff": "diff --git a/Documentation/PCI/index.rst b/Documentation/PCI/index.rst\nindex 5d720d2a415e..4c9a4e749442 100644\n--- a/Documentation/PCI/index.rst\n+++ b/Documentation/PCI/index.rst\n@@ -20,3 +20,4 @@ PCI Bus Subsystem\n controller/index\n boot-interrupts\n tph\n+ pci-doe-ep\ndiff --git a/Documentation/PCI/pci-doe-ep.rst b/Documentation/PCI/pci-doe-ep.rst\nnew file mode 100644\nindex 000000000000..d6715944c117\n--- /dev/null\n+++ b/Documentation/PCI/pci-doe-ep.rst\n@@ -0,0 +1,291 @@\n+.. SPDX-License-Identifier: GPL-2.0-only or MIT\n+\n+.. include:: <isonum.txt>\n+\n+=============================================\n+Data Object Exchange (DOE) for PCIe Endpoint\n+=============================================\n+\n+:Copyright: |copy| 2026 Texas Instruments Incorporated\n+:Author: Aksh Garg <a-garg7@ti.com>\n+:Co-Author: Siddharth Vadapalli <s-vadapalli@ti.com>\n+\n+Overview\n+========\n+\n+DOE (Data Object Exchange) is a standard PCIe extended capability feature as\n+introduced in the Data Object Exchange (DOE) ECN for PCIe r5.0. It is an optional\n+mechanism for system firmware/software running on root complex (host) to perform\n+:ref:`data object <data-object-term>` exchanges with an endpoint function. Each\n+data object is uniquely identified by the Vendor ID of the vendor publishing the\n+data object definition and a Data Object Type value assigned by that vendor.\n+\n+Think of DOE as a sophisticated mailbox system built into PCIe. The root complex\n+can send structured requests to the endpoint device through DOE mailboxes, and\n+the endpoint device responds with appropriate data. DOE mailboxes are implemented\n+as PCIe Extended Capabilities in endpoint devices, allowing multiple mailboxes\n+per function, each potentially supporting different data object protocols.\n+\n+The DOE support for root complex devices has already been implemented in\n+``drivers/pci/doe.c``.\n+\n+How DOE Works\n+=============\n+\n+The DOE mailbox operates through a simple request-response model:\n+\n+1. **Host sends request**: The root complex writes a data object (vendor ID, type,\n+ and payload) to the DOE write mailbox register (one DWORD at a time) of the\n+ endpoint function's config space and sets the GO bit in the DOE Status register\n+ to indicate that a request is ready for processing.\n+2. **Endpoint processes**: The endpoint function reads the request from DOE write\n+ mailbox register, sets the BUSY bit in the DOE Status register, identifies the\n+ protocol of the data object, and executes the appropriate handler.\n+3. **Endpoint responds**: The endpoint function writes the response data object to the\n+ DOE read mailbox register (one DWORD at a time), and sets the READY bit in the DOE\n+ Status register to indicate that the response is ready. If an error occurs during\n+ request processing (such as unsupported protocol or handler failure), the endpoint\n+ sets the ERROR bit in the DOE Status register instead of the READY bit.\n+4. **Host reads response**: The root complex retrieves the response data from the DOE read\n+ mailbox register once the READY bit is set in the DOE Status register, and then writes\n+ any value to this register to indicate a successful read. If the ERROR bit was set,\n+ the root complex discards the response and performs error handling as needed.\n+\n+Each mailbox operates independently and can handle one transaction at a time. The\n+DOE specification supports data objects of size up to 256KB (2\\ :sup:`18` dwords).\n+\n+For complete DOE capability details, refer to `PCI Express Base Specification Revision 7.0,\n+Section 6.30 - Data Object Exchange (DOE)`.\n+\n+Key Terminologies\n+=================\n+\n+.. _data-object-term:\n+\n+**Data Object**\n+ A structured, vendor-defined, or standard-defined message exchanged between\n+ root complex and endpoint function via DOE capability registers in configuration\n+ space of the function.\n+\n+**Mailbox**\n+ A DOE capability on the endpoint device, where each physical function can have\n+ multiple mailboxes.\n+\n+**Protocol**\n+ A specific type of DOE communication data object identified by a Vendor ID and Type.\n+\n+**Handler**\n+ A function that processes DOE requests of a specific protocol and generates responses.\n+\n+Architecture of DOE Implementation for Endpoint\n+===============================================\n+\n+.. code-block:: text\n+\n+ +------------------+\n+ | |\n+ | Root Complex |\n+ | |\n+ +--------^---------+\n+ |\n+ | Config space access\n+ | over PCIe link\n+ |\n+ +----------v-----------+\n+ | |\n+ | PCIe Controller |\n+ | as Endpoint |\n+ | |\n+ | +-----------------+ |\n+ | | DOE Mailbox | |\n+ | +-------^---------+ |\n+ +----------|-----------+\n+ +-----------|---------------------------------------------------------------+\n+ | | +--------------------+ |\n+ | +---------v--------+ Allocate | +--------------+ | |\n+ | | |-------------------------------->| Request | | |\n+ | | EP Controller |-------------------------------->| Buffer | | |\n+ | | Driver | Free | +--------------+ | |\n+ | | |---+ | | |\n+ | +--------^---------+ | Free | | |\n+ | | +-----------------------+ | | |\n+ | | | | | |\n+ | | pci_ep_doe_process_request() | | | |\n+ | | | | | |\n+ | +--------v---------+ | | | |\n+ | | |<----+ | | DDR | |\n+ | | DOE EP Core | | Discovery | | | |\n+ | | (doe-ep.c) | | Protocol | | | |\n+ | | |-----+ Handler | | | |\n+ | +--------^---------+ | | | |\n+ | | | | | |\n+ | | protocol_handler() | | | |\n+ | | | | | |\n+ | +--------v---------+ | | | |\n+ | | | | | +--------------+ | |\n+ | | Protocol Handler | +---->| Response | | |\n+ | | Module |-------------------------------->| Buffer | | |\n+ | | (CMA/SPDM/Other) | Allocate | +--------------+ | |\n+ | | | | | |\n+ | +------------------+ | | |\n+ | +--------------------+ |\n+ +---------------------------------------------------------------------------+\n+\n+Initialization and Cleanup\n+--------------------------\n+\n+**Framework Initialization**\n+\n+The controller driver calls ``pci_ep_doe_init(epc)`` during its probe sequence.\n+This initializes the xarray data structure (a resizable array data structure\n+defined in linux) named ``doe_mbs`` that stores metadata of DOE mailboxes for\n+the controller in ``struct pci_epc``.\n+\n+**Mailbox Registration**\n+\n+For each DOE capability found in the endpoint function's configuration space,\n+the controller driver calls ``pci_ep_doe_add_mailbox(epc, func_no, cap_offset)``.\n+This creates a mailbox structure and allocates an ordered workqueue for processing\n+DOE requests sequentially for that mailbox, enabling concurrent request handling\n+across different mailboxes. Each mailbox is uniquely identified by the combination\n+of physical function number and capability offset for that controller.\n+\n+**Cleanup**\n+\n+During driver removal or controller shutdown, the controller driver calls\n+``pci_ep_doe_destroy(epc)`` to clean up all DOE resources. This function\n+destroys all registered mailboxes, cancels any pending tasks, flushes and\n+destroys the workqueues, and frees all memory allocated to the mailboxes.\n+\n+Register and Unregister Protocol Handler\n+----------------------------------------\n+\n+Protocol implementations (such as CMA, SPDM, or vendor-specific protocols)\n+register their handlers with the DOE EP core during module initialization.\n+\n+**Registration**\n+\n+Protocol modules call ``pci_ep_doe_register_protocol(vendor_id, type, handler)``\n+to register their handler function. The handler is stored in a global xarray\n+and will be invoked when DOE requests matching the vendor ID and type are received.\n+The discovery protocol (VID = 0x0001 (PCI-SIG vendor ID), Type = 0x00 (discovery\n+protocol)) is handled internally by the DOE EP core and cannot be registered by\n+external modules.\n+\n+**Unregistration**\n+\n+During module cleanup, protocol modules call\n+``pci_ep_doe_unregister_protocol(vendor_id, type)`` to remove their handler\n+from the registry.\n+\n+Request Handling\n+----------------\n+\n+The complete flow of a DOE request from the root complex to the response:\n+\n+**Step 1: Root Complex → EP Controller Driver**\n+\n+The root complex writes a DOE request (Vendor ID, Type, and Payload) to the\n+DOE write mailbox register in the endpoint function's configuration space and sets\n+the GO bit in the DOE Control register, indicating that the request is ready for\n+processing.\n+\n+**Step 2: EP Controller Driver → DOE EP Core**\n+\n+The controller driver reads the request header to determine the data object length.\n+Based on this length field, it allocates a request buffer in memory (DDR) of the\n+appropriate size. The driver then reads the complete request payload from the DOE\n+write mailbox register and converts the data from little-endian format (the format\n+followed in the PCIe transactions over the link) to CPU-native format using\n+``le32_to_cpu()``. The driver creates pointers for the response buffer and response\n+size, which will be populated by the protocol handler. Finally, the driver calls\n+``pci_ep_doe_process_request(epc, func_no, cap_offset, vendor, type, request,\n+request_sz, &response, &response_sz)`` to hand off the request to the DOE EP core,\n+and sets the BUSY bit in the DOE Status register.\n+\n+**Step 3: DOE EP Core Processing**\n+\n+The DOE EP core looks up the protocol handler based on the Vendor ID and Type\n+from the request header. It creates a task structure and submits it to the\n+mailbox's ordered workqueue. This ensures that requests for each mailbox are\n+processed sequentially, one at a time, as required by the DOE specification.\n+\n+**Step 4: Protocol Handler Execution**\n+\n+The workqueue executes the task by calling the registered protocol handler:\n+``handler(request, request_sz, &response, &response_sz)``. The handler processes\n+the request, allocates a response buffer in memory (DDR), builds the response\n+data, and returns the response pointer and size. For the discovery protocol,\n+the DOE EP core handles this directly without invoking an external handler.\n+\n+**Step 5: DOE EP Core → EP Controller Driver**\n+\n+The DOE EP core waits for the handler to complete by the work queue, and returns\n+the response pointer and size to the controller driver.\n+\n+**Step 6: EP Controller Driver → Root Complex**\n+\n+The controller driver converts the response from CPU-native format to\n+little-endian format using ``cpu_to_le32()``, writes the response to DOE read\n+mailbox register, and sets the READY bit in the DOE Status register. The root\n+complex then reads the response from the read mailbox register. Finally,\n+the controller driver frees both the request buffer (which it allocated) and the\n+response buffer (which the handler allocated).\n+\n+Abort Handling\n+--------------\n+\n+The DOE specification allows the root complex to abort ongoing DOE operations\n+by setting the ABORT bit in the DOE Control register.\n+\n+**Trigger**\n+\n+When the root complex sets the ABORT bit, the EP controller driver detects this\n+condition (typically in an interrupt handler or register polling routine). The\n+action taken depends on the timing of the abort:\n+\n+- **ABORT during request transfer**: If the ABORT bit is set while the root complex\n+ is still transferring the request to the mailbox registers, the controller driver\n+ discards the request and no call to ``pci_ep_doe_abort()`` is needed.\n+\n+- **ABORT after request submission**: If the ABORT bit is set after the request\n+ has been fully received and submitted to the DOE EP core via\n+ ``pci_ep_doe_process_request()``, the controller driver must call\n+ ``pci_ep_doe_abort(epc, func_no, cap_offset)`` for the affected mailbox to\n+ perform abort sequence in the DOE EP core.\n+\n+**Abort Sequence**\n+\n+The abort function performs the following actions:\n+\n+1. Sets the CANCEL flag on the mailbox to prevent queued requests from starting\n+2. Flushes the workqueue to wait for any currently executing handler to complete\n+ (handlers cannot be interrupted mid-execution)\n+3. Clears the CANCEL flag to allow the mailbox to accept new requests\n+\n+Queued requests that have not started execution will be aborted with an error\n+status. The currently executing request will complete normally, and the controller\n+will reject the response if it arrives after the abort sequence has been triggered.\n+\n+.. note::\n+ Independent of when the ABORT bit is triggered, the controller driver must\n+ clear the ERROR, BUSY, and READY bits in the DOE Status register after\n+ completing the abort operation to reset the mailbox to an idle state.\n+\n+Error Handling\n+--------------\n+\n+Errors can occur during DOE request processing for various reasons, such as\n+unsupported protocols, handler failures, or memory allocation failures.\n+\n+**Error Detection**\n+\n+When an error occurs during DOE request processing, the DOE EP core propagates this error\n+back to the controller driver through the ``pci_ep_doe_process_request()`` return value.\n+\n+**Error Response**\n+\n+When the controller driver receives an error code from\n+``pci_ep_doe_process_request()``, it sets the ERROR bit in the DOE Status\n+register instead of writing a response to the read mailbox register,\n+and frees the buffers.\n", "prefixes": [ "RFC", "1/4" ] }