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GET /api/patches/2196312/?format=api
{ "id": 2196312, "url": "http://patchwork.ozlabs.org/api/patches/2196312/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260213112717.1256823-6-aswin.murugan@oss.qualcomm.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260213112717.1256823-6-aswin.murugan@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-02-13T11:27:16", "name": "[v2,5/6] dts: qcs615-ride-u-boot.dtsi: Add reboot-mode support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "36c0905de151a7c7d33ee1da7bbbec7c6e3c487f", "submitter": { "id": 90811, "url": "http://patchwork.ozlabs.org/api/people/90811/?format=api", "name": "Aswin Murugan", "email": "aswin.murugan@oss.qualcomm.com" }, "delegate": { "id": 151538, "url": "http://patchwork.ozlabs.org/api/users/151538/?format=api", "username": "kcxt", "first_name": "Casey", "last_name": "Connolly", "email": "casey.connolly@linaro.org" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260213112717.1256823-6-aswin.murugan@oss.qualcomm.com/mbox/", "series": [ { "id": 492084, "url": "http://patchwork.ozlabs.org/api/series/492084/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=492084", "date": "2026-02-13T11:27:11", "name": "qcom: Add NVMEM bitfield support and reboot‑mode integration", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492084/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196312/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196312/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=VquWJG70;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=R0CV9e0Z;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=85.214.62.61; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=oss.qualcomm.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"VquWJG70\";\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"R0CV9e0Z\";\n\tdkim-atps=neutral", "phobos.denx.de; dmarc=none (p=none dis=none)\n header.from=oss.qualcomm.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=aswin.murugan@oss.qualcomm.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de [85.214.62.61])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fC90B5S9Rz1xr1\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 13 Feb 2026 22:28:26 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 436B683E23;\n\tFri, 13 Feb 2026 12:28:14 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id 6C3A383E48; Fri, 13 Feb 2026 12:28:12 +0100 (CET)", "from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 2C3B183E21\n for <u-boot@lists.denx.de>; Fri, 13 Feb 2026 12:28:09 +0100 (CET)", "from pps.filterd (m0279866.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 61D547Nc1827717\n for <u-boot@lists.denx.de>; Fri, 13 Feb 2026 11:28:07 GMT", "from mail-pl1-f199.google.com (mail-pl1-f199.google.com\n [209.85.214.199])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4c9wg01arj-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for <u-boot@lists.denx.de>; Fri, 13 Feb 2026 11:28:07 +0000 (GMT)", "by mail-pl1-f199.google.com with SMTP id\n d9443c01a7336-2aae146bab0so12050865ad.0\n for <u-boot@lists.denx.de>; Fri, 13 Feb 2026 03:28:07 -0800 (PST)", "from hu-aswinm-blr.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. 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neil.armstrong@linaro.org, peng.fan@nxp.com, quentin.schulz@cherry.de,\n n-francis@ti.com, xypron.glpk@gmx.de, h-vm@ti.com, justin@tidylabs.net,\n jamie.gibbons@microchip.com, ycliang@andestech.com, me@samcday.com,\n sughosh.ganu@arm.com, gchan9527@gmail.com, ilias.apalodimas@linaro.org,\n Aswin Murugan <aswin.murugan@oss.qualcomm.com>", "Subject": "[PATCH v2 5/6] dts: qcs615-ride-u-boot.dtsi: Add reboot-mode support", "Date": "Fri, 13 Feb 2026 16:57:16 +0530", "Message-Id": "<20260213112717.1256823-6-aswin.murugan@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260213112717.1256823-1-aswin.murugan@oss.qualcomm.com>", "References": "<20260213112717.1256823-1-aswin.murugan@oss.qualcomm.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMjEzMDA4NyBTYWx0ZWRfX9Vgpr8HEmvP6\n ZQ3uHrfRW2oDnLSDLLY5ZqdV4gNokY2y+yOTPfI905cTkCANuecaVWavAb1rQTR5t7MH3AfcDIK\n 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definitions=2026-02-13_02,2026-02-12_03,2025-10-01_01", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n bulkscore=0 clxscore=1015 impostorscore=0 malwarescore=0 priorityscore=1501\n suspectscore=0 phishscore=0 lowpriorityscore=0 adultscore=0 spamscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602130087", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "The PM8150 PMIC on this platform uses the older PON (Power On) register\narchitecture rather than dedicated SDAM regions found in newer PMIC\ngenerations. To enable reboot-mode functionality with the unified\nNVMEM-based approach, add a compatibility wrapper that exposes PON\nregisters through the SDAM NVMEM interface.\n\nAdd device tree configuration:\n- NVMEM node with compatible \"qcom,spmi-sdam\" wrapping PON registers\n- Uses 'ranges' property to map the PON register block at offset 0x800\n- NVMEM cell at offset 0x8F (PON_SOFT_RB_SPARE register)\n- 7-bit field (bits [7:1]) for reboot reason, preserving bit 0\n- Mode mappings: bootloader=0x02, recovery=0x01\n\nThis wrapper allows the SDAM NVMEM driver to access PON registers\ntransparently, providing a unified interface for both PON-based (older)\nand SDAM-based (newer) PMIC generations.\n\nThe PON_SOFT_RB_SPARE register persists across warm resets and is\nautomatically cleared on power cycle.\n\nSigned-off-by: Aswin Murugan <aswin.murugan@oss.qualcomm.com>\n---\n arch/arm/dts/qcs615-ride-u-boot.dtsi | 26 ++++++++++++++++++++++++++\n 1 file changed, 26 insertions(+)", "diff": "diff --git a/arch/arm/dts/qcs615-ride-u-boot.dtsi b/arch/arm/dts/qcs615-ride-u-boot.dtsi\nindex 68fffc70fcb..50784807cf4 100644\n--- a/arch/arm/dts/qcs615-ride-u-boot.dtsi\n+++ b/arch/arm/dts/qcs615-ride-u-boot.dtsi\n@@ -11,4 +11,30 @@\n \t\t <0x0 0xc0000000 0x0 0xc0000000>,\n \t\t <0x1 0x80000000 0x1 0x00000000>;\n \t};\n+\n+\treboot-mode {\n+\t\tcompatible = \"nvmem-reboot-mode\";\n+\t\tnvmem-cells = <&reboot_reason>;\n+\t\tnvmem-cell-names = \"reboot-mode\";\n+\n+\t\tmode-bootloader = <0x02>;\n+\t\tmode-recovery = <0x01>;\n+\t};\n+};\n+\n+&pm8150_0 {\n+\t/* Virtual NVMEM node for PON-based reboot reason storage */\n+\tnvram@800 {\n+\t\tcompatible = \"qcom,spmi-sdam\";\n+\t\treg = <0x800>;\n+\t\t#address-cells = <1>;\n+\t\t#size-cells = <1>;\n+\t\tranges = <0x00 0x800 0x100>;\n+\n+\t\t/* Reboot reason cell at PON_SOFT_RB_SPARE (0x88F) */\n+\t\treboot_reason: reboot-reason@8f {\n+\t\t\treg = <0x8f 0x1>;\n+\t\t\tbits = <0x01 0x07>;\n+\t\t};\n+\t};\n };\n", "prefixes": [ "v2", "5/6" ] }