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GET /api/patches/2196243/?format=api
{ "id": 2196243, "url": "http://patchwork.ozlabs.org/api/patches/2196243/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260213-talos_usb-v1-3-4c4355d61437@oss.qualcomm.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260213-talos_usb-v1-3-4c4355d61437@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-02-13T09:01:20", "name": "[3/3] phy: qcom: qusb2: Add QCS615 QUSB2 PHY support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "6754a6c336d7e7d2ca2984da34d049cbeb447834", "submitter": { "id": 90810, "url": "http://patchwork.ozlabs.org/api/people/90810/?format=api", "name": "Balaji Selvanathan", "email": "balaji.selvanathan@oss.qualcomm.com" }, "delegate": { "id": 151538, "url": "http://patchwork.ozlabs.org/api/users/151538/?format=api", "username": "kcxt", "first_name": "Casey", "last_name": "Connolly", "email": "casey.connolly@linaro.org" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260213-talos_usb-v1-3-4c4355d61437@oss.qualcomm.com/mbox/", "series": [ { "id": 492067, "url": "http://patchwork.ozlabs.org/api/series/492067/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=492067", "date": "2026-02-13T09:01:18", "name": "Enable USB High-Speed support for QCS615", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/492067/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196243/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196243/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=YOKEvwtJ;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=cEvrTkyV;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=none (p=none dis=none) header.from=oss.qualcomm.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com\n header.b=\"YOKEvwtJ\";\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.b=\"cEvrTkyV\";\n\tdkim-atps=neutral", "phobos.denx.de; dmarc=none (p=none dis=none)\n header.from=oss.qualcomm.com", "phobos.denx.de; spf=pass\n smtp.mailfrom=balaji.selvanathan@oss.qualcomm.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fC5lj51lbz1xvQ\n\tfor <incoming@patchwork.ozlabs.org>; Fri, 13 Feb 2026 20:02:25 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 79EC183DAE;\n\tFri, 13 Feb 2026 10:01:59 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id 79AB983DCA; Fri, 13 Feb 2026 10:01:57 +0100 (CET)", "from mx0a-0031df01.pphosted.com (mx0a-0031df01.pphosted.com\n [205.220.168.131])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id CEBFF83DAE\n for <u-boot@lists.denx.de>; Fri, 13 Feb 2026 10:01:53 +0100 (CET)", "from pps.filterd (m0279862.ppops.net [127.0.0.1])\n by mx0a-0031df01.pphosted.com (8.18.1.11/8.18.1.11) with ESMTP id\n 61D0CWef2734911\n for <u-boot@lists.denx.de>; Fri, 13 Feb 2026 09:01:52 GMT", "from mail-pl1-f200.google.com (mail-pl1-f200.google.com\n [209.85.214.200])\n by mx0a-0031df01.pphosted.com (PPS) with ESMTPS id 4c9s6wsnft-1\n (version=TLSv1.3 cipher=TLS_AES_128_GCM_SHA256 bits=128 verify=NOT)\n for <u-boot@lists.denx.de>; Fri, 13 Feb 2026 09:01:51 +0000 (GMT)", "by mail-pl1-f200.google.com with SMTP id\n d9443c01a7336-2aaeafeadbcso9359045ad.1\n for <u-boot@lists.denx.de>; Fri, 13 Feb 2026 01:01:51 -0800 (PST)", "from hu-bselvana-blr.qualcomm.com\n (blr-bdr-fw-01_GlobalNAT_AllZones-Outside.qualcomm.com. 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charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260213-talos_usb-v1-3-4c4355d61437@oss.qualcomm.com>", "References": "<20260213-talos_usb-v1-0-4c4355d61437@oss.qualcomm.com>", "In-Reply-To": "<20260213-talos_usb-v1-0-4c4355d61437@oss.qualcomm.com>", "To": "Sumit Garg <sumit.garg@kernel.org>, u-boot-qcom@groups.io,\n u-boot@lists.denx.de", "Cc": "Lukasz Majewski <lukma@denx.de>,\n Casey Connolly <casey.connolly@linaro.org>,\n Neil Armstrong <neil.armstrong@linaro.org>,\n Aswin Murugan <aswin.murugan@oss.qualcomm.com>,\n Tom Rini <trini@konsulko.com>,\n Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>,\n Biswapriyo Nath <nathbappai@gmail.com>,\n Alexey Minnekhanov <alexeymin@postmarketos.org>,\n Sumit Garg <sumit.garg@oss.qualcomm.com>", "X-Mailer": "b4 0.14.3", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1770973294; l=3550;\n i=balaji.selvanathan@oss.qualcomm.com; s=20260213; h=from:subject:message-id;\n bh=Hs8uJF6yVvofSbx/TcZpADn0OHyi0Op8ojD2tpTfM+g=;\n b=Uw84D0Fwv3EWBaDMU6Vt3B4d8o6p19O7E4P1a3T3PYhUCof8QQNAB59uV9XU0Ef0QcFm/YVJC\n ObwakOwlsAMDGP7dSbV+xME0eq3s7HA7DRaZfzRXKTWFGdNQwwxp8z/", "X-Developer-Key": "i=balaji.selvanathan@oss.qualcomm.com; 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The implementation reuses\nthe IPQ6018 register layout and defines QCS615-specific tuning\nparameters for proper USB PHY operation.\n\nTaken from Linux commit 8adbf20e0502 (\"phy: qcom-qusb2: Add support for QCS615\")\n\nSigned-off-by: Balaji Selvanathan <balaji.selvanathan@oss.qualcomm.com>\nReviewed-by: Sumit Garg <sumit.garg@oss.qualcomm.com>\nReviewed-by: Neil Armstrong <neil.armstrong@linaro.org>\n---\nChanges in v3:\n- No changes in v3\n\nChanges in v2:\n- Updated to the reference commit for the QCS615 QUSB2 PHY support\n---\n drivers/phy/qcom/phy-qcom-qusb2.c | 38 ++++++++++++++++++++++++++++++++++++++\n 1 file changed, 38 insertions(+)", "diff": "diff --git a/drivers/phy/qcom/phy-qcom-qusb2.c b/drivers/phy/qcom/phy-qcom-qusb2.c\nindex 9e821365c15..6278171b100 100644\n--- a/drivers/phy/qcom/phy-qcom-qusb2.c\n+++ b/drivers/phy/qcom/phy-qcom-qusb2.c\n@@ -176,6 +176,19 @@ static const unsigned int sm6115_regs_layout[] = {\n \t[QUSB2PHY_PORT_POWERDOWN] = 0xb4, [QUSB2PHY_INTR_CTRL] = 0xbc,\n };\n \n+static const unsigned int ipq6018_regs_layout[] = {\n+\t[QUSB2PHY_PLL_STATUS] = 0x38,\n+\t[QUSB2PHY_PORT_TUNE1] = 0x80,\n+\t[QUSB2PHY_PORT_TUNE2] = 0x84,\n+\t[QUSB2PHY_PORT_TUNE3] = 0x88,\n+\t[QUSB2PHY_PORT_TUNE4] = 0x8C,\n+\t[QUSB2PHY_PORT_TUNE5] = 0x90,\n+\t[QUSB2PHY_PORT_TEST1] = 0x98,\n+\t[QUSB2PHY_PORT_TEST2] = 0x9C,\n+\t[QUSB2PHY_PORT_POWERDOWN] = 0xB4,\n+\t[QUSB2PHY_INTR_CTRL] = 0xBC,\n+};\n+\n static const struct qusb2_phy_init_tbl msm8996_init_tbl[] = {\n \tQUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xf8),\n \tQUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0xb3),\n@@ -189,6 +202,19 @@ static const struct qusb2_phy_init_tbl msm8996_init_tbl[] = {\n \tQUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_PWR_CTRL, 0x00),\n };\n \n+static const struct qusb2_phy_init_tbl qcs615_init_tbl[] = {\n+\tQUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE1, 0xc8),\n+\tQUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE2, 0xb3),\n+\tQUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE3, 0x83),\n+\tQUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TUNE4, 0xc0),\n+\tQUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_TUNE, 0x30),\n+\tQUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL1, 0x79),\n+\tQUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_USER_CTL2, 0x21),\n+\tQUSB2_PHY_INIT_CFG_L(QUSB2PHY_PORT_TEST2, 0x14),\n+\tQUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_AUTOPGM_CTL1, 0x9f),\n+\tQUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_PWR_CTRL, 0x00),\n+};\n+\n static const struct qusb2_phy_init_tbl qusb2_v2_init_tbl[] = {\n \tQUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_ANALOG_CONTROLS_TWO, 0x03),\n \tQUSB2_PHY_INIT_CFG(QUSB2PHY_PLL_CLOCK_INVERTERS, 0x7c),\n@@ -260,6 +286,16 @@ static const struct qusb2_phy_cfg sdm660_phy_cfg = {\n \t.autoresume_en = BIT(3),\n };\n \n+static const struct qusb2_phy_cfg qcs615_phy_cfg = {\n+\t.tbl = qcs615_init_tbl,\n+\t.tbl_num = ARRAY_SIZE(qcs615_init_tbl),\n+\t.regs = ipq6018_regs_layout,\n+\n+\t.disable_ctrl = (CLAMP_N_EN | FREEZIO_N | POWER_DOWN),\n+\t.mask_core_ready = PLL_LOCKED,\n+\t.autoresume_en = BIT(0),\n+};\n+\n static const struct qusb2_phy_cfg qusb2_v2_phy_cfg = {\n \t.tbl = qusb2_v2_init_tbl,\n \t.tbl_num = ARRAY_SIZE(qusb2_v2_init_tbl),\n@@ -467,6 +503,8 @@ static const struct udevice_id qusb2phy_ids[] = {\n \t{ .compatible = \"qcom,qusb2-phy\" },\n \t{ .compatible = \"qcom,qcm2290-qusb2-phy\",\n \t .data = (ulong)&sm6115_phy_cfg },\n+\t{ .compatible = \"qcom,qcs615-qusb2-phy\",\n+\t .data = (ulong)&qcs615_phy_cfg },\n \t{ .compatible = \"qcom,sdm660-qusb2-phy\",\n \t .data = (ulong)&sdm660_phy_cfg },\n \t{ .compatible = \"qcom,sm6115-qusb2-phy\",\n", "prefixes": [ "3/3" ] }