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GET /api/patches/2196222/?format=api
{ "id": 2196222, "url": "http://patchwork.ozlabs.org/api/patches/2196222/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260213055342.3124872-2-anup.patel@oss.qualcomm.com/", "project": { "id": 67, "url": "http://patchwork.ozlabs.org/api/projects/67/?format=api", "name": "OpenSBI development", "link_name": "opensbi", "list_id": "opensbi.lists.infradead.org", "list_email": "opensbi@lists.infradead.org", "web_url": "https://github.com/riscv/opensbi", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "https://github.com/riscv/opensbi/commit/{}" }, "msgid": "<20260213055342.3124872-2-anup.patel@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-02-13T05:53:35", "name": "[v2,1/8] lib: sbi_irqchip: Use chip as variable name for irqchip device", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "a1c63bc5176389b55ebbe84c46dfa91974b44b03", "submitter": { "id": 92322, "url": "http://patchwork.ozlabs.org/api/people/92322/?format=api", "name": "Anup Patel", "email": "anup.patel@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260213055342.3124872-2-anup.patel@oss.qualcomm.com/mbox/", "series": [ { "id": 492060, "url": "http://patchwork.ozlabs.org/api/series/492060/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=492060", "date": "2026-02-13T05:53:41", "name": "Extend irqchip framework for M-mode interrupts", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492060/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196222/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196222/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=aPWUkyp2;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=h+JELb8D;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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Fri, 13 Feb 2026 11:23:42 +0530 (+0530)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20210309; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=3bQLvmdHRXoVl3DdDKL5OaTALmWfF8+1WSG/P2QIZ+U=; b=aPWUkyp2Y+80ar\n\thsidlz6nYWNEUonkvf57078hXDViG/l9WC7LWvQaU6DQBI/w924uDZwkkPuV8lVhVytlpdMjW1XqT\n\tTXwbV6M2eOR4An/JqDUFX6m6SAf1yiqOUoGlRd1LxQz1/yz09BfALyHbwOoMWsx6Cp3/FxHf0G+gi\n\tS8MvNUR4nFAXojjvtfXK6hV0fZ5gPHLbOgflc4n7NDNQo2kQyvc62ycnwfacS7DDopjugKovogV5O\n\tbDtDiQC0+lMCpUIP3WIgkYZmP5GiwhFh8dGdK17NK1hjy3rrNSI1B9aGAu19OUYCcIDCWuQIY3chp\n\tivVhhxHBpXh5hrg03kbw==;", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:date:from:in-reply-to:message-id\n\t:mime-version:references:subject:to; s=qcppdkim1; bh=11dbYlNZTUu\n\tzVFkAZ8IK+71L+3pmEDTFnOAd7uxoXRk=; b=h+JELb8DGK/RXgNwBIlyEDdp/j3\n\tct4sOwK+IRWMRupsSDHD0QFUGFLYkFvy+e78zROXjLOQZ2Z0DQnNRdgUtl5uKNTY\n\tvPBWb6SgvTyGIAdqAvVsmjeeAvC6HRAr4apyOYk3hhSADkCLypOJSTDyRgiNGL0D\n\tZ59Km5b1cp52T8loc04YFoGMEhbw19xZSaWtUhyqubsanafm8axS+zCf1rGAIcj9\n\toE2B0HWfgxMPJgZoj0Frnv0XA+LIOMZqgZQddMLGmP1jnJCZ33OLvdd2CvJyaU68\n\tuytsIM2n+8Jpcw6L4ShbEyaLK7Losanc0WHdQ6fc1Q/JTw+aZQay6+jKFdg==" ], "From": "Anup Patel <anup.patel@oss.qualcomm.com>", "To": "Atish Patra <atish.patra@linux.dev>", "Cc": "Andrew Jones <andrew.jones@oss.qualcomm.com>,\n Raymond Mao <raymond.mao@riscstar.com>,\n Dave Patel <dave.patel@riscstar.com>,\n Samuel Holland <samuel.holland@sifive.com>,\n Anup Patel <anup@brainfault.org>, opensbi@lists.infradead.org,\n Anup Patel <anup.patel@oss.qualcomm.com>", "Subject": "[PATCH v2 1/8] lib: sbi_irqchip: Use chip as variable name for\n irqchip device", "Date": "Fri, 13 Feb 2026 11:23:35 +0530", "Message-ID": "<20260213055342.3124872-2-anup.patel@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260213055342.3124872-1-anup.patel@oss.qualcomm.com>", "References": "<20260213055342.3124872-1-anup.patel@oss.qualcomm.com>", "MIME-Version": "1.0", "X-QCInternal": [ "smtphost", "smtphost" ], "X-Proofpoint-Virus-Version": [ "vendor=nai engine=6200 definitions=5800\n signatures=585085", "vendor=nai engine=6200 definitions=5800\n signatures=585085", "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-02-12_05,2026-02-12_03,2025-10-01_01" ], "X-Proofpoint-ORIG-GUID": "p2fZ492y0WLAIc3Udr_8B90jGFxLVGag", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMjEzMDA0MiBTYWx0ZWRfX1gnyZTDnsGrJ\n RKzV4s8gkOCUhE6OG1DC2BUvpRuBABOiBlWd0EykAL/9bThx7qMGzZQvowBvKCbaDEZR/HYydeN\n qY+1Ht9CspJvtcOBsRr4ATjtoDHvVCGgoE6WiFyU2Uy9hTmEV8am5Tz3dNBgc8Wh3pvs+vycTCX\n 4iNRfisq1baz3hlZGXW0eOHRJD7wupqAK5FtigDEfwt5fT8dzv6uFzgNtBk8qjo7ycYgb+tAH8q\n wiIypOcxRKUur/LMH2uHnZbG56MsSHqfDKEq2YUWVz0Px+SkSfq1yj0+aFpji/rXtD/dwyTFTC2\n ZG8ohPZy81Lbhhq4CY91+vaFeUPRtqs0lZrpfVtudoVGqAVfvDFtOHXyxZpQsNyKLpn/2NWv9w6\n yTS+GdMs3A/DR8XxcBGBE0tFwAQp1qRhPi9eVNXfof5lZNmF7qIFDTXnpeBjvnXQn2ZajgYwmKt\n OA16DAGGlKDel5Uh0uQ==", "X-Authority-Analysis": "v=2.4 cv=LoOfC3dc c=1 sm=1 tr=0 ts=698ebc6a cx=c_pps\n a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22\n a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8 a=gh03vId5hNsAhgaDwcEA:9", "X-Proofpoint-GUID": "p2fZ492y0WLAIc3Udr_8B90jGFxLVGag", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n lowpriorityscore=0 impostorscore=0 spamscore=0 phishscore=0 bulkscore=0\n malwarescore=0 adultscore=0 suspectscore=0 clxscore=1015 priorityscore=1501\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602130042", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20260212_215451_421222_A9430851 ", "X-CRM114-Status": "GOOD ( 14.62 )", "X-Spam-Score": "-2.7 (--)", "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: The irqchip device represents an interrupt controller so\n use\n chip as variable name instead of dev. This will avoid confusion as the\n sbi_irqchip\n framework grows. Signed-off-by: Anup Patel <anup.patel@oss.qualcomm.com>\n --- include/sbi/sbi_irqchip.h | 4 ++-- lib/sbi/sbi_irqchip.c | 16\n ++++++++--------\n 2 files changed, 10 insertions(+), 10 deletions(-)\n Content analysis details: (-2.7 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n 0.0 RCVD_IN_VALIDITY_CERTIFIED_BLOCKED RBL: ADMINISTRATOR NOTICE: The\n query to Validity was blocked. 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See\n https://knowledge.validity.com/hc/en-us/articles/20961730681243\n for more information.\n [205.220.168.131 listed in\n sa-accredit.habeas.com]\n -0.7 RCVD_IN_DNSWL_LOW RBL: Sender listed at https://www.dnswl.org/, low\n trust\n [205.220.168.131 listed in list.dnswl.org]\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS SPF: sender matches SPF record\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]", "X-BeenThere": "opensbi@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<opensbi.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/opensbi/>", "List-Post": "<mailto:opensbi@lists.infradead.org>", "List-Help": "<mailto:opensbi-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"opensbi\" <opensbi-bounces@lists.infradead.org>", "Errors-To": "opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "The irqchip device represents an interrupt controller so use chip\nas variable name instead of dev. This will avoid confusion as the\nsbi_irqchip framework grows.\n\nSigned-off-by: Anup Patel <anup.patel@oss.qualcomm.com>\n---\n include/sbi/sbi_irqchip.h | 4 ++--\n lib/sbi/sbi_irqchip.c | 16 ++++++++--------\n 2 files changed, 10 insertions(+), 10 deletions(-)", "diff": "diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h\nindex e0ae12f5..97332248 100644\n--- a/include/sbi/sbi_irqchip.h\n+++ b/include/sbi/sbi_irqchip.h\n@@ -21,7 +21,7 @@ struct sbi_irqchip_device {\n \tstruct sbi_dlist node;\n \n \t/** Initialize per-hart state for the current hart */\n-\tint (*warm_init)(struct sbi_irqchip_device *dev);\n+\tint (*warm_init)(struct sbi_irqchip_device *chip);\n \n \t/** Handle an IRQ from this irqchip */\n \tint (*irq_handle)(void);\n@@ -38,7 +38,7 @@ struct sbi_irqchip_device {\n int sbi_irqchip_process(void);\n \n /** Register an irqchip device to receive callbacks */\n-void sbi_irqchip_add_device(struct sbi_irqchip_device *dev);\n+void sbi_irqchip_add_device(struct sbi_irqchip_device *chip);\n \n /** Initialize interrupt controllers */\n int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot);\ndiff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c\nindex 0594e05a..8a71b88f 100644\n--- a/lib/sbi/sbi_irqchip.c\n+++ b/lib/sbi/sbi_irqchip.c\n@@ -25,19 +25,19 @@ int sbi_irqchip_process(void)\n \treturn ext_irqfn();\n }\n \n-void sbi_irqchip_add_device(struct sbi_irqchip_device *dev)\n+void sbi_irqchip_add_device(struct sbi_irqchip_device *chip)\n {\n-\tsbi_list_add_tail(&dev->node, &irqchip_list);\n+\tsbi_list_add_tail(&chip->node, &irqchip_list);\n \n-\tif (dev->irq_handle)\n-\t\text_irqfn = dev->irq_handle;\n+\tif (chip->irq_handle)\n+\t\text_irqfn = chip->irq_handle;\n }\n \n int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)\n {\n \tint rc;\n \tconst struct sbi_platform *plat = sbi_platform_ptr(scratch);\n-\tstruct sbi_irqchip_device *dev;\n+\tstruct sbi_irqchip_device *chip;\n \n \tif (cold_boot) {\n \t\trc = sbi_platform_irqchip_init(plat);\n@@ -45,10 +45,10 @@ int sbi_irqchip_init(struct sbi_scratch *scratch, bool cold_boot)\n \t\t\treturn rc;\n \t}\n \n-\tsbi_list_for_each_entry(dev, &irqchip_list, node) {\n-\t\tif (!dev->warm_init)\n+\tsbi_list_for_each_entry(chip, &irqchip_list, node) {\n+\t\tif (!chip->warm_init)\n \t\t\tcontinue;\n-\t\trc = dev->warm_init(dev);\n+\t\trc = chip->warm_init(chip);\n \t\tif (rc)\n \t\t\treturn rc;\n \t}\n", "prefixes": [ "v2", "1/8" ] }