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GET /api/patches/2196217/?format=api
{ "id": 2196217, "url": "http://patchwork.ozlabs.org/api/patches/2196217/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260213055342.3124872-8-anup.patel@oss.qualcomm.com/", "project": { "id": 67, "url": "http://patchwork.ozlabs.org/api/projects/67/?format=api", "name": "OpenSBI development", "link_name": "opensbi", "list_id": "opensbi.lists.infradead.org", "list_email": "opensbi@lists.infradead.org", "web_url": "https://github.com/riscv/opensbi", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "https://github.com/riscv/opensbi/commit/{}" }, "msgid": "<20260213055342.3124872-8-anup.patel@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-02-13T05:53:41", "name": "[v2,7/8] lib: sbi_irqchip: Associate 32-bit unique ID for each irqchip device", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "fbee01ecd399db19ac94f81db5bb22b010591049", "submitter": { "id": 92322, "url": "http://patchwork.ozlabs.org/api/people/92322/?format=api", "name": "Anup Patel", "email": "anup.patel@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260213055342.3124872-8-anup.patel@oss.qualcomm.com/mbox/", "series": [ { "id": 492060, "url": "http://patchwork.ozlabs.org/api/series/492060/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=492060", "date": "2026-02-13T05:53:41", "name": "Extend irqchip framework for M-mode interrupts", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/492060/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196217/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196217/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=ndPBMyGf;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=fQFyQPUj;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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Fri, 13 Feb 2026 11:23:42 +0530 (+0530)" ], "DKIM-Signature": [ "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed;\n\td=lists.infradead.org; s=bombadil.20210309; h=Sender:\n\tContent-Transfer-Encoding:Content-Type:List-Subscribe:List-Help:List-Post:\n\tList-Archive:List-Unsubscribe:List-Id:MIME-Version:References:In-Reply-To:\n\tMessage-ID:Date:Subject:Cc:To:From:Reply-To:Content-ID:Content-Description:\n\tResent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc:Resent-Message-ID:\n\tList-Owner; bh=ORZnBTSTlCxED3Es4De6h4kxls5YTOnN6tjF4Zze1Cg=; b=ndPBMyGfh7EHAs\n\tYeohv5xkbHr/SqcQlz1dmdGy5mwRpp9b8u747F8gXesLG6oDBF8dM7d47HVXlqm+IhbRYPSAFrtz8\n\tpWSOOCfz7dNzoF4ok9NSDucr0nBnmXPYrYLu+z1y3YYWx34NfATXIPMRRqY1IZjYUUlSsEp+MYyJ/\n\tyASVVjmVklSuf4aD7d5A0alyBZ8mcpFWS2zVT94UyxTnRMzHPkB7/hQ1hcLncWwM5FQfX21NpdhH2\n\thgQCUrkN0XXwkgIhr+o1AX3DVrCyYsR4F91fcvq17P1TayET0mu0K74twP3jFqKO6FqV04e/+bK7i\n\tlDjiG8ze8Sf3MFiwAAYg==;", "v=1; a=rsa-sha256; c=relaxed/relaxed; d=qualcomm.com; h=\n\tcc:content-transfer-encoding:date:from:in-reply-to:message-id\n\t:mime-version:references:subject:to; s=qcppdkim1; bh=tT5IEdVPLD0\n\tEyOiVw6rHFRZb2p00+mAnH598aYKTxJE=; b=fQFyQPUj7U5m8vUyrKiSRW5GxdR\n\tkXYf7pvlFvKmYRU0bBSRBitXQQKtCd80ZWf9TfyPL3TZF+FfNqguEvCoeVTE1etr\n\t1e5zxFLWT3I2fC6H1HLdc2EqjYhUtXDe/iYzR2B8pyaE2vKV1dqBQ53DUqMrKji3\n\t/3LLA5yUnikYoWW8RQXQNPKNqRFYp6CbBv2cVoPStHDu6EL6yvq3kaOdETCZ0Bgy\n\t5EQCc7EIvmKKplqi6Gd4LbcGgTMnU8yrs6ZprpAe9dHmC8sZa8lxwAVr3E4Tc8d0\n\t1X0OBSU2dJ3HdbePeQewwwFQ/54Yv+TePTH8/5rdzImpuxwq+8PQaCFdRFA==" ], "From": "Anup Patel <anup.patel@oss.qualcomm.com>", "To": "Atish Patra <atish.patra@linux.dev>", "Cc": "Andrew Jones <andrew.jones@oss.qualcomm.com>,\n Raymond Mao <raymond.mao@riscstar.com>,\n Dave Patel <dave.patel@riscstar.com>,\n Samuel Holland <samuel.holland@sifive.com>,\n Anup Patel <anup@brainfault.org>, opensbi@lists.infradead.org,\n Anup Patel <anup.patel@oss.qualcomm.com>", "Subject": "[PATCH v2 7/8] lib: sbi_irqchip: Associate 32-bit unique ID for each\n irqchip device", "Date": "Fri, 13 Feb 2026 11:23:41 +0530", "Message-ID": "<20260213055342.3124872-8-anup.patel@oss.qualcomm.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260213055342.3124872-1-anup.patel@oss.qualcomm.com>", "References": "<20260213055342.3124872-1-anup.patel@oss.qualcomm.com>", "MIME-Version": "1.0", "X-QCInternal": [ "smtphost", "smtphost" ], "X-Proofpoint-Virus-Version": [ "vendor=nai engine=6200 definitions=5800\n signatures=585085", "vendor=nai engine=6200 definitions=5800\n signatures=585085", "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-02-12_05,2026-02-12_03,2025-10-01_01" ], "X-Proofpoint-ORIG-GUID": "C-qXk_0-NA_K-DKEmw_bxbXWceZrL2EP", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMjEzMDA0MiBTYWx0ZWRfXy31Dgr0RfcOM\n UdSDFsvG27wH0PsoBM8YzJicotyw0NF8PtCGi6Pv5RElw0ygte8X90lb1bNeyPFrbj32Rixgsff\n hMEYh1eZZ42syP1+9ZZ+4ztT8U4a/9SgyowxH/M6lO6jv9uQqhaiDVkaL9lTpIMsUb8mbiLsWsx\n LnVgyG4iCJMrqHWvk1UefXwZbNAW3FQ9jWSEzDh8sds8RzkSPmtzO6jnRNqMG96uo2Rk+vzGnm/\n RoMarGeyv09J/C3Gdsk4lCkDEQpbFgBZlSlcqOxKRiDAsq30qGpuTCR4kdJgV2TRyB1lehL8TDJ\n +pPvJJ8LarHVne7uot1/9fLfl0yHaCMdpt8io7aIeAHvviZ+jAHpqhmYN0zbb2IcmpA6mQ8xHWl\n jFidl/3GH6Xpe9uGRutv5DUhHt7t2Ru1j2tcGgZOn0dfeqFOIMaYS4RE2xND2XxrJQHLbjRIqv7\n s8vVhHpaQ+kgQ7QqNgw==", "X-Proofpoint-GUID": "C-qXk_0-NA_K-DKEmw_bxbXWceZrL2EP", "X-Authority-Analysis": "v=2.4 cv=CLInnBrD c=1 sm=1 tr=0 ts=698ebc6c cx=c_pps\n a=Ou0eQOY4+eZoSc0qltEV5Q==:117 a=Ou0eQOY4+eZoSc0qltEV5Q==:17\n a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22\n a=GgsMoib0sEa3-_RKJdDe:22 a=EUspDBNiAAAA:8 a=cJ7Lga2Aht15EmTzcLkA:9", "X-Proofpoint-Spam-Details": "rule=outbound_notspam policy=outbound score=0\n spamscore=0 adultscore=0 suspectscore=0 clxscore=1015 lowpriorityscore=0\n malwarescore=0 phishscore=0 priorityscore=1501 impostorscore=0 bulkscore=0\n classifier=typeunknown authscore=0 authtc= authcc= route=outbound adjust=0\n reason=mlx scancount=1 engine=8.22.0-2601150000 definitions=main-2602130042", "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ", "X-CRM114-CacheID": "sfid-20260212_215353_296921_94E76444 ", "X-CRM114-Status": "GOOD ( 14.65 )", "X-Spam-Score": "-2.7 (--)", "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam. The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: Allow locating irqchip device instance using a unique\n 32-bit\n ID. This 32-bit unique ID can be set by the irqchip driver at the time of\n adding irqchip device. Signed-off-by: Anup Patel\n <anup.patel@oss.qualcomm.com>\n --- include/sbi/sbi_irqchip.h | 6 ++++++ lib/sbi/sbi_irqchip.c | 15\n +++++++++++++++\n lib/utils/irqchip/aplic.c | 1 + lib/utils/irqchip/imsic.c | [...]\n Content analysis details: (-2.7 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n 0.0 RCVD_IN_VALIDITY_CERTIFIED_BLOCKED RBL: ADMINISTRATOR NOTICE: The\n query to Validity was blocked. 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See\n https://knowledge.validity.com/hc/en-us/articles/20961730681243\n for more information.\n [205.220.168.131 listed in\n bl.score.senderscore.com]", "X-BeenThere": "opensbi@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<opensbi.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/opensbi/>", "List-Post": "<mailto:opensbi@lists.infradead.org>", "List-Help": "<mailto:opensbi-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"opensbi\" <opensbi-bounces@lists.infradead.org>", "Errors-To": "opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "Allow locating irqchip device instance using a unique 32-bit ID. This\n32-bit unique ID can be set by the irqchip driver at the time of adding\nirqchip device.\n\nSigned-off-by: Anup Patel <anup.patel@oss.qualcomm.com>\n---\n include/sbi/sbi_irqchip.h | 6 ++++++\n lib/sbi/sbi_irqchip.c | 15 +++++++++++++++\n lib/utils/irqchip/aplic.c | 1 +\n lib/utils/irqchip/imsic.c | 1 +\n lib/utils/irqchip/plic.c | 1 +\n 5 files changed, 24 insertions(+)", "diff": "diff --git a/include/sbi/sbi_irqchip.h b/include/sbi/sbi_irqchip.h\nindex c3ded271..d2c47ae8 100644\n--- a/include/sbi/sbi_irqchip.h\n+++ b/include/sbi/sbi_irqchip.h\n@@ -21,6 +21,9 @@ struct sbi_irqchip_device {\n \t/** Node in the list of irqchip devices */\n \tstruct sbi_dlist node;\n \n+\t/** Unique ID of this irqchip */\n+\tu32 id;\n+\n \t/** Set of harts targetted by this irqchip */\n \tstruct sbi_hartmask target_harts;\n \n@@ -41,6 +44,9 @@ struct sbi_irqchip_device {\n */\n int sbi_irqchip_process(void);\n \n+/** Find an irqchip device based on unique ID */\n+struct sbi_irqchip_device *sbi_irqchip_find_device(u32 id);\n+\n /** Register an irqchip device to receive callbacks */\n int sbi_irqchip_add_device(struct sbi_irqchip_device *chip);\n \ndiff --git a/lib/sbi/sbi_irqchip.c b/lib/sbi/sbi_irqchip.c\nindex d3e58288..5df6189b 100644\n--- a/lib/sbi/sbi_irqchip.c\n+++ b/lib/sbi/sbi_irqchip.c\n@@ -30,6 +30,18 @@ int sbi_irqchip_process(void)\n \treturn hd->chip->process_hwirqs(hd->chip);\n }\n \n+struct sbi_irqchip_device *sbi_irqchip_find_device(u32 id)\n+{\n+\tstruct sbi_irqchip_device *chip;\n+\n+\tsbi_list_for_each_entry(chip, &irqchip_list, node) {\n+\t\tif (chip->id == id)\n+\t\t\treturn chip;\n+\t}\n+\n+\treturn NULL;\n+}\n+\n int sbi_irqchip_add_device(struct sbi_irqchip_device *chip)\n {\n \tstruct sbi_irqchip_hart_data *hd;\n@@ -39,6 +51,9 @@ int sbi_irqchip_add_device(struct sbi_irqchip_device *chip)\n \tif (!chip || !sbi_hartmask_weight(&chip->target_harts))\n \t\treturn SBI_EINVAL;\n \n+\tif (sbi_irqchip_find_device(chip->id))\n+\t\treturn SBI_EALREADY;\n+\n \tif (chip->process_hwirqs) {\n \t\tsbi_hartmask_for_each_hartindex(h, &chip->target_harts) {\n \t\t\tscratch = sbi_hartindex_to_scratch(h);\ndiff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c\nindex ea5cb7c4..d47a810b 100644\n--- a/lib/utils/irqchip/aplic.c\n+++ b/lib/utils/irqchip/aplic.c\n@@ -306,6 +306,7 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)\n \t}\n \n \t/* Register irqchip device */\n+\taplic->irqchip.id = aplic->unique_id;\n \trc = sbi_irqchip_add_device(&aplic->irqchip);\n \tif (rc)\n \t\treturn rc;\ndiff --git a/lib/utils/irqchip/imsic.c b/lib/utils/irqchip/imsic.c\nindex 5ec9dff4..0f296c89 100644\n--- a/lib/utils/irqchip/imsic.c\n+++ b/lib/utils/irqchip/imsic.c\n@@ -391,6 +391,7 @@ int imsic_cold_irqchip_init(struct imsic_data *imsic)\n \t}\n \n \t/* Register irqchip device */\n+\timsic_device.id = imsic->unique_id;\n \tsbi_hartmask_set_all(&imsic_device.target_harts);\n \trc = sbi_irqchip_add_device(&imsic_device);\n \tif (rc)\ndiff --git a/lib/utils/irqchip/plic.c b/lib/utils/irqchip/plic.c\nindex 25cc2787..973f7c2a 100644\n--- a/lib/utils/irqchip/plic.c\n+++ b/lib/utils/irqchip/plic.c\n@@ -280,6 +280,7 @@ int plic_cold_irqchip_init(struct plic_data *plic)\n \t}\n \n \t/* Register irqchip device */\n+\tplic->irqchip.id = plic->unique_id;\n \tplic->irqchip.warm_init = plic_warm_irqchip_init;\n \treturn sbi_irqchip_add_device(&plic->irqchip);\n }\n", "prefixes": [ "v2", "7/8" ] }