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GET /api/patches/2196208/?format=api
{ "id": 2196208, "url": "http://patchwork.ozlabs.org/api/patches/2196208/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260213040852.3340547-12-sherry.sun@nxp.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260213040852.3340547-12-sherry.sun@nxp.com>", "list_archive_url": null, "date": "2026-02-13T04:08:51", "name": "[V5,11/12] arm64: dts: imx8dxl/qm/qxp: Add Root Port node and PERST property", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "abba5f1ba9856206e772e59eeef6d23581b4ea95", "submitter": { "id": 77063, "url": "http://patchwork.ozlabs.org/api/people/77063/?format=api", "name": "Sherry Sun", "email": "sherry.sun@nxp.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260213040852.3340547-12-sherry.sun@nxp.com/mbox/", "series": [ { "id": 492056, "url": "http://patchwork.ozlabs.org/api/series/492056/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=492056", "date": "2026-02-13T04:08:40", "name": "pci-imx6: Add support for parsing the reset property in new Root Port binding", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/492056/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196208/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196208/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-47255-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", 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"DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=nxp.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=f27SUcPc/7GNnkQnoPRzUdp6Y0/1ifunguGbldvZAMc=;\n b=hs36aCvCYr27aQexVq0NoEjBTzDnf+NHsZAyFX7qaB/HZtrZfknyYtxSmNS6TiB8Df7y/CazDIutCcIi5Le5XHpMx6uGepi+4yck5RwrH3iJdpMn+RsTnKb5YuAEVI+BkUMs8y0sm9GcksyOTuYFZFr3g0mxx07gEvL4C3RD3ZqhBLjbqDA5CQ0taeiHSPQ+bLRBeahk6wcwFj/861ahkFsnn4ae1E2P/H/iobu20Z63scI1yUpUJGAme6P5vKPv+mwfXsWnyjjS2wy2MZLqISSzTdTTvboMJ6NWsuEeTVWfG3f8N+X+PlNDSHjR731QlGCR66qI9y/+qwYbcpAG/w==", "From": "Sherry Sun <sherry.sun@nxp.com>", "To": "hongxing.zhu@nxp.com,\n\tl.stach@pengutronix.de,\n\tFrank.Li@nxp.com,\n\tbhelgaas@google.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org,\n\ts.hauer@pengutronix.de,\n\tfestevam@gmail.com", "Cc": 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"X-OriginatorOrg": "nxp.com", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 237eca30-1dec-44aa-3d40-08de6ab59f11", "X-MS-Exchange-CrossTenant-AuthSource": "VI0PR04MB12114.eurprd04.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "13 Feb 2026 04:09:02.4143\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "686ea1d3-bc2b-4c6f-a92c-d99c5c301635", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n JPplaZ5pmd4C3elRT3hkQ9a/LgWCOe+94sSpGLVngEz5N/r5YSZr+vQyZiIu5DYHWWE0EDGuoqbWarOHiuBb0w==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "DU4PR04MB11900" }, "content": "Since describing the PCIe PERST# property under Host Bridge node is now\ndeprecated, it is recommended to add it to the Root Port node, so\ncreating the Root Port node and add the reset-gpios property in Root\nPort.\n\nSigned-off-by: Sherry Sun <sherry.sun@nxp.com>\n---\n .../boot/dts/freescale/imx8-ss-hsio.dtsi | 11 ++++++++++\n arch/arm64/boot/dts/freescale/imx8dxl-evk.dts | 5 +++++\n arch/arm64/boot/dts/freescale/imx8qm-mek.dts | 10 +++++++++\n .../boot/dts/freescale/imx8qm-ss-hsio.dtsi | 22 +++++++++++++++++++\n arch/arm64/boot/dts/freescale/imx8qxp-mek.dts | 5 +++++\n 5 files changed, 53 insertions(+)", "diff": "diff --git a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi\nindex 469de8b536b5..009990b2e559 100644\n--- a/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8-ss-hsio.dtsi\n@@ -78,6 +78,17 @@ pcieb: pcie@5f010000 {\n \t\tpower-domains = <&pd IMX_SC_R_PCIE_B>;\n \t\tfsl,max-link-speed = <3>;\n \t\tstatus = \"disabled\";\n+\n+\t\tpcieb_port0: pcie@0 {\n+\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\tdevice_type = \"pci\";\n+\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t#address-cells = <3>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tranges;\n+\t\t};\n \t};\n \n \tpcieb_ep: pcie-ep@5f010000 {\ndiff --git a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts\nindex 5c68d33e19f2..8f2c2bd00cde 100644\n--- a/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts\n+++ b/arch/arm64/boot/dts/freescale/imx8dxl-evk.dts\n@@ -651,6 +651,7 @@ &pcie0 {\n \tphy-names = \"pcie-phy\";\n \tpinctrl-0 = <&pinctrl_pcieb>;\n \tpinctrl-names = \"default\";\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pcieb>;\n \tvpcie3v3aux-supply = <®_pcieb>;\n@@ -667,6 +668,10 @@ &pcie0_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcieb_port0 {\n+\treset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;\n+};\n+\n &sai0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_sai0>;\ndiff --git a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts\nindex dadc136aec6e..02f7589bd860 100644\n--- a/arch/arm64/boot/dts/freescale/imx8qm-mek.dts\n+++ b/arch/arm64/boot/dts/freescale/imx8qm-mek.dts\n@@ -802,6 +802,7 @@ &pciea {\n \tphy-names = \"pcie-phy\";\n \tpinctrl-0 = <&pinctrl_pciea>;\n \tpinctrl-names = \"default\";\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&lsio_gpio4 29 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pciea>;\n \tvpcie3v3aux-supply = <®_pciea>;\n@@ -809,15 +810,24 @@ &pciea {\n \tstatus = \"okay\";\n };\n \n+&pciea_port0 {\n+\treset-gpios = <&lsio_gpio4 29 GPIO_ACTIVE_LOW>;\n+};\n+\n &pcieb {\n \tphys = <&hsio_phy 1 PHY_TYPE_PCIE 1>;\n \tphy-names = \"pcie-phy\";\n \tpinctrl-0 = <&pinctrl_pcieb>;\n \tpinctrl-names = \"default\";\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpio = <&lsio_gpio5 0 GPIO_ACTIVE_LOW>;\n \tstatus = \"disabled\";\n };\n \n+&pcieb_port0 {\n+\treset-gpios = <&lsio_gpio5 0 GPIO_ACTIVE_LOW>;\n+};\n+\n &qm_pwm_lvds0 {\n \tpinctrl-names = \"default\";\n \tpinctrl-0 = <&pinctrl_pwm_lvds0>;\ndiff --git a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi\nindex bd6e0aa27efe..48c29c2cfe8b 100644\n--- a/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi\n+++ b/arch/arm64/boot/dts/freescale/imx8qm-ss-hsio.dtsi\n@@ -40,6 +40,17 @@ pcie0: pciea: pcie@5f000000 {\n \t\tpower-domains = <&pd IMX_SC_R_PCIE_A>;\n \t\tfsl,max-link-speed = <3>;\n \t\tstatus = \"disabled\";\n+\n+\t\tpciea_port0: pcie@0 {\n+\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\tdevice_type = \"pci\";\n+\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t#address-cells = <3>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tranges;\n+\t\t};\n \t};\n \n \tpcie0_ep: pciea_ep: pcie-ep@5f000000 {\n@@ -90,6 +101,17 @@ pcie1: pcieb: pcie@5f010000 {\n \t\tpower-domains = <&pd IMX_SC_R_PCIE_B>;\n \t\tfsl,max-link-speed = <3>;\n \t\tstatus = \"disabled\";\n+\n+\t\tpcieb_port0: pcie@0 {\n+\t\t\tcompatible = \"pciclass,0604\";\n+\t\t\tdevice_type = \"pci\";\n+\t\t\treg = <0x0 0x0 0x0 0x0 0x0>;\n+\t\t\tbus-range = <0x01 0xff>;\n+\n+\t\t\t#address-cells = <3>;\n+\t\t\t#size-cells = <2>;\n+\t\t\tranges;\n+\t\t};\n \t};\n \n \tsata: sata@5f020000 {\ndiff --git a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts\nindex 40a0bc9f4e84..cd127d0a0a75 100644\n--- a/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts\n+++ b/arch/arm64/boot/dts/freescale/imx8qxp-mek.dts\n@@ -722,6 +722,7 @@ &pcie0 {\n \tphy-names = \"pcie-phy\";\n \tpinctrl-0 = <&pinctrl_pcieb>;\n \tpinctrl-names = \"default\";\n+\t/* This property is deprecated, use reset-gpios from the Root Port node. */\n \treset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;\n \tvpcie-supply = <®_pcieb>;\n \tvpcie3v3aux-supply = <®_pcieb>;\n@@ -738,6 +739,10 @@ &pcie0_ep {\n \tstatus = \"disabled\";\n };\n \n+&pcieb_port0 {\n+\treset-gpios = <&lsio_gpio4 0 GPIO_ACTIVE_LOW>;\n+};\n+\n &scu_key {\n \tstatus = \"okay\";\n };\n", "prefixes": [ "V5", "11/12" ] }