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GET /api/patches/2196051/?format=api
{ "id": 2196051, "url": "http://patchwork.ozlabs.org/api/patches/2196051/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260212191818.3625264-3-dcostantino@meta.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260212191818.3625264-3-dcostantino@meta.com>", "list_archive_url": null, "date": "2026-02-12T19:18:18", "name": "[2/2] PCI/EDR: Defer AER status clearing until after recovery", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "d0c7485e60eb23fde35cb48f5f0a89596a36a8e8", "submitter": { "id": 92636, "url": "http://patchwork.ozlabs.org/api/people/92636/?format=api", "name": "Danielle Costantino", "email": "dcostantino@meta.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260212191818.3625264-3-dcostantino@meta.com/mbox/", "series": [ { "id": 492009, "url": "http://patchwork.ozlabs.org/api/series/492009/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=492009", "date": "2026-02-12T19:18:16", "name": "PCI/DPC: Fix EDR recovery path issues", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/492009/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2196051/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2196051/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-47225-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=meta.com header.i=@meta.com header.a=rsa-sha256\n header.s=s2048-2025-q2 header.b=Z39RToor;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=104.64.211.4; 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Thu, 12 Feb 2026 19:18:40 +0000" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1770923930; cv=none;\n b=NsTmyt8RICTnD6cWVOkpD5RWVPTIT856+a1Cfa0OwMnUyncCRifGNofZsLZsVN/aGgDXN9HNIFUjj09TE05RBLBumjkFVaHD7L+DVp+4l+YB/lwSLsiYHkEqPmeq9xjKLBt1umhCP7Qb9KYxlJogIN0Oz6cpZPj5WVymDJJw/IU=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1770923930; c=relaxed/simple;\n\tbh=kUR6StiDe2WeVmqIkvE6C1qvVpVUa+eyJHM+m+aKmHA=;\n\th=From:To:CC:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version:Content-Type;\n b=G/FOCe/OnEfqYdR+643G5Ec1WHh4eHKJJ5j+wlo6x+ugSopSM3NEZ1eMRLtikySFxq7HJwIvvXf3QUyCOIolVEtfByTvQCueRzLXEugDcEX0UU3XDrX+uJFFOg1OZwUwCjlsTZNvgB2UAeajezK3xAazOu/W5LtlKCtXQD5Efic=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=reject dis=none) header.from=meta.com;\n spf=pass smtp.mailfrom=meta.com;\n dkim=pass (2048-bit key) header.d=meta.com header.i=@meta.com\n header.b=Z39RToor; arc=none smtp.client-ip=67.231.153.30", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=meta.com; h=cc\n\t:content-transfer-encoding:content-type:date:from:in-reply-to\n\t:message-id:mime-version:references:subject:to; s=s2048-2025-q2;\n\t bh=oEg/nOuHSJEugT3L2lIPkGpNuTunBHt89TgbejE0VjA=; b=Z39RToorDyWT\n\tWL+aiv91Y4A/+8jqum4WnpQNZOTz2m4OQxt/GFiwY1xYod8E0DVyIbzLAgnPoVzE\n\tV1gEtzgSuI4lN91tf+/lfyscFEFu15b+loM5XfNX3VPOB2YAuxjdQR5feWt4EO5N\n\tfwHQ1DC9ZtZ9oJzwvXNudk1tPaPveApikMUwQgJ6LL7aS/bdqh3KBpHqUWOzwThP\n\tvSQzZbwvWoSL+0yU7aSv1FoQckIPk22E/JgQBRmUzVgIFrgueknjvbl6YU4MOM0u\n\tUUzvejpZMgn5RyD+LLQasMjKHeMi4Uu+hFAwTk5vJ4XsxajxUCMmTlE85WIBoN8/\n\tO4RAKC7p6Q==", "From": "Danielle Costantino <dcostantino@meta.com>", "To": "Bjorn Helgaas <bhelgaas@google.com>", "CC": "Keith Busch <kbusch@kernel.org>,\n Kuppuswamy Sathyanarayanan\n\t<sathyanarayanan.kuppuswamy@linux.intel.com>,\n Lukas Wunner <lukas@wunner.de>,\n Mahesh J Salgaonkar <mahesh@linux.ibm.com>,\n Oliver O'Halloran\n\t<oohall@gmail.com>, <linux-pci@vger.kernel.org>,\n Danielle Costantino\n\t<dcostantino@meta.com>", "Subject": "[PATCH 2/2] PCI/EDR: Defer AER status clearing until after recovery", "Date": "Thu, 12 Feb 2026 11:18:18 -0800", "Message-ID": "<20260212191818.3625264-3-dcostantino@meta.com>", "X-Mailer": "git-send-email 2.47.3", "In-Reply-To": "<20260212191818.3625264-1-dcostantino@meta.com>", "References": "<20260212191818.3625264-1-dcostantino@meta.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-Proofpoint-GUID": "JmcW_7QRoum2pyf32Tx95zYwZ1EI80nI", "X-Proofpoint-Spam-Details-Enc": "AW1haW4tMjYwMjEyMDE0OSBTYWx0ZWRfX7KRRP8YQ4ULJ\n 37FTaAm43KlkDkifFFP7U9bZWrJbWhgVjuhpXlCm3MTs3EjcGLjfsT6bkfHNKaBKdtakWRc3jGf\n +ov9LLIv93FRRZzk4tzmV5hgcuMXpa5XGFs8HsYaPyOvs//c8rH99QQ3hFAGvTlFVjdlSnbpVTS\n HHXidCFgtSK+bBk8mNqH8RbUC64R7TI0+zXW0n8op1c2QB+F5tzL3FD7Pbdq/juV5VpaSKyzNwL\n UcGvqKZwvx5yeqpp3f6TvrYXNRCGt/eBKGAzxipAg9Cq+NV6R5fS5My4U6zbTBzZUUalFi0M5k3\n bdESfeYYg9SX0GKg8rowpIaAH/8LcZGi/SPHyZ5cT0Qcc/EAbe7BsK/N8h1Upna3/s4XjBzVwnt\n xWczO62GBfSTBm6VsPUWZZ1/g0kMt7nyfXbQSjAfU3edi4xO6P+F1/Alynv72jMilq87HpnN0xf\n kdLdSSn0ZfkUp3wz1qA==", "X-Proofpoint-ORIG-GUID": "JmcW_7QRoum2pyf32Tx95zYwZ1EI80nI", "X-Authority-Analysis": "v=2.4 cv=brNBxUai c=1 sm=1 tr=0 ts=698e2792 cx=c_pps\n a=CB4LiSf2rd0gKozIdrpkBw==:117 a=CB4LiSf2rd0gKozIdrpkBw==:17\n a=HzLeVaNsDn8A:10 a=VkNPw1HP01LnGYTKEx00:22 a=Mpw57Om8IfrbqaoTuvik:22\n a=GgsMoib0sEa3-_RKJdDe:22 a=VabnemYjAAAA:8 a=dkVm-Xf8ABp1oUq4d-oA:9\n a=gKebqoRLp9LExxC7YDUY:22", "X-Proofpoint-Virus-Version": "vendor=baseguard\n engine=ICAP:2.0.293,Aquarius:18.0.1121,Hydra:6.1.51,FMLib:17.12.100.49\n definitions=2026-02-12_05,2026-02-12_03,2025-10-01_01" }, "content": "edr_handle_event() calls pci_aer_raw_clear_status() immediately after\ndpc_process_error() but before pcie_do_recovery(). While\ndpc_process_error() has already read and logged the AER uncorrectable\nstatus by this point, clearing the registers before recovery means\nthat driver error_detected/slot_reset/resume callbacks invoked by\npcie_do_recovery() can no longer inspect the AER status to make their\nown decisions.\n\nAdditionally, in the firmware-first EDR path, the normal AER clearing\ninside pcie_do_recovery() is a no-op because pcie_aer_is_native()\nreturns false, so pci_aer_raw_clear_status() in edr_handle_event() is\nthe only place these registers get cleared. Moving it after recovery\ncompletes keeps the diagnostic data available throughout the entire\nrecovery sequence.\n\nMove pci_aer_raw_clear_status() to after pcie_do_recovery() returns so\nAER registers remain readable during the full recovery sequence.\n\nFixes: ac1c8e35a326 (\"PCI/DPC: Add Error Disconnect Recover (EDR) support\")\nSigned-off-by: Danielle Costantino <dcostantino@meta.com>\n---\n drivers/pci/pcie/edr.c | 11 ++++++++++-\n 1 file changed, 10 insertions(+), 1 deletion(-)", "diff": "diff --git a/drivers/pci/pcie/edr.c b/drivers/pci/pcie/edr.c\nindex e86298dbbcff..94a0e5e58fea 100644\n--- a/drivers/pci/pcie/edr.c\n+++ b/drivers/pci/pcie/edr.c\n@@ -191,7 +191,6 @@ static void edr_handle_event(acpi_handle handle, u32 event, void *data)\n \t}\n \n \tdpc_process_error(edev);\n-\tpci_aer_raw_clear_status(edev);\n \n \t/*\n \t * Irrespective of whether the DPC event is triggered by ERR_FATAL\n@@ -200,6 +199,16 @@ static void edr_handle_event(acpi_handle handle, u32 event, void *data)\n \t */\n \testate = pcie_do_recovery(edev, pci_channel_io_frozen, dpc_reset_link);\n \n+\t/*\n+\t * Clear AER status only after pcie_do_recovery() completes.\n+\t * dpc_process_error() has already read and logged the AER\n+\t * status above. Deferring the clear keeps diagnostic data\n+\t * available to driver callbacks invoked during recovery and\n+\t * avoids interfering with any AER status reads they may\n+\t * perform.\n+\t */\n+\tpci_aer_raw_clear_status(edev);\n+\n send_ost:\n \n \t/*\n", "prefixes": [ "2/2" ] }