Patch Detail
get:
Show a patch.
patch:
Update a patch.
put:
Update a patch.
GET /api/patches/2195912/?format=api
{ "id": 2195912, "url": "http://patchwork.ozlabs.org/api/patches/2195912/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260212102847.1560553-2-s-joshi@ti.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260212102847.1560553-2-s-joshi@ti.com>", "list_archive_url": null, "date": "2026-02-12T10:28:47", "name": "[v2,1/1] board: toradex: Make A53 get RAM size from DT in K3 boards", "commit_ref": null, "pull_url": null, "state": "accepted", "archived": false, "hash": "4f74a8a18307ad86bbaf5824759896d3043e171a", "submitter": { "id": 92409, "url": "http://patchwork.ozlabs.org/api/people/92409/?format=api", "name": "Suhaas Joshi", "email": "s-joshi@ti.com" }, "delegate": { "id": 3651, "url": "http://patchwork.ozlabs.org/api/users/3651/?format=api", "username": "trini", "first_name": "Tom", "last_name": "Rini", "email": "trini@ti.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260212102847.1560553-2-s-joshi@ti.com/mbox/", "series": [ { "id": 491955, "url": "http://patchwork.ozlabs.org/api/series/491955/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=491955", "date": "2026-02-12T10:28:47", "name": "Fix regression caused in Verdin boards by 42b3ee7fa524", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/491955/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195912/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195912/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.a=rsa-sha256\n header.s=selector1 header.b=JIyVC7lb;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=lists.denx.de\n (client-ip=2a01:238:438b:c500:173d:9f52:ddab:ee01; helo=phobos.denx.de;\n envelope-from=u-boot-bounces@lists.denx.de; receiver=patchwork.ozlabs.org)", "phobos.denx.de;\n dmarc=pass (p=quarantine dis=none) header.from=ti.com", "phobos.denx.de;\n spf=pass smtp.mailfrom=u-boot-bounces@lists.denx.de", "phobos.denx.de;\n\tdkim=pass (1024-bit key;\n unprotected) header.d=ti.com header.i=@ti.com header.b=\"JIyVC7lb\";\n\tdkim-atps=neutral", "phobos.denx.de;\n dmarc=pass (p=quarantine dis=none) header.from=ti.com", "phobos.denx.de; spf=pass smtp.mailfrom=s-joshi@ti.com" ], "Received": [ "from phobos.denx.de (phobos.denx.de\n [IPv6:2a01:238:438b:c500:173d:9f52:ddab:ee01])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4fBWks0pgyz1xr1\n\tfor <incoming@patchwork.ozlabs.org>; Thu, 12 Feb 2026 21:29:41 +1100 (AEDT)", "from h2850616.stratoserver.net (localhost [IPv6:::1])\n\tby phobos.denx.de (Postfix) with ESMTP id 5719583D5D;\n\tThu, 12 Feb 2026 11:29:33 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id 3594983D6C; Thu, 12 Feb 2026 11:29:32 +0100 (CET)", "from SN4PR2101CU001.outbound.protection.outlook.com\n (mail-southcentralusazlp170120001.outbound.protection.outlook.com\n [IPv6:2a01:111:f403:c10d::1])\n (using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id E069883DA7\n for <u-boot@lists.denx.de>; Thu, 12 Feb 2026 11:29:29 +0100 (CET)", "from CY8PR11CA0011.namprd11.prod.outlook.com (2603:10b6:930:48::16)\n by CY5PR10MB6047.namprd10.prod.outlook.com (2603:10b6:930:3c::15)\n with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.20.9611.10; Thu, 12 Feb\n 2026 10:29:27 +0000", "from CY4PEPF0000EDD7.namprd03.prod.outlook.com\n (2603:10b6:930:48:cafe::fb) by CY8PR11CA0011.outlook.office365.com\n (2603:10b6:930:48::16) with Microsoft SMTP Server (version=TLS1_3,\n cipher=TLS_AES_256_GCM_SHA384) id 15.20.9611.11 via Frontend Transport; Thu,\n 12 Feb 2026 10:29:25 +0000", "from lewvzet201.ext.ti.com (198.47.23.195) by\n CY4PEPF0000EDD7.mail.protection.outlook.com (10.167.241.203) with Microsoft\n SMTP Server (version=TLS1_2, cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id\n 15.20.9611.8 via Frontend Transport; Thu, 12 Feb 2026 10:29:26 +0000", "from DLEE203.ent.ti.com (157.170.170.78) by lewvzet201.ext.ti.com\n (10.4.14.104) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 12 Feb\n 2026 04:29:26 -0600", "from DLEE204.ent.ti.com (157.170.170.84) by DLEE203.ent.ti.com\n (157.170.170.78) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20; Thu, 12 Feb\n 2026 04:29:26 -0600", "from lelvem-mr06.itg.ti.com (10.180.75.8) by DLEE204.ent.ti.com\n (157.170.170.84) with Microsoft SMTP Server (version=TLS1_2,\n cipher=TLS_ECDHE_RSA_WITH_AES_256_GCM_SHA384) id 15.2.2562.20 via Frontend\n Transport; Thu, 12 Feb 2026 04:29:26 -0600", "from localhost (ula0507357.dhcp.ti.com [172.24.233.202])\n by lelvem-mr06.itg.ti.com (8.18.1/8.18.1) with ESMTP id 61CATPBJ2904588;\n Thu, 12 Feb 2026 04:29:25 -0600" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-1.1 required=5.0 tests=BAYES_00,DKIMWL_WL_HIGH,\n DKIM_SIGNED,DKIM_VALID,DKIM_VALID_AU,DKIM_VALID_EF,FORGED_SPF_HELO,\n RCVD_IN_DNSWL_BLOCKED,SPF_HELO_PASS,T_SPF_PERMERROR autolearn=no\n autolearn_force=no version=3.4.2", "ARC-Seal": "i=1; a=rsa-sha256; s=arcselector10001; d=microsoft.com; cv=none;\n b=WLZFf6utPPmiss4uUKsnnjnVSZE9BFhV2hZa3tmDw/iRw5ZDsEw/l8surdMrT3EsH8rNcFmV5TX8iLBjVQjPKYtDQD/RADAoiHyiwKcbsm2ANJt+xMSQj+VA3LH9t3AHUf65lhxzoNDzHb6IQSri2yvWtt+n0/BXxe9hTWjBB8FZp41shqov7lroPSmPBgHoHmigX3hq3s2IzAlRqtVEihaZLqAvnFECul8KA8HYaVScSA/tplN2lbwTwQB68SG1gnulqmtxX1AlJxwbMRi/CdtnIXni6uQGcSLds97+gvdtSA0f37rarxFRo77nY42wYraZIr8WIgJ/kPpVw+KNIg==", "ARC-Message-Signature": "i=1; a=rsa-sha256; c=relaxed/relaxed; d=microsoft.com;\n s=arcselector10001;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-AntiSpam-MessageData-ChunkCount:X-MS-Exchange-AntiSpam-MessageData-0:X-MS-Exchange-AntiSpam-MessageData-1;\n bh=MYWi3DbK7FK6bcbze2QbCHYQfbUtdUMMzECLFg3Zb/I=;\n b=QzzCyuJOEO7wQDiVJGH9oAFaGM8XN8ddZhYCT6o0RKrAhChdK/2SHLXsotkS9HRE5ukGHNW/cuyIrRRu1KfkeVlSybf9qQWgxiPjw508rwNwSqxpskGSJD4g5mz7GmdA7jgdS/o7UtWJujYPUPHmv/BB23hm0NCntpZvYTw9SmFTqQokyodNpGilNZpr0heOsx85RzXjmFztYohFuK3c1QuBvY3Q9JwLPVXHEk42O1/a5TCXZKDNTdNwx0yCmAeOh6iYimR4bfwjY3qc6o/PxAqeWbjInU2i3mSRItE/I2dwV4xA3V8ApR6MI+NICliSlqjkubh7os1fC1tVUVHJ+g==", "ARC-Authentication-Results": "i=1; mx.microsoft.com 1; spf=pass (sender ip is\n 198.47.23.195) smtp.rcpttodomain=phytec.com smtp.mailfrom=ti.com; dmarc=pass\n (p=quarantine sp=none pct=100) action=none header.from=ti.com; dkim=none\n (message not signed); arc=none (0)", "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=ti.com; s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=MYWi3DbK7FK6bcbze2QbCHYQfbUtdUMMzECLFg3Zb/I=;\n b=JIyVC7lbVdwKw5gmxDDYXWQ/HgFBvP7Y6wEt3paMXuITQIKmJentjNGbLmqLDLTIzNKnS2Xt1DZsTLYBu9XyI0/BLdnhGg96i+HwUWNbrjR4OR8jqfWTQ03CBnbvg0e6ZQmoI28rR1wcLy+nYX0Ndz/Zok6JdAMuykAZxg/FPcA=", "X-MS-Exchange-Authentication-Results": "spf=pass (sender IP is 198.47.23.195)\n smtp.mailfrom=ti.com; dkim=none (message not signed) header.d=none;\n dmarc=pass\n action=none header.from=ti.com;", "Received-SPF": "Pass (protection.outlook.com: domain of ti.com designates\n 198.47.23.195 as permitted sender) receiver=protection.outlook.com;\n client-ip=198.47.23.195; helo=lewvzet201.ext.ti.com; pr=C", "From": "Suhaas Joshi <s-joshi@ti.com>", "To": "<u-boot@lists.denx.de>", "CC": "<vigneshr@ti.com>, <trini@konsulko.com>, <n-francis@ti.com>,\n <s-tripathi1@ti.com>, <k-malarvizhi@ti.com>, <kamlesh@ti.com>,\n <vishalm@ti.com>, <d.schultz@phytec.de>, <w.egorov@phytec.de>,\n <francesco.dolcini@toradex.com>, <ggiordano@phytec.com>", "Subject": "[PATCH v2 1/1] board: toradex: Make A53 get RAM size from DT in K3\n boards", "Date": "Thu, 12 Feb 2026 15:58:47 +0530", "Message-ID": "<20260212102847.1560553-2-s-joshi@ti.com>", "X-Mailer": "git-send-email 2.34.1", "In-Reply-To": "<20260212102847.1560553-1-s-joshi@ti.com>", "References": "<20260212102847.1560553-1-s-joshi@ti.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-C2ProcessedOrg": "333ef613-75bf-4e12-a4b1-8e3623f5dcea", "X-EOPAttributedMessage": "0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "CY4PEPF0000EDD7:EE_|CY5PR10MB6047:EE_", "X-MS-Office365-Filtering-Correlation-Id": "c7fe9921-f749-4c10-af19-08de6a219933", "X-MS-Exchange-SenderADCheck": "1", "X-MS-Exchange-AntiSpam-Relay": "0", "X-Microsoft-Antispam": "BCL:0;\n ARA:13230040|36860700013|1800799024|376014|82310400026;", "X-Microsoft-Antispam-Message-Info": "\n S1mIbFBdipa5DYnXs6MK48qd9t5yylbp621P8md7+MxV1DQ/9ETIKvzDNL0/ruqxFP20qE9AW2/CnB49JMa/TX7OhU817tZkVEI+YvfS3JumHY3Ifpp77C19XTSW9+YiZN0BRE19xcHHbMbMKHyK8P9rCLjS0PUOQ+VVE8EdlkaCaZVA8nJXb4vGzvAu2iEQaomGEbhw/c5ocp+TPCdRR5pZQXQzOcrayb5gjnpNq0d8qTDn7h65e2NNvhsCpschkT4ULNWgpPPCvGOXW+Q17SmAHl5Mf4Dfog0sxhee6gxoPPUJpMac/iWAfffP7jSvRY9E2N64Ga1xEy6Fd/tuEddX3vvLFaYZYPGLhtsfqFoFCwZ/4TQce1XtDdNNI3//dZlPQmiGB7eImrA7xEQ40b4gXcCxFSgGMmLzSJh0i9Q52SzR5Rs5AsBeUK2Ha0BwBYxJWyDw/Y8ilDx6ZqLral/IRRjRVhTbkQf4Qqw6ozCaURUKPKxrWlfM3TxvL3en2ZY+c2bAOjK+vdW2P+0f52/GQbNOqluWkTk2KYwJP3GHNCz73cyNsvQOABl9Coi14AXM0/21X+ZFDcPjNsLsrM5mPPySmS2dsDJ+ki4BnC7sGrMVk4sUbOzXJOgtBBV9LKYrz5TcgmbnI3HyqatuYrhqZMSuF+8r9ZYwrtaclX/rZTmL6nC5CemNkmty15mD+nN3/mqnAZdg+dsw/o6Nc/82ibBZr5KvDNyF7J/AvBPV6AvfZWGEM0+COxFDqLzv1/2u1jWIX+XLqp/4t6aJ1n8WI14rrU/JyhoSOXlQtjdpXsM5mkOHXujgpWLlUguHhxsxEbg6L/9ukML8xzqZ3QIy9zRgEcLnF+0ov3aGCy7E+tYep4oTAqBXzPTyyorTwqXQ95ijjovVAgJkmyssg1F6xGOL2eNFL1xPpbe8s78C0er4XX9XqEsind2raavTfvKwNNGR+xAGDgDbuI8bOoVBiKW4X9P+VdIGBnlkcVFFROonbA94RcDdS6Hv/4cqoydQX5/vtDF4yNZSNuyXfrDMtdtV+9hpLm2QEeS07gSpCaNVCnvw6VgQ1ExPZe/fpa5RISFoi256od7GXwHRq3H57qIO8gdZKUJcqSNMDTKNRjO1YIav8y/+eMFumKHQE5bHpiILLqN2+jq7byQNgrRLJ6MHppgFGt2wS39j59AOVIAirnp4Yg9mbXFvyJ4DDh6JDvO7vKia8Ubh9LjZxw67zyW3B4yoWsfMw+7PptW80cJTIYXZ4MjniWGp4MGD8iRTaZGGKmqJEffY31riSyOzPQ3CcxcGUKpsmV1RlLi8nW3T1uSteQUxMUmsegB+qlUe8oK+/oZHlcJ7E2jnceHf2yQD1ugcL+2akpfJGMnTABvdphLG0HTMU4IBl3evKYJgCBn3myS6hPdI8kuzzXDnCuwT9kkXsghC4tLlgctwX4nb43izuaUStEoh/JF8wSfVXbJqRNiMPl1yEKKALONk4aRR6pfHenPPvAEkjEgWtWJj8XOUX/b51BVirJZb2RAlFBMrmLBh3aNmMOaO+BxLeLaquzj9nuw4ArjvDQqkmxdaTI6kuwTRQp/eShSs8Yqz62eP6slFIwAfMza911lyN7D42nzjZAz6FT2dIVzdWasN9UaDSA+//ClKk8XuAuOlTFB4VpTAN3d+32EWUA==", "X-Forefront-Antispam-Report": "CIP:198.47.23.195; CTRY:US; LANG:en; SCL:1; SRV:;\n IPV:NLI; SFV:NSPM; H:lewvzet201.ext.ti.com; PTR:InfoDomainNonexistent;\n CAT:NONE; SFS:(13230040)(36860700013)(1800799024)(376014)(82310400026);\n DIR:OUT; SFP:1101;", "X-MS-Exchange-AntiSpam-MessageData-ChunkCount": "1", "X-MS-Exchange-AntiSpam-MessageData-0": "\n 7om6i7oxa9afbM7LugmC3b17gTSUJzWvEiPZJsPR6f7vTL9P+r1pFYZ25D3nZ1I1ouwfI3yPFDTvSoFJqUPloNF1WGYLgOTL0qrK/j3daP/8HejDoEM8wFNGg9jL81FIR7y+G8qYpzjMrXFrbLraxMBQJhH0jHWHKF3tpOYJFLy2TBjOD0BpBeJBc68EP5+nfHNk7gyY9UfM7CCOM+Ct5Mi0n1Gacvm1qgxbpqhJKmqD+A5xbGoCduGJTiTz9Pw42c7hqcd8vDRKogqi4+5XKUkiIxI+6LDfKuXAMkziMd6MpNw3K8xVtKqtzn9Y9d7XJDtY41et2HvYmho8R92GGkyUprr2JTwS8peXr5RLf58ED/OY5FRkB8a+g3NI5QwwocmXVLrhAEH7zcI9FjkF9JXdEMbq6apDQWfYiyW5rSLFz0teraf/XVsjnDHucbXa", "X-OriginatorOrg": "ti.com", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "12 Feb 2026 10:29:26.9086 (UTC)", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n c7fe9921-f749-4c10-af19-08de6a219933", "X-MS-Exchange-CrossTenant-Id": "e5b49634-450b-4709-8abb-1e2b19b982b7", "X-MS-Exchange-CrossTenant-OriginalAttributedTenantConnectingIp": "\n TenantId=e5b49634-450b-4709-8abb-1e2b19b982b7; Ip=[198.47.23.195];\n Helo=[lewvzet201.ext.ti.com]", "X-MS-Exchange-CrossTenant-AuthSource": "\n CY4PEPF0000EDD7.namprd03.prod.outlook.com", "X-MS-Exchange-CrossTenant-AuthAs": "Anonymous", "X-MS-Exchange-CrossTenant-FromEntityHeader": "HybridOnPrem", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "CY5PR10MB6047", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "`dram_init()` is called by R5 SPL and U-Boot, both. It starts by\ncomputing the size of the RAM. In verdin-am62(p), it does so by calling\n`get_ram_size()`. This function computes the size of the RAM by writing\nover the RAM.\n\nWhen R5 computes the size of the RAM, it does not update the DT with\nthis size. As a result, when A53 invokes `dram_init()` again, it has to\ncompute the size through `get_ram_size()` again.\n\nCommit 13c54cf588d82 and 0c3a6f748c9 add firewall over ATF's and OPTEE's\nregions. This firewall is added during the R5 SPL stage of boot. So when\nA53 attempts to write over RAM in `get_ram_size()`, it writes over the\nprotected region. Since A53 is a non-secure core, this is blocked by the\nfirewall.\n\nTo fix this, do the following:\n * Implement `spl_perform_board_fixups()` function for verdin-am62\n and verdin-am62p. Make this function call `fixup_memory_node()`,\n which updates the DT.\n * Add an if-block in `dram_init()`, to ensure that only R5 is able\n to call `get_ram_size()`, and that A53 reads this size from the\n DT.\n\nSigned-off-by: Suhaas Joshi <s-joshi@ti.com>\nReviewed-by: Francesco Dolcini <francesco.dolcini@toradex.com>\n---\n board/toradex/verdin-am62/verdin-am62.c | 10 ++++++++++\n board/toradex/verdin-am62p/verdin-am62p.c | 11 +++++++++++\n 2 files changed, 21 insertions(+)", "diff": "diff --git a/board/toradex/verdin-am62/verdin-am62.c b/board/toradex/verdin-am62/verdin-am62.c\nindex 069aa6c7909..19ac2ae9313 100644\n--- a/board/toradex/verdin-am62/verdin-am62.c\n+++ b/board/toradex/verdin-am62/verdin-am62.c\n@@ -24,6 +24,9 @@ DECLARE_GLOBAL_DATA_PTR;\n \n int dram_init(void)\n {\n+\tif (!IS_ENABLED(CONFIG_TARGET_VERDIN_AM62_R5) || !IS_ENABLED(CONFIG_SPL_BUILD))\n+\t\treturn fdtdec_setup_mem_size_base();\n+\n \tgd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE, CFG_SYS_SDRAM_SIZE);\n \n \tif (gd->ram_size < SZ_512M)\n@@ -103,6 +106,13 @@ int board_late_init(void)\n \treturn 0;\n }\n \n+#if IS_ENABLED(CONFIG_XPL_BUILD)\n+void spl_perform_board_fixups(struct spl_image_info *spl_image)\n+{\n+\tfixup_memory_node(spl_image);\n+}\n+#endif\n+\n #define CTRLMMR_USB0_PHY_CTRL\t\t0x43004008\n #define CTRLMMR_USB1_PHY_CTRL\t\t0x43004018\n #define CORE_VOLTAGE\t\t\t0x80000000\ndiff --git a/board/toradex/verdin-am62p/verdin-am62p.c b/board/toradex/verdin-am62p/verdin-am62p.c\nindex 7c631f380ff..1234b3887c6 100644\n--- a/board/toradex/verdin-am62p/verdin-am62p.c\n+++ b/board/toradex/verdin-am62p/verdin-am62p.c\n@@ -18,6 +18,7 @@\n #include <k3-ddrss.h>\n #include <spl.h>\n #include <linux/sizes.h>\n+#include <mach/k3-ddr.h>\n \n #include \"../common/tdx-cfg-block.h\"\n \n@@ -57,6 +58,9 @@ static void read_hw_cfg(void)\n \n int dram_init(void)\n {\n+\tif (!IS_ENABLED(CONFIG_TARGET_VERDIN_AM62P_R5) || !IS_ENABLED(CONFIG_SPL_BUILD))\n+\t\treturn fdtdec_setup_mem_size_base();\n+\n \tgd->ram_size = get_ram_size((long *)CFG_SYS_SDRAM_BASE, CFG_SYS_SDRAM_SIZE);\n \n \tif (gd->ram_size < SZ_1G)\n@@ -132,6 +136,13 @@ int board_late_init(void)\n \treturn 0;\n }\n \n+#if IS_ENABLED(CONFIG_XPL_BUILD)\n+void spl_perform_board_fixups(struct spl_image_info *spl_image)\n+{\n+\tfixup_memory_node(spl_image);\n+}\n+#endif\n+\n #define MCU_CTRL_LFXOSC_32K_BYPASS_VAL\tBIT(4)\n \n void spl_board_init(void)\n", "prefixes": [ "v2", "1/1" ] }