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GET /api/patches/2195825/?format=api
{ "id": 2195825, "url": "http://patchwork.ozlabs.org/api/patches/2195825/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260212-imx95_frdm-v2-2-9a535a506b95@nxp.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260212-imx95_frdm-v2-2-9a535a506b95@nxp.com>", "list_archive_url": null, "date": "2026-02-12T02:40:51", "name": "[v2,2/2] imx: Add FRDM-IMX95 initial support", "commit_ref": null, "pull_url": null, "state": "changes-requested", "archived": false, "hash": "f9691e395bb54699ac89543d55a9f8a7d5cf8287", "submitter": { "id": 91282, "url": "http://patchwork.ozlabs.org/api/people/91282/?format=api", "name": "Joseph Guo", "email": "qijian.guo@nxp.com" }, "delegate": { "id": 151988, "url": "http://patchwork.ozlabs.org/api/users/151988/?format=api", "username": "festevam", "first_name": "Fabio", "last_name": "Estevam", "email": "festevam@gmail.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260212-imx95_frdm-v2-2-9a535a506b95@nxp.com/mbox/", "series": [ { "id": 491933, "url": "http://patchwork.ozlabs.org/api/series/491933/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=491933", "date": "2026-02-12T02:40:50", "name": "Add i.MX95 15x15 FRDM support", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/491933/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195825/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195825/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", 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(Postfix) with ESMTP id 8249783DCB;\n\tThu, 12 Feb 2026 05:50:32 +0100 (CET)", "by phobos.denx.de (Postfix, from userid 109)\n id 7559383A47; Thu, 12 Feb 2026 03:41:05 +0100 (CET)", "from inva021.nxp.com (inva021.nxp.com [92.121.34.21])\n (using TLSv1.2 with cipher ECDHE-RSA-AES256-GCM-SHA384 (256/256 bits))\n (No client certificate requested)\n by phobos.denx.de (Postfix) with ESMTPS id 8B12883CB5\n for <u-boot@lists.denx.de>; Thu, 12 Feb 2026 03:41:01 +0100 (CET)", "from inva021.nxp.com (localhost [127.0.0.1])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id 41243201900;\n Thu, 12 Feb 2026 03:41:01 +0100 (CET)", "from aprdc01srsp001v.ap-rdc01.nxp.com\n (aprdc01srsp001v.ap-rdc01.nxp.com [165.114.16.16])\n by inva021.eu-rdc02.nxp.com (Postfix) with ESMTP id AE9802008D0;\n Thu, 12 Feb 2026 03:41:00 +0100 (CET)", "from lsvm11u0000395.swis.ap-northeast-2.aws.nxp.com\n (lsvm11u0000395.swis.ap-northeast-2.aws.nxp.com [10.52.9.99])\n by aprdc01srsp001v.ap-rdc01.nxp.com (Postfix) with ESMTP id EB1711800241;\n Thu, 12 Feb 2026 10:40:57 +0800 (+08)" ], "X-Spam-Checker-Version": "SpamAssassin 3.4.2 (2018-09-13) on phobos.denx.de", "X-Spam-Level": "", "X-Spam-Status": "No, score=-1.9 required=5.0 tests=BAYES_00,\n RCVD_IN_DNSWL_BLOCKED,RCVD_IN_VALIDITY_CERTIFIED_BLOCKED,\n RCVD_IN_VALIDITY_RPBL_BLOCKED,SPF_HELO_NONE,SPF_PASS autolearn=ham\n autolearn_force=no version=3.4.2", "From": "Joseph Guo <qijian.guo@nxp.com>", "Date": "Thu, 12 Feb 2026 11:40:51 +0900", "Subject": "[PATCH v2 2/2] imx: Add FRDM-IMX95 initial support", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260212-imx95_frdm-v2-2-9a535a506b95@nxp.com>", "References": "<20260212-imx95_frdm-v2-0-9a535a506b95@nxp.com>", "In-Reply-To": "<20260212-imx95_frdm-v2-0-9a535a506b95@nxp.com>", "To": "u-boot@lists.denx.de, \"NXP i.MX U-Boot Team\" <uboot-imx@nxp.com>", "Cc": "Tom Rini <trini@konsulko.com>, Sumit Garg <sumit.garg@kernel.org>,\n Lei Xu <lei.xu@nxp.com>, Stefano Babic <sbabic@nabladev.com>,\n Fabio Estevam <festevam@gmail.com>, Ye Li <ye.li@nxp.com>,\n Alice Guo <alice.guo@nxp.com>, Peng Fan <peng.fan@nxp.com>,\n Adam Ford <aford173@gmail.com>,\n Frieder Schrempf <frieder.schrempf@kontron.de>,\n Sam Protsenko <semen.protsenko@linaro.org>,\n Marek Vasut <marek.vasut+renesas@mailbox.org>, Ji Luo <ji.luo@nxp.com>,\n Simon Glass <sjg@chromium.org>, Justin Jiang <justin.jiang@nxp.com>,\n qijian.guo@oss.nxp.com, xinyu.chen@nxp.com, Jacky Bai <ping.bai@nxp.com>,\n Tim Harvey <tharvey@gateworks.com>, Joseph Guo <qijian.guo@nxp.com>", "X-Mailer": "b4 0.14.2", "X-Developer-Signature": "v=1; a=ed25519-sha256; t=1770864052; l=19731;\n i=qijian.guo@nxp.com; s=20250519; h=from:subject:message-id;\n bh=rtUerB+P/USaA99XgLMUIxxy3G4GjUP1E0aXDvxE0HU=;\n b=X/Ym6/dB+UD15OyawT63+yOEh9GLMJAlPouplniJIISgnEr4+zb1Uw2qrycMLzI4zPBHLmGnN\n kWiuCdUzaHmB9SSd3VOELLzjXITK34mN+VPnVmAdNzFE8GKLDQaWkdr", "X-Developer-Key": "i=qijian.guo@nxp.com; a=ed25519;\n pk=VRjOOFhVecTRwBzK4mt/k3JBnHoYfuXKCm9FM+hHQhs=", "X-Mailman-Approved-At": "Thu, 12 Feb 2026 05:50:31 +0100", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "Add boot support and peripherals like eMMC/SD, UART, I2C, GPIO, ENETC0/1\nand PCIE0/1 for iMX95 15x15 FRDM.\nUpdated doc for build instructions.\n\nSigned-off-by: Lei Xu <lei.xu@nxp.com>\nSigned-off-by: Joseph Guo <qijian.guo@nxp.com>\n---\nChange in v2:\n- drop OF_UPSTREAM\n- sort header\n- align the macros in imx95_frdm.h\n---\n arch/arm/dts/imx95-15x15-frdm-u-boot.dtsi | 85 ++++++++++++++++++\n arch/arm/mach-imx/imx9/Kconfig | 7 ++\n board/nxp/imx95_frdm/Kconfig | 12 +++\n board/nxp/imx95_frdm/MAINTAINERS | 6 ++\n board/nxp/imx95_frdm/Makefile | 11 +++\n board/nxp/imx95_frdm/imx95_frdm.c | 31 +++++++\n board/nxp/imx95_frdm/imx95_frdm.env | 91 +++++++++++++++++++\n board/nxp/imx95_frdm/spl.c | 80 +++++++++++++++++\n configs/imx95_15x15_frdm_defconfig | 143 ++++++++++++++++++++++++++++++\n doc/board/nxp/imx95_frdm.rst | 131 +++++++++++++++++++++++++++\n doc/board/nxp/index.rst | 1 +\n include/configs/imx95_frdm.h | 25 ++++++\n 12 files changed, 623 insertions(+)", "diff": "diff --git a/arch/arm/dts/imx95-15x15-frdm-u-boot.dtsi b/arch/arm/dts/imx95-15x15-frdm-u-boot.dtsi\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..651352e0883a6a5213b4173e321448edef97fca9\n--- /dev/null\n+++ b/arch/arm/dts/imx95-15x15-frdm-u-boot.dtsi\n@@ -0,0 +1,85 @@\n+// SPDX-License-Identifier: GPL-2.0+\n+/*\n+ * Copyright 2026 NXP\n+ */\n+\n+#include \"imx95-u-boot.dtsi\"\n+\n+/ {\n+\taliases {\n+\t\tpci0 = &netc_bus0;\n+\t\tpci1 = &netc_bus1;\n+\t};\n+};\n+\n+&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-imem} {\n+\tfilename = \"lpddr4x_imem_v202409.bin\";\n+};\n+\n+&{/binman/m33-oei-ddrfw/imx-lpddr/imx-lpddr-dmem} {\n+\tfilename = \"lpddr4x_dmem_v202409.bin\";\n+};\n+\n+&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-imem-qb} {\n+\tfilename = \"lpddr4x_imem_qb_v202409.bin\";\n+};\n+\n+&{/binman/m33-oei-ddrfw/imx-lpddr-qb/imx-lpddr-dmem-qb} {\n+\tfilename = \"lpddr4x_dmem_qb_v202409.bin\";\n+};\n+\n+&lpuart1 {\n+\tbootph-pre-ram;\n+};\n+\n+®_usdhc2_vmmc {\n+\tbootph-pre-ram;\n+};\n+\n+&usdhc1 {\n+\tbootph-pre-ram;\n+};\n+\n+&usdhc2 {\n+\tbootph-pre-ram;\n+};\n+\n+&wdog3 {\n+\tstatus = \"disabled\";\n+};\n+\n+&pinctrl_uart1 {\n+\tbootph-pre-ram;\n+};\n+\n+&pinctrl_usdhc1 {\n+\tbootph-pre-ram;\n+};\n+\n+&pinctrl_usdhc1_100mhz {\n+\tbootph-pre-ram;\n+};\n+\n+&pinctrl_usdhc1_200mhz {\n+\tbootph-pre-ram;\n+};\n+\n+&pinctrl_usdhc2 {\n+\tbootph-pre-ram;\n+};\n+\n+&pinctrl_usdhc2_100mhz {\n+\tbootph-pre-ram;\n+};\n+\n+&pinctrl_usdhc2_200mhz {\n+\tbootph-pre-ram;\n+};\n+\n+&pinctrl_usdhc2_gpio {\n+\tbootph-pre-ram;\n+};\n+\n+&pinctrl_reg_usdhc2_vmmc {\n+\tbootph-pre-ram;\n+};\ndiff --git a/arch/arm/mach-imx/imx9/Kconfig b/arch/arm/mach-imx/imx9/Kconfig\nindex d9f97e4328c956554c777eebdf64e7024128dd42..b3a2d9601400c33527b497e2f12b8c7c3c8316a4 100644\n--- a/arch/arm/mach-imx/imx9/Kconfig\n+++ b/arch/arm/mach-imx/imx9/Kconfig\n@@ -142,6 +142,12 @@ config TARGET_IMX95_15X15_EVK\n \timply BOOTSTD_FULL\n \timply OF_UPSTREAM\n \n+config TARGET_IMX95_15X15_FRDM\n+\tbool \"imx95_frdm\"\n+\tselect IMX95\n+\timply BOOTSTD_FULL\n+\timply BOOTSTD_BOOTCOMMAND\n+\n config TARGET_IMX943_EVK\n \tbool \"imx943_evk\"\n \tselect IMX94\n@@ -165,6 +171,7 @@ source \"board/phytec/phycore_imx93/Kconfig\"\n source \"board/variscite/imx93_var_som/Kconfig\"\n source \"board/nxp/imx94_evk/Kconfig\"\n source \"board/nxp/imx95_evk/Kconfig\"\n+source \"board/nxp/imx95_frdm/Kconfig\"\n source \"board/toradex/smarc-imx95/Kconfig\"\n \n endif\ndiff --git a/board/nxp/imx95_frdm/Kconfig b/board/nxp/imx95_frdm/Kconfig\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..0da9a56adadec661792c38b1258e4eb914af5aa5\n--- /dev/null\n+++ b/board/nxp/imx95_frdm/Kconfig\n@@ -0,0 +1,12 @@\n+if TARGET_IMX95_15X15_FRDM\n+\n+config SYS_BOARD\n+\tdefault \"imx95_frdm\"\n+\n+config SYS_VENDOR\n+\tdefault \"nxp\"\n+\n+config SYS_CONFIG_NAME\n+\tdefault \"imx95_frdm\"\n+\n+endif\ndiff --git a/board/nxp/imx95_frdm/MAINTAINERS b/board/nxp/imx95_frdm/MAINTAINERS\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..33870f054e7452ed3af36f19236163d451c93665\n--- /dev/null\n+++ b/board/nxp/imx95_frdm/MAINTAINERS\n@@ -0,0 +1,6 @@\n+i.MX95 FRDM BOARD\n+M:\tJoseph Guo <qijian.guo@nxp.com>\n+S:\tMaintained\n+F:\tboard/nxp/imx95_frdm/\n+F:\tinclude/configs/imx95_frdm.h\n+F:\tconfigs/imx95_15x15_frdm_defconfig\ndiff --git a/board/nxp/imx95_frdm/Makefile b/board/nxp/imx95_frdm/Makefile\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..6965c61a281d44950d2619d3bfebceab39351c4d\n--- /dev/null\n+++ b/board/nxp/imx95_frdm/Makefile\n@@ -0,0 +1,11 @@\n+#\n+# Copyright 2026 NXP\n+#\n+# SPDX-License-Identifier: GPL-2.0+\n+#\n+\n+obj-y += imx95_frdm.o\n+\n+ifdef CONFIG_SPL_BUILD\n+obj-y += spl.o\n+endif\ndiff --git a/board/nxp/imx95_frdm/imx95_frdm.c b/board/nxp/imx95_frdm/imx95_frdm.c\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..ca1d916deab072476ca2147086c3af161efddb33\n--- /dev/null\n+++ b/board/nxp/imx95_frdm/imx95_frdm.c\n@@ -0,0 +1,31 @@\n+// SPDX-License-Identifier: GPL-2.0+\n+/*\n+ * Copyright 2025 NXP\n+ */\n+\n+#include <asm/gpio.h>\n+#include <asm/arch/clock.h>\n+#include <asm/mach-imx/sys_proto.h>\n+\n+int board_early_init_f(void)\n+{\n+\t/* UART1: A55, UART2: M33, UART3: M7 */\n+\tinit_uart_clk(0);\n+\n+\treturn 0;\n+}\n+\n+int board_late_init(void)\n+{\n+\tif (IS_ENABLED(CONFIG_ENV_IS_IN_MMC))\n+\t\tboard_late_mmc_env_init();\n+\n+\treturn 0;\n+}\n+\n+int board_phys_sdram_size(phys_size_t *size)\n+{\n+\t*size = PHYS_SDRAM_SIZE + PHYS_SDRAM_2_SIZE;\n+\n+\treturn 0;\n+}\ndiff --git a/board/nxp/imx95_frdm/imx95_frdm.env b/board/nxp/imx95_frdm/imx95_frdm.env\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..a7309d734b0d3b98b2dd405a975610c24f7f6a32\n--- /dev/null\n+++ b/board/nxp/imx95_frdm/imx95_frdm.env\n@@ -0,0 +1,91 @@\n+sec_boot=no\n+initrd_addr=0x93800000\n+emmc_dev=0\n+sd_dev=1\n+scriptaddr=0x93500000\n+kernel_addr_r=CONFIG_SYS_LOAD_ADDR\n+image=Image\n+splashimage=0xA0000000\n+console=ttyLP0,115200 earlycon\n+fdt_addr_r=0x93000000\n+fdt_addr=0x93000000\n+cntr_addr=0xA8000000\n+cntr_file=os_cntr_signed.bin\n+boot_fit=no\n+fdtfile=CONFIG_DEFAULT_FDT_FILE\n+bootm_size=0x10000000\n+mmcdev=CONFIG_ENV_MMC_DEVICE_INDEX\n+mmcautodetect=yes\n+mmcargs=setenv bootargs console=${console} root=${mmcroot}\n+loadbootscript=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${script};\n+bootscript=echo Running bootscript from mmc ...; source\n+loadimage=fatload mmc ${mmcdev}:${mmcpart} ${loadaddr} ${image}\n+loadfdt=fatload mmc ${mmcdev}:${mmcpart} ${fdt_addr_r} ${fdtfile}\n+loadcntr=fatload mmc ${mmcdev}:${mmcpart} ${cntr_addr} ${cntr_file}\n+auth_os=auth_cntr ${cntr_addr}\n+boot_os=booti ${loadaddr} - ${fdt_addr_r};\n+mmcboot=echo Booting from mmc ...;\n+\t\trun mmcargs;\n+\t\tif test ${sec_boot} = yes; then\n+\t\t\tif run auth_os; then\n+\t\t\t\trun boot_os;\n+\t\t\telse\n+\t\t\t\techo ERR: failed to authenticate;\n+\t\t\tfi;\n+\t\telse\n+\t\t\tif test ${boot_fit} = yes || test ${boot_fit} = try; then\n+\t\t\t\tbootm ${loadaddr};\n+\t\t\telse\n+\t\t\t\tif run loadfdt; then\n+\t\t\t\t\trun boot_os;\n+\t\t\t\telse\n+\t\t\t\t\techo WARN: Cannot load the DT;\n+\t\t\t\tfi;\n+\t\t\tfi;\n+\t\tfi;\n+netargs=setenv bootargs console=${console} root=/dev/nfs\n+\t\tip=dhcp nfsroot=${serverip}:${nfsroot},v3,tcp\n+netboot=echo Booting from net ...;\n+\t\trun netargs;\n+\t\tif test ${ip_dyn} = yes; then\n+\t\t\tsetenv get_cmd dhcp;\n+\t\telse\n+\t\t\tsetenv get_cmd tftp;\n+\t\tfi;\n+\t\tif test ${sec_boot} = yes; then\n+\t\t\t${get_cmd} ${cntr_addr} ${cntr_file};\n+\t\t\tif run auth_os; then\n+\t\t\t\trun boot_os;\n+\t\t\telse\n+\t\t\t\techo ERR: failed to authenticate;\n+\t\t\tfi;\n+\t\telse\n+\t\t\t${get_cmd} ${loadaddr} ${image};\n+\t\t\tif test ${boot_fit} = yes || test ${boot_fit} = try; then\n+\t\t\t\tbootm ${loadaddr};\n+\t\t\telse\n+\t\t\t\tif ${get_cmd} ${fdt_addr_r} ${fdtfile}; then\n+\t\t\t\t\trun boot_os;\n+\t\t\t\telse\n+\t\t\t\t\techo WARN: Cannot load the DT;\n+\t\t\t\tfi;\n+\t\t\tfi;\n+\t\tfi;\n+bsp_bootcmd=echo Running BSP bootcmd ...;\n+\t\t\tmmc dev ${mmcdev}; if mmc rescan; then\n+\t\t\tif run loadbootscript; then\n+\t\t\t\trun bootscript;\n+\t\t\telse\n+\t\t\t\tif test ${sec_boot} = yes; then\n+\t\t\t\t\tif run loadcntr; then\n+\t\t\t\t\t\trun mmcboot;\n+\t\t\t\t\telse run netboot;\n+\t\t\t\t\tfi;\n+\t\t\t\telse\n+\t\t\t\t\tif run loadimage; then\n+\t\t\t\t\t\trun mmcboot;\n+\t\t\t\t\telse run netboot;\n+\t\t\t\t\tfi;\n+\t\t\t\tfi;\n+\t\t\tfi;\n+\t\tfi;\ndiff --git a/board/nxp/imx95_frdm/spl.c b/board/nxp/imx95_frdm/spl.c\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..861c70042be0355e526d3e90dc92abe3d8b99a3d\n--- /dev/null\n+++ b/board/nxp/imx95_frdm/spl.c\n@@ -0,0 +1,80 @@\n+// SPDX-License-Identifier: GPL-2.0+\n+/*\n+ * Copyright 2026 NXP\n+ */\n+\n+#include <hang.h>\n+#include <init.h>\n+#include <spl.h>\n+#include <asm/global_data.h>\n+#include <asm/sections.h>\n+#include <asm/arch/clock.h>\n+#include <asm/arch/mu.h>\n+#include <asm/arch/sys_proto.h>\n+#include <asm/mach-imx/boot_mode.h>\n+#include <asm/mach-imx/ele_api.h>\n+\n+DECLARE_GLOBAL_DATA_PTR;\n+\n+int spl_board_boot_device(enum boot_device boot_dev_spl)\n+{\n+\tswitch (boot_dev_spl) {\n+\tcase SD1_BOOT:\n+\tcase MMC1_BOOT:\n+\t\treturn BOOT_DEVICE_MMC1;\n+\tcase SD2_BOOT:\n+\tcase MMC2_BOOT:\n+\t\treturn BOOT_DEVICE_MMC2;\n+\tcase USB_BOOT:\n+\t\treturn BOOT_DEVICE_BOARD;\n+\tdefault:\n+\t\treturn BOOT_DEVICE_NONE;\n+\t}\n+}\n+\n+void spl_board_init(void)\n+{\n+\tint ret;\n+\n+\tputs(\"Normal Boot\\n\");\n+\n+\tret = ele_start_rng();\n+\tif (ret)\n+\t\tprintf(\"Fail to start RNG: %d\\n\", ret);\n+}\n+\n+void board_init_f(ulong dummy)\n+{\n+\tint ret;\n+\n+\t/* Clear the BSS. */\n+\tmemset(__bss_start, 0, __bss_end - __bss_start);\n+\n+#ifdef CONFIG_SPL_RECOVER_DATA_SECTION\n+\tif (IS_ENABLED(CONFIG_SPL_BUILD))\n+\t\tspl_save_restore_data();\n+#endif\n+\n+\ttimer_init();\n+\n+\t/* Need dm_init() to run before any SCMI calls can be made. */\n+\tspl_early_init();\n+\n+\t/* Need enable SCMI drivers and ELE driver before enabling console */\n+\tret = imx9_probe_mu();\n+\tif (ret)\n+\t\thang(); /* if MU not probed, nothing can output, just hang here */\n+\n+\tarch_cpu_init();\n+\n+\tboard_early_init_f();\n+\n+\tpreloader_console_init();\n+\n+\tdebug(\"SOC: 0x%x\\n\", gd->arch.soc_rev);\n+\tdebug(\"LC: 0x%x\\n\", gd->arch.lifecycle);\n+\n+\tget_reset_reason(true, false);\n+\n+\tboard_init_r(NULL, 0);\n+}\ndiff --git a/configs/imx95_15x15_frdm_defconfig b/configs/imx95_15x15_frdm_defconfig\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..3907d37d712a3e79dee560afe12e8865d63ce6c7\n--- /dev/null\n+++ b/configs/imx95_15x15_frdm_defconfig\n@@ -0,0 +1,143 @@\n+CONFIG_ARM=y\n+CONFIG_ARCH_IMX9=y\n+CONFIG_TEXT_BASE=0x90200000\n+CONFIG_SYS_MALLOC_LEN=0x2000000\n+CONFIG_SYS_MALLOC_F_LEN=0x10000\n+CONFIG_SPL_GPIO=y\n+CONFIG_SPL_LIBCOMMON_SUPPORT=y\n+CONFIG_SPL_LIBGENERIC_SUPPORT=y\n+CONFIG_ENV_SOURCE_FILE=\"imx95_frdm\"\n+CONFIG_NR_DRAM_BANKS=3\n+CONFIG_SF_DEFAULT_SPEED=40000000\n+CONFIG_ENV_SIZE=0x4000\n+CONFIG_ENV_OFFSET=0x700000\n+CONFIG_IMX_CONFIG=\"arch/arm/mach-imx/imx9/scmi/imximage.cfg\"\n+CONFIG_DM_GPIO=y\n+CONFIG_DEFAULT_DEVICE_TREE=\"imx95-15x15-frdm\"\n+CONFIG_TARGET_IMX95_15X15_FRDM=y\n+CONFIG_OF_LIBFDT_OVERLAY=y\n+CONFIG_SYS_MONITOR_LEN=524288\n+CONFIG_SPL_MMC=y\n+CONFIG_SPL_SERIAL=y\n+CONFIG_SPL_DRIVERS_MISC=y\n+CONFIG_SPL_TEXT_BASE=0x20480000\n+CONFIG_SPL_HAS_BSS_LINKER_SECTION=y\n+CONFIG_SPL_BSS_START_ADDR=0x204d6000\n+CONFIG_SPL_BSS_MAX_SIZE=0x2000\n+CONFIG_SYS_LOAD_ADDR=0x90400000\n+CONFIG_SPL=y\n+CONFIG_SPL_RECOVER_DATA_SECTION=y\n+CONFIG_PCI=y\n+CONFIG_SYS_MEMTEST_START=0x90000000\n+CONFIG_SYS_MEMTEST_END=0xA0000000\n+CONFIG_REMAKE_ELF=y\n+CONFIG_FIT=y\n+CONFIG_FIT_VERBOSE=y\n+CONFIG_OF_SYSTEM_SETUP=y\n+CONFIG_BOOTCOMMAND=\"bootflow scan -l; run bsp_bootcmd\"\n+CONFIG_DEFAULT_FDT_FILE=\"imx95-15x15-frdm.dtb\"\n+CONFIG_SYS_CBSIZE=2048\n+CONFIG_SYS_PBSIZE=2074\n+CONFIG_BOARD_EARLY_INIT_F=y\n+# CONFIG_BOARD_INIT is not set\n+CONFIG_BOARD_LATE_INIT=y\n+CONFIG_PCI_INIT_R=y\n+CONFIG_SPL_MAX_SIZE=0x20000\n+CONFIG_SPL_BOARD_INIT=y\n+CONFIG_SPL_LOAD_IMX_CONTAINER=y\n+CONFIG_IMX_CONTAINER_CFG=\"arch/arm/mach-imx/imx9/scmi/container.cfg\"\n+# CONFIG_SPL_SHARES_INIT_SP_ADDR is not set\n+CONFIG_SPL_SYS_MALLOC=y\n+CONFIG_SPL_HAS_CUSTOM_MALLOC_START=y\n+CONFIG_SPL_CUSTOM_SYS_MALLOC_ADDR=0x93200000\n+CONFIG_SPL_SYS_MALLOC_SIZE=0x80000\n+CONFIG_SPL_SYS_MMCSD_RAW_MODE=y\n+CONFIG_SYS_MMCSD_RAW_MODE_U_BOOT_SECTOR=0x1040\n+CONFIG_SPL_I2C=y\n+CONFIG_SPL_DM_MAILBOX=y\n+CONFIG_SPL_POWER=y\n+CONFIG_SPL_WATCHDOG=y\n+CONFIG_SYS_PROMPT=\"u-boot=> \"\n+CONFIG_CMD_ERASEENV=y\n+CONFIG_CMD_NVEDIT_EFI=y\n+CONFIG_CRC32_VERIFY=y\n+CONFIG_CMD_MEMTEST=y\n+CONFIG_CMD_CLK=y\n+CONFIG_CMD_DFU=y\n+CONFIG_CMD_FUSE=y\n+CONFIG_CMD_GPIO=y\n+CONFIG_CMD_GPT=y\n+CONFIG_CMD_I2C=y\n+CONFIG_CMD_MMC=y\n+CONFIG_CMD_PCI=y\n+CONFIG_CMD_POWEROFF=y\n+CONFIG_CMD_SNTP=y\n+CONFIG_CMD_CACHE=y\n+CONFIG_CMD_EFIDEBUG=y\n+CONFIG_CMD_RTC=y\n+CONFIG_CMD_TIME=y\n+CONFIG_CMD_GETTIME=y\n+CONFIG_CMD_TIMER=y\n+CONFIG_CMD_REGULATOR=y\n+CONFIG_CMD_HASH=y\n+CONFIG_CMD_EXT4_WRITE=y\n+CONFIG_OF_CONTROL=y\n+CONFIG_SPL_OF_CONTROL=y\n+CONFIG_ENV_OVERWRITE=y\n+CONFIG_ENV_IS_NOWHERE=y\n+CONFIG_ENV_IS_IN_MMC=y\n+CONFIG_ENV_RELOC_GD_ENV_ADDR=y\n+CONFIG_ENV_MMC_DEVICE_INDEX=1\n+CONFIG_ENV_VARS_UBOOT_RUNTIME_CONFIG=y\n+CONFIG_USE_ETHPRIME=y\n+CONFIG_ETHPRIME=\"eth0\"\n+CONFIG_NET_RANDOM_ETHADDR=y\n+CONFIG_SYS_RX_ETH_BUFFER=8\n+CONFIG_SPL_DM=y\n+CONFIG_SPL_OF_TRANSLATE=y\n+CONFIG_SPL_CLK=y\n+CONFIG_SPL_CLK_CCF=y\n+CONFIG_CLK_SCMI=y\n+CONFIG_SPL_CLK_SCMI=y\n+CONFIG_CLK_IMX95_BLKCTRL=y\n+CONFIG_DFU_MMC=y\n+CONFIG_DFU_RAM=y\n+CONFIG_SPL_FIRMWARE=y\n+# CONFIG_SCMI_AGENT_SMCCC is not set\n+CONFIG_IMX_RGPIO2P=y\n+CONFIG_DM_PCA953X=y\n+CONFIG_ADP5585_GPIO=y\n+CONFIG_DM_I2C=y\n+CONFIG_SYS_I2C_IMX_LPI2C=y\n+CONFIG_IMX_MU_MBOX=y\n+CONFIG_SUPPORT_EMMC_BOOT=y\n+CONFIG_MMC_IO_VOLTAGE=y\n+CONFIG_MMC_UHS_SUPPORT=y\n+CONFIG_MMC_HS400_ES_SUPPORT=y\n+CONFIG_MMC_HS400_SUPPORT=y\n+CONFIG_FSL_USDHC=y\n+CONFIG_MTD=y\n+CONFIG_PHYLIB=y\n+CONFIG_PHY_AQUANTIA=y\n+CONFIG_PHY_MOTORCOMM=y\n+CONFIG_DM_MDIO=y\n+CONFIG_MII=y\n+CONFIG_FSL_ENETC=y\n+CONFIG_PCIE_ECAM_GENERIC=y\n+CONFIG_PCIE_DW_IMX=y\n+CONFIG_PHY=y\n+CONFIG_PINCTRL=y\n+CONFIG_SPL_PINCTRL=y\n+CONFIG_PINCTRL_IMX_SCMI=y\n+CONFIG_POWER_DOMAIN=y\n+CONFIG_SCMI_POWER_DOMAIN=y\n+CONFIG_SPL_DM_REGULATOR=y\n+CONFIG_DM_REGULATOR_FIXED=y\n+CONFIG_SPL_DM_REGULATOR_FIXED=y\n+CONFIG_DM_REGULATOR_GPIO=y\n+CONFIG_DM_RTC=y\n+CONFIG_DM_SERIAL=y\n+CONFIG_FSL_LPUART=y\n+CONFIG_ULP_WATCHDOG=y\n+CONFIG_LZO=y\n+CONFIG_BZIP2=y\ndiff --git a/doc/board/nxp/imx95_frdm.rst b/doc/board/nxp/imx95_frdm.rst\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..85ef9022e76fc0d8f2a5524128309939f22f4715\n--- /dev/null\n+++ b/doc/board/nxp/imx95_frdm.rst\n@@ -0,0 +1,131 @@\n+.. SPDX-License-Identifier: GPL-2.0+\n+\n+imx95_frdm\n+=======================\n+\n+U-Boot for the NXP i.MX95 15x15 FRDM board\n+\n+Quick Start\n+-----------\n+\n+- Get ahab-container.img\n+- Get DDR PHY Firmware Images\n+- Get and Build OEI Images\n+- Get and Build System Manager Image\n+- Get and Build the ARM Trusted Firmware\n+- Build the Bootloader Image\n+- Boot\n+\n+Get ahab-container.img\n+--------------------------------------\n+\n+Note: srctree is U-Boot source directory\n+\n+.. code-block:: bash\n+\n+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-ele-imx-2.0.2-89161a8.bin\n+ $ sh firmware-ele-imx-2.0.2-89161a8.bin --auto-accept\n+\n+i.MX95 A0 silicon version\n+\n+.. code-block:: bash\n+\n+ $ cp firmware-ele-imx-2.0.2-89161a8/mx95a0-ahab-container.img $(srctree)\n+\n+i.MX95 B0 silicon version\n+\n+.. code-block:: bash\n+\n+ $ cp firmware-ele-imx-2.0.2-89161a8/mx95b0-ahab-container.img $(srctree)\n+\n+Get DDR PHY Firmware Images\n+--------------------------------------\n+\n+Note: srctree is U-Boot source directory\n+\n+.. code-block:: bash\n+\n+ $ wget https://www.nxp.com/lgfiles/NMG/MAD/YOCTO/firmware-imx-8.28-994fa14.bin\n+ $ sh firmware-imx-8.28-994fa14.bin --auto-accept\n+ $ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr5*v202409.bin $(srctree)\n+ $ cp firmware-imx-8.28-994fa14/firmware/ddr/synopsys/lpddr4x*v202409.bin $(srctree)\n+\n+Get and Build OEI Images\n+--------------------------------------\n+\n+Note: srctree is U-Boot source directory\n+Get OEI from: https://github.com/nxp-imx/imx-oei\n+branch: master\n+\n+.. code-block:: bash\n+\n+ $ sudo apt -y install make gcc g++-multilib srecord\n+ $ wget https://developer.arm.com/-/media/Files/downloads/gnu/13.3.rel1/binrel/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz\n+ $ tar xvf arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz\n+ $ export TOOLS=$PWD\n+ $ git clone -b master https://github.com/nxp-imx/imx-oei.git\n+ $ cd imx-oei\n+\n+i.MX95 B0 silicon version on 15x15 LPDDR4X FRDM Board\n+\n+.. code-block:: bash\n+\n+ $ make board=mx95lp4x-15 oei=ddr DEBUG=1 r=B0 all\n+ $ cp build/mx95lp4x-15/ddr/oei-m33-ddr.bin $(srctree)\n+\n+Get and Build System Manager Image\n+--------------------------------------\n+\n+Note: srctree is U-Boot source directory\n+Get System Manager from: https://github.com/nxp-imx/imx-sm\n+branch: master\n+\n+.. code-block:: bash\n+\n+ $ sudo apt -y install make gcc g++-multilib srecord\n+ $ wget https://developer.arm.com/-/media/Files/downloads/gnu/13.3.rel1/binrel/arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz\n+ $ tar xvf arm-gnu-toolchain-13.3.rel1-x86_64-arm-none-eabi.tar.xz\n+ $ export TOOLS=$PWD\n+ $ git clone -b master https://github.com/nxp-imx/imx-sm.git\n+ $ cd imx-sm\n+ $ make config=mx95evk all\n+ $ cp build/mx95evk/m33_image.bin $(srctree)\n+\n+Get and Build the ARM Trusted Firmware\n+--------------------------------------\n+\n+Note: srctree is U-Boot source directory\n+Get ATF from: https://github.com/nxp-imx/imx-atf/\n+branch: lf_v2.12\n+\n+.. code-block:: bash\n+\n+ $ export CROSS_COMPILE=aarch64-poky-linux-\n+ $ unset LDFLAGS\n+ $ unset AS\n+ $ git clone -b lf_v2.12 https://github.com/nxp-imx/imx-atf.git\n+ $ cd imx-atf\n+ $ make PLAT=imx95 bl31\n+ $ cp build/imx95/release/bl31.bin $(srctree)\n+\n+Build the Bootloader Image\n+--------------------------\n+\n+i.MX95 B0 silicon version on 15x15 LPDDR4X FRDM Board\n+\n+.. code-block:: bash\n+\n+ $ export CROSS_COMPILE=aarch64-poky-linux-\n+ $ make imx95_15x15_frdm_defconfig\n+ $ make\n+\n+Copy imx-boot-imx95.bin to the MicroSD card:\n+\n+.. code-block:: bash\n+\n+ $ sudo dd if=flash.bin of=/dev/sd[x] bs=1k seek=32 conv=fsync\n+\n+Boot\n+----\n+\n+Set i.MX95 boot device to MicroSD card\ndiff --git a/doc/board/nxp/index.rst b/doc/board/nxp/index.rst\nindex 01d3468a47da8ddd25cf45b52920a35e4e131c48..c7d5bf36f1145186d8bfc77939fdd7d77e5d0953 100644\n--- a/doc/board/nxp/index.rst\n+++ b/doc/board/nxp/index.rst\n@@ -17,6 +17,7 @@ NXP Semiconductors\n imx93_9x9_qsb\n imx93_11x11_evk\n imx93_frdm\n+ imx95_frdm\n imx943_evk\n imx95_evk\n imxrt1020-evk\ndiff --git a/include/configs/imx95_frdm.h b/include/configs/imx95_frdm.h\nnew file mode 100644\nindex 0000000000000000000000000000000000000000..34e20bb029fb93f96dfe6553c8d18e09b7926986\n--- /dev/null\n+++ b/include/configs/imx95_frdm.h\n@@ -0,0 +1,25 @@\n+/* SPDX-License-Identifier: GPL-2.0+ */\n+/*\n+ * Copyright 2026 NXP\n+ */\n+\n+#ifndef __IMX95_EVK_H\n+#define __IMX95_EVK_H\n+\n+#include <linux/sizes.h>\n+#include <linux/stringify.h>\n+#include <asm/arch/imx-regs.h>\n+\n+#define CFG_SYS_INIT_RAM_ADDR\t0x90000000\n+#define CFG_SYS_INIT_RAM_SIZE\t0x200000\n+\n+#define CFG_SYS_SDRAM_BASE\t\t0x90000000\n+#define PHYS_SDRAM\t\t\t0x90000000\n+\n+#define PHYS_SDRAM_SIZE\t\t\t0x70000000 /* 2GB - 256MB DDR */\n+\n+#define PHYS_SDRAM_2_SIZE\t\t0x180000000 /* 6GB (Totally 8GB) */\n+\n+#define WDOG_BASE_ADDR\t\t\tWDG3_BASE_ADDR\n+\n+#endif\n", "prefixes": [ "v2", "2/2" ] }