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GET /api/patches/2195795/?format=api
{ "id": 2195795, "url": "http://patchwork.ozlabs.org/api/patches/2195795/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260211221953.4099441-2-brian.cain@oss.qualcomm.com/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260211221953.4099441-2-brian.cain@oss.qualcomm.com>", "list_archive_url": null, "date": "2026-02-11T22:19:50", "name": "[v4,1/4] target/hexagon: Fix invalid duplex decoding", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "771f0bb7c5e12000390b4ab5f350c86d1d038af9", "submitter": { "id": 89839, "url": "http://patchwork.ozlabs.org/api/people/89839/?format=api", "name": "Brian Cain", "email": "brian.cain@oss.qualcomm.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260211221953.4099441-2-brian.cain@oss.qualcomm.com/mbox/", "series": [ { "id": 491915, "url": "http://patchwork.ozlabs.org/api/series/491915/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=491915", "date": "2026-02-11T22:19:52", "name": "Handle some invalid encodings", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/491915/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195795/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195795/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=qualcomm.com header.i=@qualcomm.com header.a=rsa-sha256\n header.s=qcppdkim1 header.b=kQFx3i7G;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=oss.qualcomm.com header.i=@oss.qualcomm.com\n header.a=rsa-sha256 header.s=google header.b=MIbwWa+I;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mx0a-0031df01.pphosted.com", "X-Spam_score_int": "-27", "X-Spam_score": "-2.8", "X-Spam_bar": "--", "X-Spam_report": "(-2.8 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_LOW=-0.7, RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001,\n RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "When decoding a duplex instruction, if the slot0 sub-instruction fails\nto decode after slot1 succeeds, QEMU was leaving the packet in a\npartially-decoded state. This allowed invalid duplex encodings (where\none sub-instruction doesn't match any valid pattern) to be executed\nincorrectly.\n\nFix by resetting the decoder state when slot0 fails, returning an empty\ninstruction that triggers an exception.\n\nAdd gen_exception_decode_fail() for raising exceptions when decode fails\nbefore ctx->next_PC is initialized. This keeps gen_exception_end_tb()\nsemantics unchanged (it continues to use ctx->next_PC for the exception\nPC after successful decode).\n\nResolves: https://gitlab.com/qemu-project/qemu/-/issues/3291\nSigned-off-by: Brian Cain <bcain@quicinc.com>\nReviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>\nReviewed-by: Taylor Simpson <ltaylorsimpson@gmail.com>\n---\n linux-user/hexagon/cpu_loop.c | 4 ++\n target/hexagon/decode.c | 13 ++++-\n target/hexagon/translate.c | 18 ++++++-\n tests/tcg/hexagon/Makefile.target | 1 +\n tests/tcg/hexagon/invalid-encoding.c | 81 ++++++++++++++++++++++++++++\n 5 files changed, 113 insertions(+), 4 deletions(-)\n create mode 100644 tests/tcg/hexagon/invalid-encoding.c", "diff": "diff --git a/linux-user/hexagon/cpu_loop.c b/linux-user/hexagon/cpu_loop.c\nindex 1941f4c9c1..c0e1098e3f 100644\n--- a/linux-user/hexagon/cpu_loop.c\n+++ b/linux-user/hexagon/cpu_loop.c\n@@ -64,6 +64,10 @@ void cpu_loop(CPUHexagonState *env)\n force_sig_fault(TARGET_SIGBUS, TARGET_BUS_ADRALN,\n env->gpr[HEX_REG_R31]);\n break;\n+ case HEX_CAUSE_INVALID_PACKET:\n+ force_sig_fault(TARGET_SIGILL, TARGET_ILL_ILLOPC,\n+ env->gpr[HEX_REG_PC]);\n+ break;\n case EXCP_ATOMIC:\n cpu_exec_step_atomic(cs);\n break;\ndiff --git a/target/hexagon/decode.c b/target/hexagon/decode.c\nindex b5ece60450..69ba1ec96c 100644\n--- a/target/hexagon/decode.c\n+++ b/target/hexagon/decode.c\n@@ -509,8 +509,14 @@ decode_insns(DisasContext *ctx, Insn *insn, uint32_t encoding)\n insn->iclass = iclass_bits(encoding);\n return 2;\n }\n+ /*\n+ * Slot0 decode failed after slot1 succeeded. This is an invalid\n+ * duplex encoding (both sub-instructions must be valid).\n+ */\n+ ctx->insn = --insn;\n }\n- g_assert_not_reached();\n+ /* Invalid duplex encoding - return 0 to signal failure */\n+ return 0;\n }\n }\n \n@@ -674,7 +680,10 @@ int decode_packet(DisasContext *ctx, int max_words, const uint32_t *words,\n encoding32 = words[words_read];\n end_of_packet = is_packet_end(encoding32);\n new_insns = decode_insns(ctx, insn, encoding32);\n- g_assert(new_insns > 0);\n+ if (new_insns == 0) {\n+ /* Invalid instruction encoding */\n+ return 0;\n+ }\n /*\n * If we saw an extender, mark next word extended so immediate\n * decode works\ndiff --git a/target/hexagon/translate.c b/target/hexagon/translate.c\nindex e88e19cc1a..7fe8b35351 100644\n--- a/target/hexagon/translate.c\n+++ b/target/hexagon/translate.c\n@@ -195,7 +195,21 @@ static void gen_exception_end_tb(DisasContext *ctx, int excp)\n tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], ctx->next_PC);\n gen_exception_raw(excp);\n ctx->base.is_jmp = DISAS_NORETURN;\n+}\n \n+/*\n+ * Generate exception for decode failures. Unlike gen_exception_end_tb,\n+ * this is used when decode fails before ctx->next_PC is initialized.\n+ */\n+static void gen_exception_decode_fail(DisasContext *ctx, int nwords, int excp)\n+{\n+ target_ulong fail_pc = ctx->base.pc_next + nwords * sizeof(uint32_t);\n+\n+ gen_exec_counters(ctx);\n+ tcg_gen_movi_tl(hex_gpr[HEX_REG_PC], fail_pc);\n+ gen_exception_raw(excp);\n+ ctx->base.is_jmp = DISAS_NORETURN;\n+ ctx->base.pc_next = fail_pc;\n }\n \n static int read_packet_words(CPUHexagonState *env, DisasContext *ctx,\n@@ -935,7 +949,7 @@ static void decode_and_translate_packet(CPUHexagonState *env, DisasContext *ctx)\n \n nwords = read_packet_words(env, ctx, words);\n if (!nwords) {\n- gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_PACKET);\n+ gen_exception_decode_fail(ctx, 0, HEX_CAUSE_INVALID_PACKET);\n return;\n }\n \n@@ -950,7 +964,7 @@ static void decode_and_translate_packet(CPUHexagonState *env, DisasContext *ctx)\n gen_commit_packet(ctx);\n ctx->base.pc_next += pkt.encod_pkt_size_in_bytes;\n } else {\n- gen_exception_end_tb(ctx, HEX_CAUSE_INVALID_PACKET);\n+ gen_exception_decode_fail(ctx, nwords, HEX_CAUSE_INVALID_PACKET);\n }\n }\n \ndiff --git a/tests/tcg/hexagon/Makefile.target b/tests/tcg/hexagon/Makefile.target\nindex e5182c01d8..16669e04a8 100644\n--- a/tests/tcg/hexagon/Makefile.target\n+++ b/tests/tcg/hexagon/Makefile.target\n@@ -51,6 +51,7 @@ HEX_TESTS += scatter_gather\n HEX_TESTS += hvx_misc\n HEX_TESTS += hvx_histogram\n HEX_TESTS += invalid-slots\n+HEX_TESTS += invalid-encoding\n HEX_TESTS += unaligned_pc\n \n run-and-check-exception = $(call run-test,$2,$3 2>$2.stderr; \\\ndiff --git a/tests/tcg/hexagon/invalid-encoding.c b/tests/tcg/hexagon/invalid-encoding.c\nnew file mode 100644\nindex 0000000000..010a5eb741\n--- /dev/null\n+++ b/tests/tcg/hexagon/invalid-encoding.c\n@@ -0,0 +1,81 @@\n+/*\n+ * Test that invalid instruction encodings are properly rejected.\n+ *\n+ * Copyright (c) Qualcomm Technologies, Inc. and/or its subsidiaries.\n+ * SPDX-License-Identifier: GPL-2.0-or-later\n+ */\n+\n+#include <assert.h>\n+#include <signal.h>\n+#include <stdio.h>\n+#include <stdlib.h>\n+#include <string.h>\n+#include <unistd.h>\n+\n+static void *resume_pc;\n+\n+static void handle_sigill(int sig, siginfo_t *info, void *puc)\n+{\n+ ucontext_t *uc = (ucontext_t *)puc;\n+\n+ if (sig != SIGILL) {\n+ _exit(EXIT_FAILURE);\n+ }\n+\n+ uc->uc_mcontext.r0 = SIGILL;\n+ uc->uc_mcontext.pc = (unsigned long)resume_pc;\n+}\n+\n+/*\n+ * Each test function:\n+ * - Sets r0 to something other than SIGILL\n+ * - Stores the resume address into resume_pc\n+ * - Executes the invalid encoding\n+ * - The handler sets r0 = SIGILL and resumes after the faulting packet\n+ * - Returns the value in r0\n+ */\n+\n+/*\n+ * Invalid duplex encoding (issue #3291):\n+ * - Word 0: 0x0fff6fff = immext(#0xfffbffc0), parse bits = 01\n+ * - Word 1: 0x600237b0 = duplex with:\n+ * - slot0 = 0x17b0 (invalid S2 subinstruction encoding)\n+ * - slot1 = 0x0002 (valid SA1_addi)\n+ * - duplex iclass = 7 (S2 for slot0, A for slot1)\n+ *\n+ * Since slot0 doesn't decode to any valid S2 subinstruction, this packet\n+ * should be rejected and raise SIGILL.\n+ */\n+static int test_invalid_duplex(void)\n+{\n+ int sig;\n+\n+ asm volatile(\n+ \"r0 = #0\\n\"\n+ \"r1 = ##1f\\n\"\n+ \"memw(%1) = r1\\n\"\n+ \".word 0x0fff6fff\\n\" /* immext(#0xfffbffc0), parse=01 */\n+ \".word 0x600237b0\\n\" /* duplex: slot0=0x17b0 (invalid) */\n+ \"1:\\n\"\n+ \"%0 = r0\\n\"\n+ : \"=r\"(sig)\n+ : \"r\"(&resume_pc)\n+ : \"r0\", \"r1\", \"memory\");\n+\n+ return sig;\n+}\n+\n+int main()\n+{\n+ struct sigaction act;\n+\n+ memset(&act, 0, sizeof(act));\n+ act.sa_sigaction = handle_sigill;\n+ act.sa_flags = SA_SIGINFO;\n+ assert(sigaction(SIGILL, &act, NULL) == 0);\n+\n+ assert(test_invalid_duplex() == SIGILL);\n+\n+ puts(\"PASS\");\n+ return EXIT_SUCCESS;\n+}\n", "prefixes": [ "v4", "1/4" ] }