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GET /api/patches/2195789/?format=api
{ "id": 2195789, "url": "http://patchwork.ozlabs.org/api/patches/2195789/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260211222025.2463312-4-raymondmaoca@gmail.com/", "project": { "id": 67, "url": "http://patchwork.ozlabs.org/api/projects/67/?format=api", "name": "OpenSBI development", "link_name": "opensbi", "list_id": "opensbi.lists.infradead.org", "list_email": "opensbi@lists.infradead.org", "web_url": "https://github.com/riscv/opensbi", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "https://github.com/riscv/opensbi/commit/{}" }, "msgid": "<20260211222025.2463312-4-raymondmaoca@gmail.com>", "list_archive_url": null, "date": "2026-02-11T22:20:25", "name": "[3/3,NOT-FOR-UPSTREAM] lib: utils: irqchip: add QEMU virt test for APLIC wired IRQs", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "0190eddef18ad911b6cb80932ac1593a62886ccb", "submitter": { "id": 91989, "url": "http://patchwork.ozlabs.org/api/people/91989/?format=api", "name": "Raymond Mao", "email": "raymondmaoca@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260211222025.2463312-4-raymondmaoca@gmail.com/mbox/", "series": [ { "id": 491914, "url": "http://patchwork.ozlabs.org/api/series/491914/?format=api", "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=491914", "date": "2026-02-11T22:20:24", "name": "APLIC hwirq implementation for irqchip", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/491914/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195789/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195789/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n secure) header.d=lists.infradead.org header.i=@lists.infradead.org\n header.a=rsa-sha256 header.s=bombadil.20210309 header.b=Brx2AcUh;\n\tdkim=fail reason=\"signature verification failed\" (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=eayG/RVG;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=none (no SPF record) smtp.mailfrom=lists.infradead.org\n (client-ip=2607:7c80:54:3::133; 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The original\n message has been attached to this so you can view it or label\n similar future email. If you have any questions, see\n the administrator of that system for details.\n Content preview: From: Raymond Mao Add a QEMU virt specific test for APLIC\n wired external interrupt handling. When APLIC_QEMU_WIRED_TEST is enabled,\n this adds a small test hook as a bring-up aid for validating the wired\n interrupt\n path.\n Content analysis details: (-2.1 points, 5.0 required)\n pts rule name description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE RBL: Sender listed at https://www.dnswl.org/, no\n trust\n [2607:f8b0:4864:20:0:0:0:82a listed in]\n [list.dnswl.org]\n 0.0 SPF_HELO_NONE SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS SPF: sender matches SPF record\n -0.1 DKIM_VALID_AU Message has a valid DKIM or DK signature from\n author's\n domain\n -0.1 DKIM_VALID Message has at least one valid DKIM or DK\n signature\n 0.1 DKIM_SIGNED Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_EF Message has a valid DKIM or DK signature from\n envelope-from domain\n -1.9 BAYES_00 BODY: Bayes spam probability is 0 to 1%\n [score: 0.0000]\n 0.0 FREEMAIL_FROM Sender email is commonly abused enduser mail\n provider\n [raymondmaoca(at)gmail.com]", "X-BeenThere": "opensbi@lists.infradead.org", "X-Mailman-Version": "2.1.34", "Precedence": "list", "List-Id": "<opensbi.lists.infradead.org>", "List-Unsubscribe": "<http://lists.infradead.org/mailman/options/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=unsubscribe>", "List-Archive": "<http://lists.infradead.org/pipermail/opensbi/>", "List-Post": "<mailto:opensbi@lists.infradead.org>", "List-Help": "<mailto:opensbi-request@lists.infradead.org?subject=help>", "List-Subscribe": "<http://lists.infradead.org/mailman/listinfo/opensbi>,\n <mailto:opensbi-request@lists.infradead.org?subject=subscribe>", "Content-Type": "text/plain; charset=\"us-ascii\"", "Content-Transfer-Encoding": "7bit", "Sender": "\"opensbi\" <opensbi-bounces@lists.infradead.org>", "Errors-To": "opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org" }, "content": "From: Raymond Mao <raymond.mao@riscstar.com>\n\nAdd a QEMU virt specific test for APLIC wired external interrupt\nhandling.\nWhen APLIC_QEMU_WIRED_TEST is enabled, this adds a small test hook as\na bring-up aid for validating the wired interrupt path.\n\nSigned-off-by: Raymond Mao <raymond.mao@riscstar.com>\n---\n Makefile | 3 +++\n lib/utils/irqchip/aplic.c | 44 +++++++++++++++++++++++++++++++++++++++\n 2 files changed, 47 insertions(+)", "diff": "diff --git a/Makefile b/Makefile\nindex 46541063..418ee1aa 100644\n--- a/Makefile\n+++ b/Makefile\n@@ -399,6 +399,9 @@ CFLAGS\t\t+=\t$(GENFLAGS)\n CFLAGS\t\t+=\t$(platform-cflags-y)\n CFLAGS\t\t+=\t-fPIE -pie\n CFLAGS\t\t+=\t$(firmware-cflags-y)\n+ifeq ($(APLIC_QEMU_WIRED_TEST),y)\n+CFLAGS\t\t+=\t-DAPLIC_QEMU_WIRED_TEST\n+endif\n \n CPPFLAGS\t+=\t$(GENFLAGS)\n CPPFLAGS\t+=\t$(platform-cppflags-y)\ndiff --git a/lib/utils/irqchip/aplic.c b/lib/utils/irqchip/aplic.c\nindex f0ecef42..63697e14 100644\n--- a/lib/utils/irqchip/aplic.c\n+++ b/lib/utils/irqchip/aplic.c\n@@ -119,6 +119,41 @@ static SBI_LIST_HEAD(aplic_list);\n static void aplic_writel_msicfg(struct aplic_msicfg_data *msicfg,\n \t\t\t\tvoid *msicfgaddr, void *msicfgaddrH);\n \n+#ifdef APLIC_QEMU_WIRED_TEST\n+\n+#define UART_QEMU_MMIO 0x10000000UL\n+\n+static void aplic_test_uart_handler(void)\n+{\n+\tvolatile u8 *uart = (volatile u8 *)UART_QEMU_MMIO;\n+\n+\t/* Drain RX FIFO to clear the interrupt source */\n+\twhile (uart[0x05] & 0x01) { /* LSR.DR */\n+\t\tu8 ch = uart[0x00]; /* RBR */\n+\n+\t\tsbi_printf(\"[APLIC TEST] UART got '%c'(0x%02x)\\n\",\n+\t\t\t (ch >= 32 && ch < 127) ? ch : '.', ch);\n+\t}\n+\n+\t/* (Optional) read IIR to acknowledge on some models */\n+\t(void)uart[0x02]; /* IIR is at offset 2 when DLAB=0; */\n+}\n+\n+static void aplic_hwirq_test_run(unsigned long aplic_addr)\n+{\n+\tvolatile u8 *uart = (volatile u8 *)UART_QEMU_MMIO;\n+\n+\t/* UART: enable RX interrupt */\n+\tuart[0x02] = 0x07; /* FCR enable+clear */\n+\tuart[0x04] |= (1 << 3); /* MCR.OUT2 */\n+\tuart[0x01] |= 0x01; /* IER.ERBFI */\n+\twhile (uart[0x05] & 0x01) /* drain */\n+\t\t(void)uart[0x00];\n+\n+\tsbi_printf(\"[APLIC TEST] Setup done. Type keys now.\\n\");\n+}\n+#endif\n+\n static void aplic_init(struct aplic_data *aplic)\n {\n \tstruct aplic_delegate_data *deleg;\n@@ -245,6 +280,7 @@ static int aplic_check_msicfg(struct aplic_msicfg_data *msicfg)\n \treturn 0;\n }\n \n+#ifdef APLIC_QEMU_WIRED_TEST\n static int aplic_hwirq_handler(u32 hwirq, void *opaque)\n {\n \t(void)opaque;\n@@ -252,8 +288,12 @@ static int aplic_hwirq_handler(u32 hwirq, void *opaque)\n \tsbi_printf(\"[APLIC] Enter registered hwirq %u raw handler callback\\n\",\n \t\t hwirq);\n \n+\tif (hwirq == 10)\n+\t\taplic_test_uart_handler();\n+\n \treturn SBI_OK;\n }\n+#endif\n \n static inline void *aplic_idc_base(unsigned long aplic_addr, u32 idc_index)\n {\n@@ -501,10 +541,14 @@ int aplic_cold_irqchip_init(struct aplic_data *aplic)\n \n \t/* Attach to the aplic list */\n \tsbi_list_add_tail(&aplic->node, &aplic_list);\n+#ifdef APLIC_QEMU_WIRED_TEST\n \trc = sbi_irqchip_register_handler(&aplic->irqchip, 1, aplic->num_source,\n \t\t\t\t\t aplic_hwirq_handler, NULL);\n \tif (rc)\n \t\treturn rc;\n \n+\t/* Enable test in M-mode before jumping to any payload */\n+\taplic_hwirq_test_run(aplic->addr);\n+#endif\n \treturn 0;\n }\n", "prefixes": [ "3/3", "NOT-FOR-UPSTREAM" ] }