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GET /api/patches/2195345/?format=api
{ "id": 2195345, "url": "http://patchwork.ozlabs.org/api/patches/2195345/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210201344.1403613-5-pierrick.bouvier@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210201344.1403613-5-pierrick.bouvier@linaro.org>", "list_archive_url": null, "date": "2026-02-10T20:13:44", "name": "[4/4] contrib/plugins/uftrace: add riscv64 support", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "881f9de683bee8f616ff6a79d3a6c9a2b25c3e51", "submitter": { "id": 85798, "url": "http://patchwork.ozlabs.org/api/people/85798/?format=api", "name": "Pierrick Bouvier", "email": "pierrick.bouvier@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210201344.1403613-5-pierrick.bouvier@linaro.org/mbox/", "series": [ { "id": 491734, "url": "http://patchwork.ozlabs.org/api/series/491734/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=491734", "date": "2026-02-10T20:13:44", "name": "contrib/plugins/uftrace: add riscv64 support", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/491734/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195345/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195345/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=bMely8es;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; 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helo=mail-pl1-x630.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Signed-off-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>\n---\n docs/about/emulation.rst | 10 +++--\n contrib/plugins/uftrace.c | 87 +++++++++++++++++++++++++++++++++++++++\n 2 files changed, 94 insertions(+), 3 deletions(-)", "diff": "diff --git a/docs/about/emulation.rst b/docs/about/emulation.rst\nindex f547e118eef..76c6ea92ca9 100644\n--- a/docs/about/emulation.rst\n+++ b/docs/about/emulation.rst\n@@ -836,8 +836,8 @@ Uftrace\n This plugin generates a binary trace compatible with\n `uftrace <https://github.com/namhyung/uftrace>`_.\n \n-Plugin supports aarch64 and x64, and works in user and system mode, allowing to\n-trace a system boot, which is not something possible usually.\n+Plugin supports aarch64, x64 and riscv64, and works in user and system mode,\n+allowing to trace a system boot, which is not something possible usually.\n \n In user mode, the memory mapping is directly copied from ``/proc/self/maps`` at\n the end of execution. Uftrace should be able to retrieve symbols by itself,\n@@ -872,7 +872,7 @@ Performance wise, overhead compared to normal tcg execution is around x5-x15.\n - Description\n * - trace-privilege-level=[on|off]\n - Generate separate traces for each privilege level (Exception Level +\n- Security State on aarch64, Rings on x64).\n+ Security State on aarch64, Privilege levels on riscv64 and Rings on x64).\n \n .. list-table:: uftrace_symbols.py arguments\n :widths: 20 80\n@@ -976,6 +976,10 @@ You can follow the exact same instructions for a x64 system, combining edk2,\n Linux, and Ubuntu, simply by switching to\n `x86_64 <https://github.com/pbo-linaro/qemu-linux-stack/tree/x86_64>`_ branch.\n \n+You can follow the exact same instructions for a riscv64 system, combining\n+opensbi, Linux, and Ubuntu, simply by switching to\n+`riscv64 <https://github.com/pbo-linaro/qemu-linux-stack/tree/riscv64>`_ branch.\n+\n To build and run the system::\n \n # Install dependencies\ndiff --git a/contrib/plugins/uftrace.c b/contrib/plugins/uftrace.c\nindex 21ac1402047..e3c65a1c930 100644\n--- a/contrib/plugins/uftrace.c\n+++ b/contrib/plugins/uftrace.c\n@@ -99,6 +99,19 @@ typedef struct {\n struct qemu_plugin_register *reg_cr0;\n } X64Cpu;\n \n+typedef struct {\n+ struct qemu_plugin_register *reg_fp;\n+ struct qemu_plugin_register *reg_priv;\n+} Riscv64Cpu;\n+\n+typedef enum {\n+ RISCV64_USER,\n+ RISCV64_SUPERVISOR,\n+ RISCV64_RESERVED,\n+ RISCV64_MACHINE,\n+ RISCV64_PRIVILEGE_LEVEL_MAX,\n+} Riscv64PrivilegeLevel;\n+\n typedef struct {\n uint64_t timestamp;\n uint64_t data;\n@@ -681,6 +694,78 @@ static CpuOps x64_ops = {\n .does_insn_modify_frame_pointer = x64_does_insn_modify_frame_pointer,\n };\n \n+static uint8_t riscv64_num_privilege_levels(void)\n+{\n+ return RISCV64_PRIVILEGE_LEVEL_MAX;\n+}\n+\n+static const char *riscv64_get_privilege_level_name(uint8_t pl)\n+{\n+ switch (pl) {\n+ case RISCV64_USER: return \"User\";\n+ case RISCV64_SUPERVISOR: return \"Supervisor\";\n+ case RISCV64_RESERVED: return \"Unknown\";\n+ case RISCV64_MACHINE: return \"Machine\";\n+ default:\n+ g_assert_not_reached();\n+ }\n+}\n+\n+static uint8_t riscv64_get_privilege_level(Cpu *cpu_)\n+{\n+ Riscv64Cpu *cpu = cpu_->arch;\n+ return cpu_read_register64(cpu_, cpu->reg_priv);\n+}\n+\n+static uint64_t riscv64_get_frame_pointer(Cpu *cpu_)\n+{\n+ Riscv64Cpu *cpu = cpu_->arch;\n+ return cpu_read_register64(cpu_, cpu->reg_fp);\n+}\n+\n+static uint64_t riscv64_get_next_frame_pointer(Cpu *cpu_, uint64_t fp)\n+{\n+ return cpu_read_memory64(cpu_, fp - 16);\n+}\n+\n+static uint64_t riscv64_get_next_return_address(Cpu *cpu_, uint64_t fp)\n+{\n+ return cpu_read_memory64(cpu_, fp - 8);\n+}\n+\n+static void riscv64_init(Cpu *cpu_)\n+{\n+ Riscv64Cpu *cpu = g_new0(Riscv64Cpu, 1);\n+ cpu_->arch = cpu;\n+ cpu->reg_fp = plugin_find_register(\"fp\");\n+ g_assert(cpu->reg_fp);\n+ cpu->reg_priv = plugin_find_register(\"priv\");\n+ g_assert(cpu->reg_priv);\n+}\n+\n+static void riscv64_end(Cpu *cpu)\n+{\n+ g_free(cpu->arch);\n+}\n+\n+static bool riscv64_does_insn_modify_frame_pointer(const char *disas)\n+{\n+ /* fp is s0 in disassembly */\n+ return strstr(disas, \"s0\");\n+}\n+\n+static CpuOps riscv64_ops = {\n+ .init = riscv64_init,\n+ .end = riscv64_end,\n+ .get_frame_pointer = riscv64_get_frame_pointer,\n+ .get_next_frame_pointer = riscv64_get_next_frame_pointer,\n+ .get_next_return_address = riscv64_get_next_return_address,\n+ .get_privilege_level = riscv64_get_privilege_level,\n+ .num_privilege_levels = riscv64_num_privilege_levels,\n+ .get_privilege_level_name = riscv64_get_privilege_level_name,\n+ .does_insn_modify_frame_pointer = riscv64_does_insn_modify_frame_pointer,\n+};\n+\n static void track_privilege_change(unsigned int cpu_index, void *udata)\n {\n Cpu *cpu = qemu_plugin_scoreboard_find(score, cpu_index);\n@@ -890,6 +975,8 @@ QEMU_PLUGIN_EXPORT int qemu_plugin_install(qemu_plugin_id_t id,\n arch_ops = aarch64_ops;\n } else if (!strcmp(info->target_name, \"x86_64\")) {\n arch_ops = x64_ops;\n+ } else if (!strcmp(info->target_name, \"riscv64\")) {\n+ arch_ops = riscv64_ops;\n } else {\n fprintf(stderr, \"plugin uftrace: %s target is not supported\\n\",\n info->target_name);\n", "prefixes": [ "4/4" ] }