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GET /api/patches/2195337/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2195337,
    "url": "http://patchwork.ozlabs.org/api/patches/2195337/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/3f2f16ff46505198da7f90b85a7b99220d0bc0b4.1770753117.git.balaton@eik.bme.hu/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<3f2f16ff46505198da7f90b85a7b99220d0bc0b4.1770753117.git.balaton@eik.bme.hu>",
    "list_archive_url": null,
    "date": "2026-02-10T20:02:11",
    "name": "[v3,3/6] hw/ide/sii3112: Use memory_region_new to avoid leaking regions",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "e9bd02985060df9c699dcd3f6eecf5a8984e5c01",
    "submitter": {
        "id": 16148,
        "url": "http://patchwork.ozlabs.org/api/people/16148/?format=api",
        "name": "BALATON Zoltan",
        "email": "balaton@eik.bme.hu"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/3f2f16ff46505198da7f90b85a7b99220d0bc0b4.1770753117.git.balaton@eik.bme.hu/mbox/",
    "series": [
        {
            "id": 491733,
            "url": "http://patchwork.ozlabs.org/api/series/491733/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=491733",
            "date": "2026-02-10T20:02:11",
            "name": "Implement memory_region_new_* functions",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/491733/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2195337/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2195337/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>",
        "X-Original-To": "incoming@patchwork.ozlabs.org",
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)",
        "Received": [
            "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f9XYZ6ZRTz1xvg\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 11 Feb 2026 07:03:14 +1100 (AEDT)",
            "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1vptwL-0000q8-Mu; Tue, 10 Feb 2026 15:02:30 -0500",
            "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <balaton@eik.bme.hu>)\n id 1vptwD-0000oG-5d\n for qemu-devel@nongnu.org; Tue, 10 Feb 2026 15:02:21 -0500",
            "from zero.eik.bme.hu ([2001:738:2001:2001::2001])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <balaton@eik.bme.hu>)\n id 1vptwA-00050y-QC\n for qemu-devel@nongnu.org; Tue, 10 Feb 2026 15:02:20 -0500",
            "from localhost (localhost [127.0.0.1])\n by zero.eik.bme.hu (Postfix) with ESMTP id 5628D596E89;\n Tue, 10 Feb 2026 21:02:13 +0100 (CET)",
            "from zero.eik.bme.hu ([127.0.0.1])\n by localhost (zero.eik.bme.hu [127.0.0.1]) (amavis, port 10028) with ESMTP\n id eYXfe6g8KAHG; Tue, 10 Feb 2026 21:02:11 +0100 (CET)",
            "by zero.eik.bme.hu (Postfix, from userid 432)\n id 5BD90596A41; Tue, 10 Feb 2026 21:02:11 +0100 (CET)"
        ],
        "X-Virus-Scanned": "amavis at eik.bme.hu",
        "Message-ID": "\n <3f2f16ff46505198da7f90b85a7b99220d0bc0b4.1770753117.git.balaton@eik.bme.hu>",
        "In-Reply-To": "<cover.1770753117.git.balaton@eik.bme.hu>",
        "References": "<cover.1770753117.git.balaton@eik.bme.hu>",
        "From": "BALATON Zoltan <balaton@eik.bme.hu>",
        "Subject": "[PATCH v3 3/6] hw/ide/sii3112: Use memory_region_new to avoid leaking\n regions",
        "MIME-Version": "1.0",
        "Content-Type": "text/plain; charset=UTF-8",
        "Content-Transfer-Encoding": "8bit",
        "To": "qemu-devel@nongnu.org",
        "Cc": "Peter Xu <peterx@redhat.com>,\n Akihiko Odaki <odaki@rsg.ci.i.u-tokyo.ac.jp>,\n Paolo Bonzini <pbonzini@redhat.com>,\n Mark Cave-Ayland <mark.cave-ayland@ilande.co.uk>,\n Gerd Hoffmann <kraxel@redhat.com>, Max Filippov <jcmvbkbc@gmail.com>,\n Peter Maydell <peter.maydell@linaro.org>, =?utf-8?q?Philippe_Mathieu-Daud?=\n\t=?utf-8?q?=C3=A9?= <philmd@linaro.org>",
        "Date": "Tue, 10 Feb 2026 21:02:11 +0100 (CET)",
        "Received-SPF": "pass client-ip=2001:738:2001:2001::2001;\n envelope-from=balaton@eik.bme.hu; helo=zero.eik.bme.hu",
        "X-Spam_score_int": "-18",
        "X-Spam_score": "-1.9",
        "X-Spam_bar": "-",
        "X-Spam_report": "(-1.9 / 5.0 requ) BAYES_00=-1.9, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no",
        "X-Spam_action": "no action",
        "X-BeenThere": "qemu-devel@nongnu.org",
        "X-Mailman-Version": "2.1.29",
        "Precedence": "list",
        "List-Id": "qemu development <qemu-devel.nongnu.org>",
        "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>",
        "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>",
        "List-Post": "<mailto:qemu-devel@nongnu.org>",
        "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>",
        "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>",
        "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org",
        "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org"
    },
    "content": "Memory regions created with memory_region_init are not freed with\ntheir owner. Use memory_region_new instead to let QOM manage the\nlifetime of the memory regions.\n\nSigned-off-by: BALATON Zoltan <balaton@eik.bme.hu>\n---\n hw/ide/sii3112.c | 30 ++++++++++++------------------\n 1 file changed, 12 insertions(+), 18 deletions(-)",
    "diff": "diff --git a/hw/ide/sii3112.c b/hw/ide/sii3112.c\nindex 9b28c691fd..d2dcfc3830 100644\n--- a/hw/ide/sii3112.c\n+++ b/hw/ide/sii3112.c\n@@ -31,7 +31,7 @@ typedef struct SiI3112Regs {\n \n struct SiI3112PCIState {\n     PCIIDEState i;\n-    MemoryRegion mmio;\n+\n     SiI3112Regs regs[2];\n };\n \n@@ -249,39 +249,33 @@ static void sii3112_reset(DeviceState *dev)\n \n static void sii3112_pci_realize(PCIDevice *dev, Error **errp)\n {\n-    SiI3112PCIState *d = SII3112_PCI(dev);\n     PCIIDEState *s = PCI_IDE(dev);\n     DeviceState *ds = DEVICE(dev);\n-    MemoryRegion *mr;\n-    int i;\n+    Object *o = OBJECT(dev);\n+    MemoryRegion *mmio, *mr;\n \n     pci_config_set_interrupt_pin(dev->config, 1);\n     pci_set_byte(dev->config + PCI_CACHE_LINE_SIZE, 8);\n \n     /* BAR5 is in PCI memory space */\n-    memory_region_init_io(&d->mmio, OBJECT(d), &sii3112_reg_ops, d,\n-                         \"sii3112.bar5\", 0x200);\n-    pci_register_bar(dev, 5, PCI_BASE_ADDRESS_SPACE_MEMORY, &d->mmio);\n+    mmio = memory_region_new_io(o, &sii3112_reg_ops, SII3112_PCI(dev),\n+                                \"sii3112.bar5\", 0x200);\n+    pci_register_bar(dev, 5, PCI_BASE_ADDRESS_SPACE_MEMORY, mmio);\n \n     /* BAR0-BAR4 are PCI I/O space aliases into BAR5 */\n-    mr = g_new(MemoryRegion, 1);\n-    memory_region_init_alias(mr, OBJECT(d), \"sii3112.bar0\", &d->mmio, 0x80, 8);\n+    mr = memory_region_new_alias(o, \"sii3112.bar0\", mmio, 0x80, 8);\n     pci_register_bar(dev, 0, PCI_BASE_ADDRESS_SPACE_IO, mr);\n-    mr = g_new(MemoryRegion, 1);\n-    memory_region_init_alias(mr, OBJECT(d), \"sii3112.bar1\", &d->mmio, 0x88, 4);\n+    mr = memory_region_new_alias(o, \"sii3112.bar1\", mmio, 0x88, 4);\n     pci_register_bar(dev, 1, PCI_BASE_ADDRESS_SPACE_IO, mr);\n-    mr = g_new(MemoryRegion, 1);\n-    memory_region_init_alias(mr, OBJECT(d), \"sii3112.bar2\", &d->mmio, 0xc0, 8);\n+    mr = memory_region_new_alias(o, \"sii3112.bar2\", mmio, 0xc0, 8);\n     pci_register_bar(dev, 2, PCI_BASE_ADDRESS_SPACE_IO, mr);\n-    mr = g_new(MemoryRegion, 1);\n-    memory_region_init_alias(mr, OBJECT(d), \"sii3112.bar3\", &d->mmio, 0xc8, 4);\n+    mr = memory_region_new_alias(o, \"sii3112.bar3\", mmio, 0xc8, 4);\n     pci_register_bar(dev, 3, PCI_BASE_ADDRESS_SPACE_IO, mr);\n-    mr = g_new(MemoryRegion, 1);\n-    memory_region_init_alias(mr, OBJECT(d), \"sii3112.bar4\", &d->mmio, 0, 16);\n+    mr = memory_region_new_alias(o, \"sii3112.bar4\", mmio, 0, 16);\n     pci_register_bar(dev, 4, PCI_BASE_ADDRESS_SPACE_IO, mr);\n \n     qdev_init_gpio_in(ds, sii3112_set_irq, 2);\n-    for (i = 0; i < 2; i++) {\n+    for (int i = 0; i < 2; i++) {\n         ide_bus_init(&s->bus[i], sizeof(s->bus[i]), ds, i, 1);\n         ide_bus_init_output_irq(&s->bus[i], qdev_get_gpio_in(ds, i));\n \n",
    "prefixes": [
        "v3",
        "3/6"
    ]
}