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GET /api/patches/2195232/?format=api
{ "id": 2195232, "url": "http://patchwork.ozlabs.org/api/patches/2195232/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openbmc/patch/20260210154117.1126857-1-tmaimon77@gmail.com/", "project": { "id": 56, "url": "http://patchwork.ozlabs.org/api/projects/56/?format=api", "name": "OpenBMC development", "link_name": "openbmc", "list_id": "openbmc.lists.ozlabs.org", "list_email": "openbmc@lists.ozlabs.org", "web_url": "http://github.com/openbmc/", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210154117.1126857-1-tmaimon77@gmail.com>", "list_archive_url": null, "date": "2026-02-10T15:41:17", "name": "[v1] dt-bindings: hwmon: convert npcm750-pwm-fan to DT schema", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "44b230667329fc37ed70e9affff9c5125a282ff0", "submitter": { "id": 72291, "url": "http://patchwork.ozlabs.org/api/people/72291/?format=api", "name": "Tomer Maimon", "email": "tmaimon77@gmail.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/openbmc/patch/20260210154117.1126857-1-tmaimon77@gmail.com/mbox/", "series": [ { "id": 491694, "url": "http://patchwork.ozlabs.org/api/series/491694/?format=api", "web_url": "http://patchwork.ozlabs.org/project/openbmc/list/?series=491694", "date": "2026-02-10T15:41:17", "name": "[v1] dt-bindings: hwmon: convert npcm750-pwm-fan to DT schema", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/491694/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195232/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195232/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <openbmc+bounces-1349-incoming=patchwork.ozlabs.org@lists.ozlabs.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "openbmc@lists.ozlabs.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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"AZuq6aKruIW7EMd8UVUsdSo/jJenAqVD+QsMC3URmrqWzfm88uSBrmNybz327VDG7Of\n\tIauWtXYC3TkcbAeoEhSykIj/zcqdRveedrbugOaYrvfABH5KYKGJadaNgiwui0Y7AlAeVk8JqYp\n\tQjbQVzB8aZ7wLuIwfCLXksbad/lUbSofayuaddgiopgYoF8UQBAKw2FtEQwu/YAVe82d0NRHtbq\n\tO9kqaGFE5lt2DlvZE/fGhil8XXIrxgAC8OpxXPCvUo+N7HCABAC1wPwZMNNu+VNEVlisF5HUGjm\n\tz4PrMTgHqanRJrgUtPYiWcSLHAKL8bGhVhcBCJZ1sRPhgEOrQHAmASFfNZ5qoCpz9wWZZvQv6OZ\n\tzWBRC1wSeb88hE+IM/RFGeyUk8/VC6ubb9EYpehlx8I1X52QP2x2xNUqx0z/3Z/5ULhRfqtPsDQ\n\tIMpluaoIj3hK9D91EhqPIrxkj6I75+T++Zmw==", "X-Received": "by 2002:a05:6000:2010:b0:437:71cc:a246 with SMTP id\n ffacd0b85a97d-43771cca558mr10374442f8f.10.1770739024825;\n Tue, 10 Feb 2026 07:57:04 -0800 (PST)", "From": "Tomer Maimon <tmaimon77@gmail.com>", "To": "andrew@codeconstruct.com.au,\n\tavifishman70@gmail.com,\n\ttali.perry1@gmail.com,\n\tlinux@roeck-us.net,\n\trobh@kernel.org,\n\tkrzk+dt@kernel.org,\n\tconor+dt@kernel.org", "Cc": "venture@google.com,\n\tyuenn@google.com,\n\tbenjaminfair@google.com,\n\topenbmc@lists.ozlabs.org,\n\tlinux-hwmon@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org,\n\tTomer Maimon <tmaimon77@gmail.com>", "Subject": "[PATCH v1] dt-bindings: hwmon: convert npcm750-pwm-fan to DT schema", "Date": "Tue, 10 Feb 2026 17:41:17 +0200", "Message-Id": "<20260210154117.1126857-1-tmaimon77@gmail.com>", "X-Mailer": "git-send-email 2.34.1", "X-Mailing-List": "openbmc@lists.ozlabs.org", "List-Id": "<openbmc.lists.ozlabs.org>", "List-Help": "<mailto:openbmc+help@lists.ozlabs.org>", "List-Owner": "<mailto:openbmc+owner@lists.ozlabs.org>", "List-Post": "<mailto:openbmc@lists.ozlabs.org>", "List-Subscribe": "<mailto:openbmc+subscribe@lists.ozlabs.org>,\n <mailto:openbmc+subscribe-digest@lists.ozlabs.org>,\n <mailto:openbmc+subscribe-nomail@lists.ozlabs.org>", "List-Unsubscribe": "<mailto:openbmc+unsubscribe@lists.ozlabs.org>", "Precedence": "list", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-Spam-Status": "No, score=0.1 required=5.0 tests=DKIM_SIGNED,DKIM_VALID,\n\tDKIM_VALID_AU,DKIM_VALID_EF,FREEMAIL_ENVFROM_END_DIGIT,FREEMAIL_FROM,\n\tRCVD_IN_DNSWL_NONE,SPF_HELO_NONE,SPF_PASS autolearn=disabled\n\tversion=4.0.1", "X-Spam-Checker-Version": "SpamAssassin 4.0.1 (2024-03-25) on lists.ozlabs.org" }, "content": "Convert the Nuvoton HWMON PWM and FAN controllers binding to schema\nformat.\n\nSigned-off-by: Tomer Maimon <tmaimon77@gmail.com>\n---\n .../bindings/hwmon/npcm750-pwm-fan.txt | 88 ------------\n .../bindings/hwmon/npcm750-pwm-fan.yaml | 132 ++++++++++++++++++\n 2 files changed, 132 insertions(+), 88 deletions(-)\n delete mode 100644 Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt\n create mode 100644 Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.yaml", "diff": "diff --git a/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt b/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt\ndeleted file mode 100644\nindex 18095ba87a5a..000000000000\n--- a/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.txt\n+++ /dev/null\n@@ -1,88 +0,0 @@\n-Nuvoton NPCM PWM and Fan Tacho controller device\n-\n-The Nuvoton BMC NPCM7XX supports 8 Pulse-width modulation (PWM)\n-controller outputs and 16 Fan tachometer controller inputs.\n-\n-The Nuvoton BMC NPCM8XX supports 12 Pulse-width modulation (PWM)\n-controller outputs and 16 Fan tachometer controller inputs.\n-\n-Required properties for pwm-fan node\n-- #address-cells : should be 1.\n-- #size-cells\t: should be 0.\n-- compatible\t: \"nuvoton,npcm750-pwm-fan\" for Poleg NPCM7XX.\n-\t\t\t\t: \"nuvoton,npcm845-pwm-fan\" for Arbel NPCM8XX.\n-- reg\t\t\t: specifies physical base address and size of the registers.\n-- reg-names\t: must contain:\n-\t\t\t\t\t* \"pwm\" for the PWM registers.\n-\t\t\t\t\t* \"fan\" for the Fan registers.\n-- clocks\t\t: phandle of reference clocks.\n-- clock-names\t: must contain\n-\t\t\t\t\t* \"pwm\" for PWM controller operating clock.\n-\t\t\t\t\t* \"fan\" for Fan controller operating clock.\n-- interrupts\t: contain the Fan interrupts with flags for falling edge.\n-- pinctrl-names\t: a pinctrl state named \"default\" must be defined.\n-- pinctrl-0\t: phandle referencing pin configuration of the PWM and Fan\n-\t\t\t\t\tcontroller ports.\n-\n-fan subnode format:\n-===================\n-Under fan subnode can be upto 8 child nodes, each child node representing a fan.\n-Each fan subnode must have one PWM channel and at least one Fan tach channel.\n-\n-For PWM channel can be configured cooling-levels to create cooling device.\n-Cooling device could be bound to a thermal zone for the thermal control.\n-\n-Required properties for each child node:\n-- reg : specify the PWM output channel.\n-\tinteger value in the range 0 through 7, that represent\n-\tthe PWM channel number that used.\n-\n-- fan-tach-ch : specify the Fan tach input channel.\n-\t\tinteger value in the range 0 through 15, that represent\n-\t\tthe fan tach channel number that used.\n-\n-\t\tAt least one Fan tach input channel is required\n-\n-Optional property for each child node:\n-- cooling-levels: PWM duty cycle values in a range from 0 to 255\n- which correspond to thermal cooling states.\n-\n-Examples:\n-\n-pwm_fan:pwm-fan-controller@103000 {\n-\t#address-cells = <1>;\n-\t#size-cells = <0>;\n-\tcompatible = \"nuvoton,npcm750-pwm-fan\";\n-\treg = <0x103000 0x2000>,\n-\t\t<0x180000 0x8000>;\n-\treg-names = \"pwm\", \"fan\";\n-\tclocks = <&clk NPCM7XX_CLK_APB3>,\n-\t\t<&clk NPCM7XX_CLK_APB4>;\n-\tclock-names = \"pwm\",\"fan\";\n-\tinterrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t<GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t<GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t<GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t<GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t<GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t<GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,\n-\t\t\t<GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;\n-\tpinctrl-names = \"default\";\n-\tpinctrl-0 = <&pwm0_pins &pwm1_pins &pwm2_pins\n-\t\t\t&fanin0_pins &fanin1_pins &fanin2_pins\n-\t\t\t&fanin3_pins &fanin4_pins>;\n-\tfan@0 {\n-\t\treg = <0x00>;\n-\t\tfan-tach-ch = /bits/ 8 <0x00 0x01>;\n-\t\tcooling-levels = <127 255>;\n-\t};\n-\tfan@1 {\n-\t\treg = <0x01>;\n-\t\tfan-tach-ch = /bits/ 8 <0x02 0x03>;\n-\t};\n-\tfan@2 {\n-\t\treg = <0x02>;\n-\t\tfan-tach-ch = /bits/ 8 <0x04>;\n-\t};\n-\n-};\ndiff --git a/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.yaml b/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.yaml\nnew file mode 100644\nindex 000000000000..954ba7d38b93\n--- /dev/null\n+++ b/Documentation/devicetree/bindings/hwmon/npcm750-pwm-fan.yaml\n@@ -0,0 +1,132 @@\n+# SPDX-License-Identifier: (GPL-2.0-only OR BSD-2-Clause)\n+%YAML 1.2\n+---\n+$id: http://devicetree.org/schemas/hwmon/npcm750-pwm-fan.yaml#\n+$schema: http://devicetree.org/meta-schemas/core.yaml#\n+\n+title: Nuvoton NPCM7xx/NPCM8xx PWM and Fan Tach Controller\n+\n+maintainers:\n+ - Tomer Maimon <tmaimon77@gmail.com>\n+\n+description: |\n+ The NPCM7xx/NPCM8xx family includes a PWM and Fan Tachometer controller.\n+ The controller provides up to 8 (NPCM7xx) or 12 (NPCM8xx) PWM channels and up\n+ to 16 tachometer inputs. It is used for fan speed control and monitoring.\n+\n+properties:\n+ compatible:\n+ enum:\n+ - nuvoton,npcm750-pwm-fan\n+ - nuvoton,npcm845-pwm-fan\n+\n+ reg:\n+ maxItems: 2\n+ description: Register addresses for PWM and Fan Tach units.\n+\n+ reg-names:\n+ items:\n+ - const: pwm\n+ - const: fan\n+\n+ clocks:\n+ maxItems: 2\n+ description: Clocks for the PWM and Fan Tach modules.\n+\n+ clock-names:\n+ items:\n+ - const: pwm\n+ - const: fan\n+\n+ interrupts:\n+ description: |\n+ Contains the Fan interrupts with flags for falling edge.\n+ For NPCM7XX, 8 interrupt lines are expected (one per PWM channel).\n+ For NPCM8XX, 12 interrupt lines are expected (one per PWM channel).\n+ minItems: 8\n+ maxItems: 12\n+\n+ \"#address-cells\":\n+ const: 1\n+\n+ \"#size-cells\":\n+ const: 0\n+\n+patternProperties:\n+ \"^fan@[0-9a-f]+$\":\n+ type: object\n+ $ref: fan-common.yaml#\n+ unevaluatedProperties: false\n+\n+ properties:\n+ reg:\n+ maxItems: 1\n+ description: |\n+ Specify the PWM output channel. Integer value in the range 0-7 for\n+ NPCM7XX or 0-11 for NPCM8XX, representing the PWM channel number.\n+\n+ fan-tach-ch:\n+ $ref: /schemas/types.yaml#/definitions/uint32-array\n+ description: |\n+ The tach channel(s) used for the fan.\n+ Integer values in the range 0-15.\n+\n+ cooling-levels:\n+ $ref: /schemas/types.yaml#/definitions/uint32-array\n+ description: |\n+ PWM duty cycle values in a range from 0 to 255 which\n+ correspond to thermal cooling states. This property enables\n+ thermal zone integration for automatic fan speed control\n+ based on temperature.\n+\n+ required:\n+ - reg\n+ - fan-tach-ch\n+\n+required:\n+ - compatible\n+ - reg\n+ - reg-names\n+ - clocks\n+ - clock-names\n+ - interrupts\n+\n+additionalProperties: false\n+\n+examples:\n+ - |\n+ #include <dt-bindings/clock/nuvoton,npcm7xx-clock.h>\n+ #include <dt-bindings/interrupt-controller/arm-gic.h>\n+ pwm_fan: pwm-fan@103000 {\n+ compatible = \"nuvoton,npcm750-pwm-fan\";\n+ #address-cells = <1>;\n+ #size-cells = <0>;\n+\n+ reg = <0x103000 0x2000>, <0x180000 0x8000>;\n+ reg-names = \"pwm\", \"fan\";\n+\n+ clocks = <&clk NPCM7XX_CLK_APB3>, <&clk NPCM7XX_CLK_APB4>;\n+ clock-names = \"pwm\", \"fan\";\n+\n+ interrupts = <GIC_SPI 96 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 97 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 98 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 99 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 100 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 101 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 102 IRQ_TYPE_LEVEL_HIGH>,\n+ <GIC_SPI 103 IRQ_TYPE_LEVEL_HIGH>;\n+ pinctrl-names = \"default\";\n+ pinctrl-0 = <&pwm0_pins &fanin0_pins>;\n+\n+ fan@0 {\n+ reg = <0>;\n+ fan-tach-ch = <0 1>;\n+ cooling-levels = <64 128 192 255>;\n+ };\n+\n+ fan@1 {\n+ reg = <1>;\n+ fan-tach-ch = <2>;\n+ };\n+ };\n", "prefixes": [ "v1" ] }