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GET /api/patches/2195220/?format=api
{ "id": 2195220, "url": "http://patchwork.ozlabs.org/api/patches/2195220/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/patch/20260210151459.2348758-13-raymondmaoca@gmail.com/", "project": { "id": 18, "url": "http://patchwork.ozlabs.org/api/projects/18/?format=api", "name": "U-Boot", "link_name": "uboot", "list_id": "u-boot.lists.denx.de", "list_email": "u-boot@lists.denx.de", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210151459.2348758-13-raymondmaoca@gmail.com>", "list_archive_url": null, "date": "2026-02-10T15:14:55", "name": "[v2,12/16] spacemit: k1: add TLV EEPROM support in SPL", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "adc8ba71e58477151a58ce09cdbe09a28cb13f23", "submitter": { "id": 91989, "url": "http://patchwork.ozlabs.org/api/people/91989/?format=api", "name": "Raymond Mao", "email": "raymondmaoca@gmail.com" }, "delegate": { "id": 20174, "url": "http://patchwork.ozlabs.org/api/users/20174/?format=api", "username": "Andes", "first_name": "Andes", "last_name": "", "email": "uboot@andestech.com" }, "mbox": "http://patchwork.ozlabs.org/project/uboot/patch/20260210151459.2348758-13-raymondmaoca@gmail.com/mbox/", "series": [ { "id": 491690, "url": "http://patchwork.ozlabs.org/api/series/491690/?format=api", "web_url": "http://patchwork.ozlabs.org/project/uboot/list/?series=491690", "date": "2026-02-10T15:14:43", "name": "Add board support for Spacemit K1 SoC in SPL", "version": 2, "mbox": "http://patchwork.ozlabs.org/series/491690/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195220/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195220/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<u-boot-bounces@lists.denx.de>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", 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<raymondmaoca@gmail.com>", "To": "u-boot@lists.denx.de", "Cc": "uboot@riscstar.com, u-boot-spacemit@groups.io, raymond.mao@riscstar.com,\n rick@andestech.com, ycliang@andestech.com, trini@konsulko.com,\n lukma@denx.de, hs@nabladev.com, jh80.chung@samsung.com, peng.fan@nxp.com,\n xypron.glpk@gmx.de, randolph@andestech.com, dlan@gentoo.org,\n junhui.liu@pigmoral.tech, neil.armstrong@linaro.org,\n quentin.schulz@cherry.de, samuel@sholland.org, raymondmaoca@gmail.com,\n Guodong Xu <guodong.xu@riscstar.com>", "Subject": "[PATCH v2 12/16] spacemit: k1: add TLV EEPROM support in SPL", "Date": "Tue, 10 Feb 2026 10:14:55 -0500", "Message-Id": "<20260210151459.2348758-13-raymondmaoca@gmail.com>", "X-Mailer": "git-send-email 2.25.1", "In-Reply-To": "<20260210151459.2348758-1-raymondmaoca@gmail.com>", "References": "<20260210151459.2348758-1-raymondmaoca@gmail.com>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit", "X-BeenThere": "u-boot@lists.denx.de", "X-Mailman-Version": "2.1.39", "Precedence": "list", "List-Id": "U-Boot discussion <u-boot.lists.denx.de>", "List-Unsubscribe": "<https://lists.denx.de/options/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=unsubscribe>", "List-Archive": "<https://lists.denx.de/pipermail/u-boot/>", "List-Post": "<mailto:u-boot@lists.denx.de>", "List-Help": "<mailto:u-boot-request@lists.denx.de?subject=help>", "List-Subscribe": "<https://lists.denx.de/listinfo/u-boot>,\n <mailto:u-boot-request@lists.denx.de?subject=subscribe>", "Errors-To": "u-boot-bounces@lists.denx.de", "Sender": "\"U-Boot\" <u-boot-bounces@lists.denx.de>", "X-Virus-Scanned": "clamav-milter 0.103.8 at phobos.denx.de", "X-Virus-Status": "Clean" }, "content": "From: Raymond Mao <raymond.mao@riscstar.com>\n\nAnd support for required components including clock, I2C controller,\nand I2C EEPROM.\n\nSigned-off-by: Raymond Mao <raymond.mao@riscstar.com>\nSigned-off-by: Guodong Xu <guodong.xu@riscstar.com>\n---\n arch/riscv/dts/k1-spl.dts | 28 +++++++++\n arch/riscv/dts/k1.dtsi | 104 ++++++++++++++++++++++++++++++++++\n board/spacemit/k1/spl.c | 104 +++++++++++++++++++++++++++++++++-\n board/spacemit/k1/tlv_codes.h | 22 +++++++\n configs/spacemit_k1_defconfig | 13 +++++\n 5 files changed, 270 insertions(+), 1 deletion(-)\n create mode 100644 board/spacemit/k1/tlv_codes.h", "diff": "diff --git a/arch/riscv/dts/k1-spl.dts b/arch/riscv/dts/k1-spl.dts\nindex a74eaaf6a8f..74e9957b83a 100644\n--- a/arch/riscv/dts/k1-spl.dts\n+++ b/arch/riscv/dts/k1-spl.dts\n@@ -5,6 +5,7 @@\n */\n \n /dts-v1/;\n+\n #include \"k1.dtsi\"\n #include \"binman.dtsi\"\n \n@@ -64,6 +65,33 @@\n \t\tstatus = \"okay\";\n \t\tbootph-pre-ram;\n \t};\n+\n+\ti2c@d4012000 {\t\t/* i2c2 */\n+\t\tstatus = \"okay\";\n+\t\tbootph-pre-ram;\n+\t\teeprom: eeprom {\n+\t\t\tcompatible = \"atmel,24c02\";\n+\t\t\treg = <0x50>;\n+\t\t\tstatus = \"okay\";\n+\t\t\tbootph-pre-ram;\n+\t\t};\n+\t};\n+\n+\ti2c@d401d800 {\t\t/* i2c8 */\n+\t\tstatus = \"okay\";\n+\t\tbootph-pre-ram;\n+\t\tpmic@41 {\n+\t\t\tcompatible = \"pmic\";\n+\t\t\treg = <0x41>;\n+\t\t\tstatus = \"okay\";\n+\t\t\tbootph-pre-ram;\n+\t\t};\n+\t};\n+\n+\treset-controller@d4050000 {\n+\t\tstatus = \"okay\";\n+\t\tbootph-pre-ram;\n+\t};\n };\n \n &uart0 {\ndiff --git a/arch/riscv/dts/k1.dtsi b/arch/riscv/dts/k1.dtsi\nindex 20f1cb57462..682d2fb88e2 100644\n--- a/arch/riscv/dts/k1.dtsi\n+++ b/arch/riscv/dts/k1.dtsi\n@@ -1,6 +1,7 @@\n // SPDX-License-Identifier: GPL-2.0 OR MIT\n /*\n * Copyright (C) 2024 Yangyu Chen <cyy@cyyself.name>\n+ * Copyright (C) 2025-2026 RISCstar Ltd.\n */\n \n #include <dt-bindings/clock/spacemit,k1-syscon.h>\n@@ -576,6 +577,21 @@\n \t\t\tstatus = \"disabled\";\n \t\t};\n \n+\t\treset: reset-controller@d4050000 {\n+\t\t\tcompatible = \"spacemit,k1-reset\";\n+\t\t\treg = <0x0 0xd4050000 0x0 0x209c>,\n+\t\t\t <0x0 0xd4282800 0x0 0x400>,\n+\t\t\t <0x0 0xd4015000 0x0 0x1000>,\n+\t\t\t <0x0 0xd4090000 0x0 0x1000>,\n+\t\t\t <0x0 0xd4282c00 0x0 0x400>,\n+\t\t\t <0x0 0xd8440000 0x0 0x98>,\n+\t\t\t <0x0 0xc0000000 0x0 0x4280>,\n+\t\t\t <0x0 0xf0610000 0x0 0x20>;\n+\t\t\treg-names = \"mpmu\", \"apmu\", \"apbc\", \"apbs\", \"ciu\", \"dciu\", \"ddrc\", \"apbc2\";\n+\t\t\t#reset-cells = <1>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n \t\tsyscon_mpmu: system-controller@d4050000 {\n \t\t\tcompatible = \"spacemit,k1-syscon-mpmu\";\n \t\t\treg = <0x0 0xd4050000 0x0 0x209c>;\n@@ -608,6 +624,94 @@\n \t\t\t#reset-cells = <1>;\n \t\t};\n \n+\t\ti2c0: i2c@d4010800 {\n+\t\t\tcompatible = \"spacemit,k1-i2c\";\n+\t\t\treg = <0x0 0xd4010800 0x0 0x38>;\n+\t\t\tclocks = <&syscon_apbc CLK_TWSI0>;\n+\t\t\tresets = <&reset RESET_TWSI0>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c1: i2c@d4011000 {\n+\t\t\tcompatible = \"spacemit,k1-i2c\";\n+\t\t\treg = <0x0 0xd4011000 0x0 0x38>;\n+\t\t\tclocks = <&syscon_apbc CLK_TWSI1>;\n+\t\t\tresets = <&reset RESET_TWSI1>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c2: i2c@d4012000 {\n+\t\t\tcompatible = \"spacemit,k1-i2c\";\n+\t\t\treg = <0x0 0xd4012000 0x0 0x38>;\n+\t\t\tclocks = <&syscon_apbc CLK_TWSI2>;\n+\t\t\tresets = <&reset RESET_TWSI2>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c3: i2c@d4014000 {\n+\t\t\tcompatible = \"spacemit,k1-i2c\";\n+\t\t\treg = <0x0 0xd4014000 0x0 0x38>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c4: i2c@d4012800 {\n+\t\t\tcompatible = \"spacemit,k1-i2c\";\n+\t\t\treg = <0x0 0xd4012800 0x0 0x38>;\n+\t\t\tclocks = <&syscon_apbc CLK_TWSI4>;\n+\t\t\tresets = <&reset RESET_TWSI4>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c5: i2c@d4013800 {\n+\t\t\tcompatible = \"spacemit,k1-i2c\";\n+\t\t\treg = <0x0 0xd4013800 0x0 0x38>;\n+\t\t\tclocks = <&syscon_apbc CLK_TWSI5>;\n+\t\t\tresets = <&reset RESET_TWSI5>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c6: i2c@d4018800 {\n+\t\t\tcompatible = \"spacemit,k1-i2c\";\n+\t\t\treg = <0x0 0xd4018800 0x0 0x38>;\n+\t\t\tclocks = <&syscon_apbc CLK_TWSI6>;\n+\t\t\tresets = <&reset RESET_TWSI6>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c7: i2c@d401d000 {\n+\t\t\tcompatible = \"spacemit,k1-i2c\";\n+\t\t\treg = <0x0 0xd401d000 0x0 0x38>;\n+\t\t\tclocks = <&syscon_apbc CLK_TWSI7>;\n+\t\t\tresets = <&reset RESET_TWSI7>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n+\t\ti2c8: i2c@d401d800 {\n+\t\t\tcompatible = \"spacemit,k1-i2c\";\n+\t\t\treg = <0x0 0xd401d800 0x0 0x38>;\n+\t\t\tclocks = <&syscon_apbc CLK_TWSI8>;\n+\t\t\tresets = <&reset RESET_TWSI8>;\n+\t\t\t#address-cells = <1>;\n+\t\t\t#size-cells = <0>;\n+\t\t\tstatus = \"disabled\";\n+\t\t};\n+\n \t\tplic: interrupt-controller@e0000000 {\n \t\t\tcompatible = \"spacemit,k1-plic\", \"sifive,plic-1.0.0\";\n \t\t\treg = <0x0 0xe0000000 0x0 0x4000000>;\ndiff --git a/board/spacemit/k1/spl.c b/board/spacemit/k1/spl.c\nindex 78f26616347..182e833849d 100644\n--- a/board/spacemit/k1/spl.c\n+++ b/board/spacemit/k1/spl.c\n@@ -3,10 +3,87 @@\n * Copyright (c) 2025-2026, RISCstar Ltd.\n */\n \n+#include <asm/io.h>\n+#include <clk.h>\n+#include <clk-uclass.h>\n+#include <configs/k1.h>\n #include <dm/device.h>\n #include <dm/uclass.h>\n+#include <i2c.h>\n+#include <linux/delay.h>\n #include <log.h>\n #include <spl.h>\n+#include <tlv_eeprom.h>\n+\n+#define MUX_MODE4\t\t4\n+#define EDGE_NONE\t\tBIT(6)\n+#define PULL_UP\t\t\t(6 << 13) /* bit[15:13] 110 */\n+#define PAD_DS_MEDIUM\t\tBIT(12)\n+#define PAD_1V8_DS2\t\tPAD_DS_MEDIUM\n+#define I2C_PIN_CONFIG(x) ((x) | EDGE_NONE | PULL_UP | PAD_1V8_DS2)\n+#define I2C_BUF_SIZE\t\t64\n+\n+#define MFP_GPIO_84\t\t0xd401e154\n+#define MFP_GPIO_85\t\t0xd401e158\n+\n+static void reset_early_init(void)\n+{\n+\tstruct udevice *dev;\n+\tint ret;\n+\n+\tret = uclass_get_device(UCLASS_RESET, 0, &dev);\n+\tif (ret)\n+\t\tpanic(\"Fail to detect reset controller.\\n\");\n+}\n+\n+static void i2c_early_init(void)\n+{\n+\tstruct udevice *bus;\n+\n+\t// eeprom: I2C2, pin group(GPIO_84, GPIO_85)\n+\twritel(I2C_PIN_CONFIG(MUX_MODE4), (void __iomem *)MFP_GPIO_84);\n+\twritel(I2C_PIN_CONFIG(MUX_MODE4), (void __iomem *)MFP_GPIO_85);\n+\tudelay(100);\n+\tuclass_first_device(UCLASS_I2C, &bus);\n+\twhile (bus) {\n+\t\tuclass_next_device(&bus);\n+\t\tif (!bus)\n+\t\t\tbreak;\n+\t}\n+}\n+\n+int read_product_name(char *name, int size)\n+{\n+\tu8 eeprom_data[TLV_TOTAL_LEN_MAX], *p;\n+\tstruct tlvinfo_header *tlv_hdr;\n+\tstruct tlvinfo_tlv *tlv_entry;\n+\tint ret, i = 0;\n+\tu32 entry_size;\n+\n+\tif (!name || size <= 0)\n+\t\treturn -EINVAL;\n+\tret = read_tlvinfo_tlv_eeprom(eeprom_data, &tlv_hdr,\n+\t\t\t\t &tlv_entry, i);\n+\tif (ret)\n+\t\treturn ret;\n+\tp = (u8 *)tlv_entry;\n+\tfor (i = 0; i < tlv_hdr->totallen; ) {\n+\t\tif (tlv_entry->type == TLV_CODE_PRODUCT_NAME) {\n+\t\t\tif (tlv_entry->length < size)\n+\t\t\t\tsize = tlv_entry->length;\n+\t\t\tmemset(name, 0, size);\n+\t\t\tmemcpy(name, &tlv_entry->value[0], size);\n+\t\t\treturn 0;\n+\t\t}\n+\t\tif (tlv_entry->type == TLV_CODE_CRC_32)\n+\t\t\treturn -ENOENT;\n+\t\tentry_size = tlv_entry->length + sizeof(struct tlvinfo_tlv);\n+\t\ti += entry_size;\n+\t\tp += entry_size;\n+\t\ttlv_entry = (struct tlvinfo_tlv *)p;\n+\t}\n+\treturn -ENOENT;\n+}\n \n static void clk_early_init(void)\n {\n@@ -44,6 +121,7 @@ void serial_early_init(void)\n \n void board_init_f(ulong dummy)\n {\n+\tu8 i2c_buf[I2C_BUF_SIZE];\n \tint ret;\n \n \tret = spl_early_init();\n@@ -52,12 +130,36 @@ void board_init_f(ulong dummy)\n \n \triscv_cpu_setup();\n \n+\treset_early_init();\n \tclk_early_init();\n \tserial_early_init();\n+\n \tpreloader_console_init();\n+\n+\ti2c_early_init();\n+\tret = read_product_name(i2c_buf, I2C_BUF_SIZE);\n+\tif (ret)\n+\t\tlog_info(\"Fail to detect board:%d\\n\", ret);\n+\telse\n+\t\tlog_info(\"Get board name:%s\\n\", (char *)i2c_buf);\n }\n \n u32 spl_boot_device(void)\n {\n-\treturn BOOT_DEVICE_NONE;\n+\treturn BOOT_DEVICE_NOR;\n+}\n+\n+void pmic_init(void)\n+{\n+\tstruct udevice *pmic_dev = NULL;\n+\tint ret;\n+\n+\tret = uclass_get_device(UCLASS_PMIC, 0, &pmic_dev);\n+\tif (ret)\n+\t\tpanic(\"Fail to detect PMIC:%d\\n\", ret);\n+}\n+\n+void spl_board_init(void)\n+{\n+\tpmic_init();\n }\ndiff --git a/board/spacemit/k1/tlv_codes.h b/board/spacemit/k1/tlv_codes.h\nnew file mode 100644\nindex 00000000000..e40fbdcee6d\n--- /dev/null\n+++ b/board/spacemit/k1/tlv_codes.h\n@@ -0,0 +1,22 @@\n+/* SPDX-License-Identifier: GPL-2.0+ */\n+/*\n+ * Copyright (C) 2025-2026 RISCstar Ltd.\n+ */\n+\n+#ifndef __TLV_CODES_H\n+#define __TLV_CODES_H\n+\n+#define TLV_CODE_SDK_VERSION\t\t0x40\n+#define TLV_CODE_DDR_CSNUM\t\t0x41\n+#define TLV_CODE_DDR_TYPE\t\t0x42\n+#define TLV_CODE_DDR_DATARATE\t\t0x43\n+#define TLV_CODE_DDR_TX_ODT\t\t0x44\n+\n+#define TLV_CODE_WIFI_MAC_ADDR\t\t0x60\n+#define TLV_CODE_BLUETOOTH_ADDR\t\t0x61\n+\n+#define TLV_CODE_PMIC_TYPE\t\t0x80\n+#define TLV_CODE_EEPROM_I2C_INDEX\t0x81\n+#define TLV_CODE_EEPROM_PIN_GROUP\t0x82\n+\n+#endif /* __TLV_CODES_H */\ndiff --git a/configs/spacemit_k1_defconfig b/configs/spacemit_k1_defconfig\nindex e64687e95ce..65e8143a0bd 100644\n--- a/configs/spacemit_k1_defconfig\n+++ b/configs/spacemit_k1_defconfig\n@@ -34,6 +34,7 @@ CONFIG_ENV_OVERWRITE=y\n CONFIG_PINCTRL=y\n CONFIG_PINCTRL_SINGLE=y\n CONFIG_RESET_SPACEMIT_K1=y\n+CONFIG_SPL_RESET_SPACEMIT_K1=y\n CONFIG_SYS_NS16550=y\n CONFIG_SYS_NS16550_MEM32=y\n CONFIG_DEBUG_UART=y\n@@ -52,3 +53,15 @@ CONFIG_CLK=y\n CONFIG_CLK_SPACEMIT=y\n CONFIG_SPL_CLK=y\n CONFIG_SYS_MALLOC_F_LEN=0x5000\n+CONFIG_SPL_DM_RESET=y\n+CONFIG_DM_I2C=y\n+CONFIG_SPL_I2C=y\n+CONFIG_SYS_I2C_SPACEMIT_K1=y\n+CONFIG_MISC=y\n+CONFIG_SPL_MISC=y\n+CONFIG_SPL_DRIVERS_MISC=y\n+CONFIG_I2C_EEPROM=y\n+CONFIG_SPL_I2C_EEPROM=y\n+CONFIG_CMD_TLV_EEPROM=y\n+CONFIG_SPL_CMD_TLV_EEPROM=y\n+CONFIG_LOG=y\n", "prefixes": [ "v2", "12/16" ] }