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GET /api/patches/2195162/?format=api
{ "id": 2195162, "url": "http://patchwork.ozlabs.org/api/patches/2195162/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210135206.229528-19-peter.maydell@linaro.org/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210135206.229528-19-peter.maydell@linaro.org>", "list_archive_url": null, "date": "2026-02-10T13:51:58", "name": "[PULL,18/26] hw/arm, accel/hvf, whpx: unify get_physical_address_range between WHPX and HVF", "commit_ref": null, "pull_url": null, "state": "not-applicable", "archived": false, "hash": "e52334e7c82714c421edacac6464b1f4c7856bd6", "submitter": { "id": 5111, "url": "http://patchwork.ozlabs.org/api/people/5111/?format=api", "name": "Peter Maydell", "email": "peter.maydell@linaro.org" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210135206.229528-19-peter.maydell@linaro.org/mbox/", "series": [ { "id": 491680, "url": "http://patchwork.ozlabs.org/api/series/491680/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=491680", "date": "2026-02-10T13:51:40", "name": "[PULL,01/26] target/arm/kvm: add constants for new PSCI versions", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/491680/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195162/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195162/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=linaro.org header.i=@linaro.org header.a=rsa-sha256\n header.s=google header.b=hklws+M7;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f9NML4RX3z1xtV\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 11 Feb 2026 00:53:50 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1vpoAJ-0002Da-UG; Tue, 10 Feb 2026 08:52:31 -0500", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1vpoAF-00029S-00\n for qemu-devel@nongnu.org; Tue, 10 Feb 2026 08:52:27 -0500", "from mail-wm1-x333.google.com ([2a00:1450:4864:20::333])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_128_GCM_SHA256:128)\n (Exim 4.90_1) (envelope-from <peter.maydell@linaro.org>)\n id 1vpoAC-0006MH-FV\n for qemu-devel@nongnu.org; Tue, 10 Feb 2026 08:52:26 -0500", "by mail-wm1-x333.google.com with SMTP id\n 5b1f17b1804b1-48327b8350dso35013015e9.1\n for <qemu-devel@nongnu.org>; Tue, 10 Feb 2026 05:52:24 -0800 (PST)", "from lanath.. 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"References": "<20260210135206.229528-1-peter.maydell@linaro.org>", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=UTF-8", "Content-Transfer-Encoding": "8bit", "Received-SPF": "pass client-ip=2a00:1450:4864:20::333;\n envelope-from=peter.maydell@linaro.org; helo=mail-wm1-x333.google.com", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_DNSWL_NONE=-0.0001, SPF_HELO_NONE=0.001,\n SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "From: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nSigned-off-by: Mohamed Mediouni <mohamed@unpredictable.fr>\n\nReviewed-by: Pierrick Bouvier <pierrick.bouvier@linaro.org>\nReviewed-by: Philippe Mathieu-Daudé <philmd@linaro.org>\nSigned-off-by: Peter Maydell <peter.maydell@linaro.org>\n---\n accel/hvf/hvf-all.c | 7 +++++--\n hw/arm/virt.c | 43 +++++---------------------------------\n include/hw/core/boards.h | 4 ++--\n include/system/hvf_int.h | 4 ++++\n target/arm/hvf-stub.c | 20 ------------------\n target/arm/hvf/hvf.c | 6 +++---\n target/arm/hvf_arm.h | 3 ---\n target/arm/meson.build | 1 -\n target/arm/whpx/whpx-all.c | 5 +++--\n target/i386/hvf/hvf.c | 11 ++++++++++\n 10 files changed, 33 insertions(+), 71 deletions(-)\n delete mode 100644 target/arm/hvf-stub.c", "diff": "diff --git a/accel/hvf/hvf-all.c b/accel/hvf/hvf-all.c\nindex 0fbe27dfa2..033c677b6f 100644\n--- a/accel/hvf/hvf-all.c\n+++ b/accel/hvf/hvf-all.c\n@@ -18,6 +18,7 @@\n #include \"system/hvf_int.h\"\n #include \"hw/core/cpu.h\"\n #include \"hw/core/boards.h\"\n+#include \"target/arm/hvf_arm.h\"\n #include \"trace.h\"\n \n bool hvf_allowed;\n@@ -186,8 +187,10 @@ static int hvf_accel_init(AccelState *as, MachineState *ms)\n int pa_range = 36;\n MachineClass *mc = MACHINE_GET_CLASS(ms);\n \n- if (mc->hvf_get_physical_address_range) {\n- pa_range = mc->hvf_get_physical_address_range(ms);\n+\n+ if (mc->get_physical_address_range) {\n+ pa_range = mc->get_physical_address_range(ms,\n+ hvf_arch_get_default_ipa_bit_size(), hvf_arch_get_max_ipa_bit_size());\n if (pa_range < 0) {\n return -EINVAL;\n }\ndiff --git a/hw/arm/virt.c b/hw/arm/virt.c\nindex 77832b566e..5c31695d37 100644\n--- a/hw/arm/virt.c\n+++ b/hw/arm/virt.c\n@@ -3361,12 +3361,11 @@ static int virt_kvm_type(MachineState *ms, const char *type_str)\n return fixed_ipa ? 0 : requested_pa_size;\n }\n \n-static int virt_whpx_get_physical_address_range(MachineState *ms)\n+static int virt_get_physical_address_range(MachineState *ms,\n+ int default_ipa_size, int max_ipa_size)\n {\n VirtMachineState *vms = VIRT_MACHINE(ms);\n \n- int max_ipa_size = whpx_arm_get_ipa_bit_size();\n-\n /* We freeze the memory map to compute the highest gpa */\n virt_set_memmap(vms, max_ipa_size);\n \n@@ -3375,39 +3374,8 @@ static int virt_whpx_get_physical_address_range(MachineState *ms)\n /*\n * If we're <= the default IPA size just use the default.\n * If we're above the default but below the maximum, round up to\n- * the maximum. whpx_arm_get_max_ipa_bit_size() conveniently only\n- * returns values that are valid ARM PARange values.\n- */\n- if (requested_ipa_size <= max_ipa_size) {\n- requested_ipa_size = max_ipa_size;\n- } else {\n- error_report(\"-m and ,maxmem option values \"\n- \"require an IPA range (%d bits) larger than \"\n- \"the one supported by the host (%d bits)\",\n- requested_ipa_size, max_ipa_size);\n- return -1;\n- }\n-\n- return requested_ipa_size;\n-}\n-\n-static int virt_hvf_get_physical_address_range(MachineState *ms)\n-{\n- VirtMachineState *vms = VIRT_MACHINE(ms);\n-\n- int default_ipa_size = hvf_arm_get_default_ipa_bit_size();\n- int max_ipa_size = hvf_arm_get_max_ipa_bit_size();\n-\n- /* We freeze the memory map to compute the highest gpa */\n- virt_set_memmap(vms, max_ipa_size);\n-\n- int requested_ipa_size = 64 - clz64(vms->highest_gpa);\n-\n- /*\n- * If we're <= the default IPA size just use the default.\n- * If we're above the default but below the maximum, round up to\n- * the maximum. hvf_arm_get_max_ipa_bit_size() conveniently only\n- * returns values that are valid ARM PARange values.\n+ * the maximum. hvf/whpx_arch_get_max_ipa_bit_size() conveniently only\n+ * return values that are valid ARM PARange values.\n */\n if (requested_ipa_size <= default_ipa_size) {\n requested_ipa_size = default_ipa_size;\n@@ -3489,8 +3457,7 @@ static void virt_machine_class_init(ObjectClass *oc, const void *data)\n mc->get_valid_cpu_types = virt_get_valid_cpu_types;\n mc->get_default_cpu_node_id = virt_get_default_cpu_node_id;\n mc->kvm_type = virt_kvm_type;\n- mc->hvf_get_physical_address_range = virt_hvf_get_physical_address_range;\n- mc->whpx_get_physical_address_range = virt_whpx_get_physical_address_range;\n+ mc->get_physical_address_range = virt_get_physical_address_range;\n assert(!mc->get_hotplug_handler);\n mc->get_hotplug_handler = virt_machine_get_hotplug_handler;\n hc->pre_plug = virt_machine_device_pre_plug_cb;\ndiff --git a/include/hw/core/boards.h b/include/hw/core/boards.h\nindex 0b2aefb126..26e0879e1a 100644\n--- a/include/hw/core/boards.h\n+++ b/include/hw/core/boards.h\n@@ -277,8 +277,8 @@ struct MachineClass {\n void (*reset)(MachineState *state, ResetType type);\n void (*wakeup)(MachineState *state);\n int (*kvm_type)(MachineState *machine, const char *arg);\n- int (*hvf_get_physical_address_range)(MachineState *machine);\n- int (*whpx_get_physical_address_range)(MachineState *machine);\n+ int (*get_physical_address_range)(MachineState *machine,\n+ int default_ipa_size, int max_ipa_size);\n \n BlockInterfaceType block_default_type;\n int units_per_default_bus;\ndiff --git a/include/system/hvf_int.h b/include/system/hvf_int.h\nindex 96790b4938..2621164cb2 100644\n--- a/include/system/hvf_int.h\n+++ b/include/system/hvf_int.h\n@@ -57,6 +57,8 @@ void assert_hvf_ok_impl(hv_return_t ret, const char *file, unsigned int line,\n const char *hvf_return_string(hv_return_t ret);\n int hvf_arch_init(void);\n hv_return_t hvf_arch_vm_create(MachineState *ms, uint32_t pa_range);\n+uint32_t hvf_arch_get_default_ipa_bit_size(void);\n+uint32_t hvf_arch_get_max_ipa_bit_size(void);\n void hvf_kick_vcpu_thread(CPUState *cpu);\n \n /* Must be called by the owning thread */\n@@ -107,5 +109,7 @@ int hvf_update_guest_debug(CPUState *cpu);\n bool hvf_arch_supports_guest_debug(void);\n \n bool hvf_arch_cpu_realize(CPUState *cpu, Error **errp);\n+uint32_t hvf_arch_get_default_ipa_bit_size(void);\n+uint32_t hvf_arch_get_max_ipa_bit_size(void);\n \n #endif\ndiff --git a/target/arm/hvf-stub.c b/target/arm/hvf-stub.c\ndeleted file mode 100644\nindex ff137267a0..0000000000\n--- a/target/arm/hvf-stub.c\n+++ /dev/null\n@@ -1,20 +0,0 @@\n-/*\n- * QEMU Hypervisor.framework (HVF) stubs for ARM\n- *\n- * Copyright (c) Linaro\n- *\n- * SPDX-License-Identifier: GPL-2.0-or-later\n- */\n-\n-#include \"qemu/osdep.h\"\n-#include \"hvf_arm.h\"\n-\n-uint32_t hvf_arm_get_default_ipa_bit_size(void)\n-{\n- g_assert_not_reached();\n-}\n-\n-uint32_t hvf_arm_get_max_ipa_bit_size(void)\n-{\n- g_assert_not_reached();\n-}\ndiff --git a/target/arm/hvf/hvf.c b/target/arm/hvf/hvf.c\nindex 9ce720793d..1b19d9713e 100644\n--- a/target/arm/hvf/hvf.c\n+++ b/target/arm/hvf/hvf.c\n@@ -825,7 +825,7 @@ static uint64_t hvf_get_reg(CPUState *cpu, int rt)\n static void clamp_id_aa64mmfr0_parange_to_ipa_size(ARMISARegisters *isar)\n {\n uint32_t ipa_size = chosen_ipa_bit_size ?\n- chosen_ipa_bit_size : hvf_arm_get_max_ipa_bit_size();\n+ chosen_ipa_bit_size : hvf_arch_get_max_ipa_bit_size();\n uint64_t id_aa64mmfr0;\n \n /* Clamp down the PARange to the IPA size the kernel supports. */\n@@ -921,7 +921,7 @@ static bool hvf_arm_get_host_cpu_features(ARMHostCPUFeatures *ahcf)\n return r == HV_SUCCESS;\n }\n \n-uint32_t hvf_arm_get_default_ipa_bit_size(void)\n+uint32_t hvf_arch_get_default_ipa_bit_size(void)\n {\n uint32_t default_ipa_size;\n hv_return_t ret = hv_vm_config_get_default_ipa_size(&default_ipa_size);\n@@ -930,7 +930,7 @@ uint32_t hvf_arm_get_default_ipa_bit_size(void)\n return default_ipa_size;\n }\n \n-uint32_t hvf_arm_get_max_ipa_bit_size(void)\n+uint32_t hvf_arch_get_max_ipa_bit_size(void)\n {\n uint32_t max_ipa_size;\n hv_return_t ret = hv_vm_config_get_max_ipa_size(&max_ipa_size);\ndiff --git a/target/arm/hvf_arm.h b/target/arm/hvf_arm.h\nindex ea82f2691d..5d19d82e5d 100644\n--- a/target/arm/hvf_arm.h\n+++ b/target/arm/hvf_arm.h\n@@ -22,7 +22,4 @@ void hvf_arm_init_debug(void);\n \n void hvf_arm_set_cpu_features_from_host(ARMCPU *cpu);\n \n-uint32_t hvf_arm_get_default_ipa_bit_size(void);\n-uint32_t hvf_arm_get_max_ipa_bit_size(void);\n-\n #endif\ndiff --git a/target/arm/meson.build b/target/arm/meson.build\nindex fe396c4318..6e0e504a40 100644\n--- a/target/arm/meson.build\n+++ b/target/arm/meson.build\n@@ -41,7 +41,6 @@ arm_common_system_ss.add(files('cpu.c'))\n arm_common_system_ss.add(when: 'TARGET_AARCH64', if_false: files(\n 'cpu32-stubs.c'))\n arm_common_system_ss.add(when: 'CONFIG_KVM', if_false: files('kvm-stub.c'))\n-arm_common_system_ss.add(when: 'CONFIG_HVF', if_false: files('hvf-stub.c'))\n arm_common_system_ss.add(when: 'CONFIG_ARM_COMPATIBLE_SEMIHOSTING',\n \t\t if_true: files('common-semi-target.c'))\n arm_common_system_ss.add(files(\ndiff --git a/target/arm/whpx/whpx-all.c b/target/arm/whpx/whpx-all.c\nindex 850f6ec81f..6067918b27 100644\n--- a/target/arm/whpx/whpx-all.c\n+++ b/target/arm/whpx/whpx-all.c\n@@ -770,8 +770,9 @@ int whpx_accel_init(AccelState *as, MachineState *ms)\n goto error;\n }\n \n- if (mc->whpx_get_physical_address_range) {\n- pa_range = mc->whpx_get_physical_address_range(ms);\n+ if (mc->get_physical_address_range) {\n+ pa_range = mc->get_physical_address_range(ms,\n+ whpx_arm_get_ipa_bit_size(), whpx_arm_get_ipa_bit_size());\n if (pa_range < 0) {\n return -EINVAL;\n }\ndiff --git a/target/i386/hvf/hvf.c b/target/i386/hvf/hvf.c\nindex 7cfaee389e..ce54020f00 100644\n--- a/target/i386/hvf/hvf.c\n+++ b/target/i386/hvf/hvf.c\n@@ -228,6 +228,17 @@ int hvf_arch_init(void)\n return 0;\n }\n \n+/* 48-bit on all Intel Macs. Function currently unused. */\n+uint32_t hvf_arch_get_default_ipa_bit_size(void)\n+{\n+ g_assert_not_reached();\n+}\n+\n+uint32_t hvf_arch_get_max_ipa_bit_size(void)\n+{\n+ g_assert_not_reached();\n+}\n+\n hv_return_t hvf_arch_vm_create(MachineState *ms, uint32_t pa_range)\n {\n return hv_vm_create(HV_VM_DEFAULT);\n", "prefixes": [ "PULL", "18/26" ] }