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GET /api/patches/2195138/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
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{
    "id": 2195138,
    "url": "http://patchwork.ozlabs.org/api/patches/2195138/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210134110.1515322-8-saif.abrar@linux.vnet.ibm.com/",
    "project": {
        "id": 14,
        "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api",
        "name": "QEMU Development",
        "link_name": "qemu-devel",
        "list_id": "qemu-devel.nongnu.org",
        "list_email": "qemu-devel@nongnu.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260210134110.1515322-8-saif.abrar@linux.vnet.ibm.com>",
    "list_archive_url": null,
    "date": "2026-02-10T13:40:57",
    "name": "[v3,7/9] pnv/phb4: Set link speed and width in the DLP training control register",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "b2a075327138d9a6d50df21b9abe520ca094ad04",
    "submitter": {
        "id": 87200,
        "url": "http://patchwork.ozlabs.org/api/people/87200/?format=api",
        "name": "Saif Abrar",
        "email": "saif.abrar@linux.vnet.ibm.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210134110.1515322-8-saif.abrar@linux.vnet.ibm.com/mbox/",
    "series": [
        {
            "id": 491677,
            "url": "http://patchwork.ozlabs.org/api/series/491677/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=491677",
            "date": "2026-02-10T13:40:52",
            "name": ": pnv/phb4: Update PHB4 to the latest PHB5 spec",
            "version": 3,
            "mbox": "http://patchwork.ozlabs.org/series/491677/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2195138/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2195138/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        ],
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        "From": "Saif Abrar <saif.abrar@linux.vnet.ibm.com>",
        "To": "qemu-ppc@nongnu.org, qemu-devel@nongnu.org",
        "Cc": "clg@kaod.org, npiggin@gmail.com, fbarrat@linux.ibm.com, mst@redhat.com,\n marcel.apfelbaum@gmail.com, cohuck@redhat.com, pbonzini@redhat.com,\n thuth@redhat.com, lvivier@redhat.com, danielhb413@gmail.com,\n saif.abrar@linux.vnet.ibm.com",
        "Subject": "[PATCH v3 7/9] pnv/phb4: Set link speed and width in the DLP training\n control register",
        "Date": "Tue, 10 Feb 2026 07:40:57 -0600",
        "Message-ID": "<20260210134110.1515322-8-saif.abrar@linux.vnet.ibm.com>",
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        "References": "<20251230102156.886288-1-saif.abrar@linux.vnet.ibm.com>\n <20260210134110.1515322-1-saif.abrar@linux.vnet.ibm.com>",
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    },
    "content": "Get the current link-status from PCIE macro.\nExtract link-speed and link-width from the link-status\nand set in the DLP training control (PCIE_DLP_TCR) register.\n\nSigned-off-by: Saif Abrar <saif.abrar@linux.vnet.ibm.com>\nReviewed-by: Cédric Le Goater <clg@kaod.org>\n---\nv3: Updates for coding guidelines.\n\n\n hw/pci-host/pnv_phb4.c | 34 +++++++++++++++++++++++++++-------\n 1 file changed, 27 insertions(+), 7 deletions(-)",
    "diff": "diff --git a/hw/pci-host/pnv_phb4.c b/hw/pci-host/pnv_phb4.c\nindex ebbdaf77b3..a7a4ba46db 100644\n--- a/hw/pci-host/pnv_phb4.c\n+++ b/hw/pci-host/pnv_phb4.c\n@@ -956,10 +956,30 @@ static uint64_t pnv_phb4_reg_read(void *opaque, hwaddr off, unsigned size)\n         val |= PHB_PCIE_SCR_PLW_X16; /* RO bit */\n         break;\n \n-    /* Link training always appears trained */\n     case PHB_PCIE_DLP_TRAIN_CTL:\n-        /* TODO: Do something sensible with speed ? */\n+        /* Get the current link-status from PCIE */\n+        PCIHostState *pci = PCI_HOST_BRIDGE(phb->phb_base);\n+        PCIDevice *pdev = pci_find_device(pci->bus, 0, 0);\n+        uint32_t exp_offset = get_exp_offset(pdev);\n+        uint32_t lnkstatus = bswap32(pnv_phb4_rc_config_read(phb,\n+                                exp_offset + PCI_EXP_LNKSTA, 4));\n+\n+        /* Extract link-speed from the link-status */\n+        uint32_t v = lnkstatus & PCI_EXP_LNKSTA_CLS;\n+\n+        /* Link training always appears trained */\n         val |= PHB_PCIE_DLP_INBAND_PRESENCE | PHB_PCIE_DLP_TL_LINKACT;\n+\n+        /* Set the current link-speed at the LINK_SPEED position */\n+        val = SETFIELD(PHB_PCIE_DLP_LINK_SPEED, val, v);\n+\n+        /*\n+         * Extract link-width from the link-status,\n+         * after shifting the required bitfields.\n+         */\n+        v = (lnkstatus & PCI_EXP_LNKSTA_NLW) >> PCI_EXP_LNKSTA_NLW_SHIFT;\n+        /* Set the current link-width at the LINK_WIDTH position */\n+        val = SETFIELD(PHB_PCIE_DLP_LINK_WIDTH, val, v);\n         return val;\n \n     /*\n@@ -968,6 +988,11 @@ static uint64_t pnv_phb4_reg_read(void *opaque, hwaddr off, unsigned size)\n      * - Link active  (bit 12)\n      */\n     case PHB_PCIE_HOTPLUG_STATUS:\n+        /* Get the PCI-E capability offset from the root-port */\n+        pci = PCI_HOST_BRIDGE(phb->phb_base);\n+        pdev = pci_find_device(pci->bus, 0, 0);\n+        uint32_t exp_base = get_exp_offset(pdev);\n+\n         /*\n          * Presence-status bit hpi_present_n is active-low, with reset value 1.\n          * Start by setting this bit to 1, indicating the card is not present.\n@@ -975,11 +1000,6 @@ static uint64_t pnv_phb4_reg_read(void *opaque, hwaddr off, unsigned size)\n          */\n         val |= PHB_PCIE_HPSTAT_PRESENCE;\n \n-        /* Get the PCI-E capability offset from the root-port */\n-        PCIHostState *pci = PCI_HOST_BRIDGE(phb->phb_base);\n-        PCIDevice *pdev = pci_find_device(pci->bus, 0, 0);\n-        uint32_t exp_base = get_exp_offset(pdev);\n-\n         /*\n          * Config-read the PCI-E macro register for slot-status.\n          * Method for config-read converts to BE value.\n",
    "prefixes": [
        "v3",
        "7/9"
    ]
}