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GET /api/patches/2195108/?format=api
{ "id": 2195108, "url": "http://patchwork.ozlabs.org/api/patches/2195108/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210-hppa-c3600-v1-3-a17ec58f053f@rev.ng/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210-hppa-c3600-v1-3-a17ec58f053f@rev.ng>", "list_archive_url": null, "date": "2026-02-10T13:04:57", "name": "[3/4] hppa: Get physical address space bits from CPUHPPADef", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "54c5b5f5ab12bf24d66c202878f5cbb357488494", "submitter": { "id": 92408, "url": "http://patchwork.ozlabs.org/api/people/92408/?format=api", "name": "Anton Johansson", "email": "anjo@rev.ng" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210-hppa-c3600-v1-3-a17ec58f053f@rev.ng/mbox/", "series": [ { "id": 491671, "url": "http://patchwork.ozlabs.org/api/series/491671/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=491671", "date": "2026-02-10T13:04:55", "name": "hppa: Add simple C3600 machine with PA-8600 CPU", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/491671/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195108/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195108/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n unprotected) header.d=rev.ng header.i=@rev.ng header.a=rsa-sha256\n header.s=dkim header.b=UUa2UrPu;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f9MF450bxz1xtr\n\tfor <incoming@patchwork.ozlabs.org>; Wed, 11 Feb 2026 00:03:20 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1vpnO5-0003zP-8u; Tue, 10 Feb 2026 08:02:43 -0500", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <anjo@rev.ng>) id 1vpnNi-0003rX-2W\n for qemu-devel@nongnu.org; Tue, 10 Feb 2026 08:02:18 -0500", "from rev.ng ([94.130.142.21])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <anjo@rev.ng>) id 1vpnNf-0002rI-P7\n for qemu-devel@nongnu.org; Tue, 10 Feb 2026 08:02:17 -0500" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=rev.ng;\n s=dkim; h=Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding:\n Content-Type:MIME-Version:Subject:Date:From:Sender:Reply-To:Content-ID:\n Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc\n :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe:\n List-Post:List-Owner:List-Archive:List-Unsubscribe:List-Unsubscribe-Post:\n List-Help; bh=z3ddyhImOBiQmW8TUvq1wPXGh+L3b2sHhaH1aUXyHik=; b=UUa2UrPuCq4d7zE\n pHqMEX6AFoHVFtWQq8vgSvsBS2oFHoqOMXCV2aWwoKauVplWmwB9nPqDkIdvvVMec5cdM/JjoM+ze\n rqN+tdHn4Ncb0VdXMH/22DYUhQUnj9hGT5lHxIf+bAQIKnhBr0l8atQM2T8YbYy7OfpfDpSG5jX+q\n fU=;", "Date": "Tue, 10 Feb 2026 14:04:57 +0100", "Subject": "[PATCH 3/4] hppa: Get physical address space bits from CPUHPPADef", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260210-hppa-c3600-v1-3-a17ec58f053f@rev.ng>", "References": "<20260210-hppa-c3600-v1-0-a17ec58f053f@rev.ng>", "In-Reply-To": "<20260210-hppa-c3600-v1-0-a17ec58f053f@rev.ng>", "To": "qemu-devel@nongnu.org", "Cc": "Richard Henderson <richard.henderson@linaro.org>,\n Helge Deller <deller@gmx.de>, Anton Johansson <anjo@rev.ng>", "Received-SPF": "pass client-ip=94.130.142.21; envelope-from=anjo@rev.ng;\n helo=rev.ng", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Reply-to": "Anton Johansson <anjo@rev.ng>", "From": "Anton Johansson via qemu development <qemu-devel@nongnu.org>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "Signed-off-by: Anton Johansson <anjo@rev.ng>\n---\n target/hppa/cpu.h | 11 ++++++++---\n hw/hppa/machine.c | 4 ++--\n hw/pci-host/astro.c | 2 +-\n target/hppa/mem_helper.c | 40 ++++++++++++----------------------------\n 4 files changed, 23 insertions(+), 34 deletions(-)", "diff": "diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h\nindex 43b4882fb4..487f0f5e9e 100644\n--- a/target/hppa/cpu.h\n+++ b/target/hppa/cpu.h\n@@ -320,6 +320,11 @@ static inline const HPPACPUDef *hppa_def(CPUHPPAState *env)\n return HPPA_CPU_GET_CLASS(env_cpu(env))->def;\n }\n \n+static inline uint8_t hppa_phys_addr_bits(CPUHPPAState *env)\n+{\n+ return hppa_def(env)->phys_addr_bits;\n+}\n+\n static inline bool hppa_is_pa20(CPUHPPAState *env)\n {\n return hppa_def(env)->is_pa20;\n@@ -352,9 +357,9 @@ static inline vaddr hppa_form_gva(CPUHPPAState *env, uint64_t spc,\n return hppa_form_gva_mask(env->gva_offset_mask, spc, off);\n }\n \n-hwaddr hppa_abs_to_phys_pa1x(vaddr addr);\n-hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr);\n-hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr);\n+hwaddr hppa_abs_to_phys_pa1x(CPUHPPAState *env, vaddr addr);\n+hwaddr hppa_abs_to_phys_pa2_w0(CPUHPPAState *env, vaddr addr);\n+hwaddr hppa_abs_to_phys_pa2_w1(CPUHPPAState *env, vaddr addr);\n \n /*\n * Since PSW_{I,CB} will never need to be in tb->flags, reuse them.\ndiff --git a/hw/hppa/machine.c b/hw/hppa/machine.c\nindex 6a0487c362..8246f6bf65 100644\n--- a/hw/hppa/machine.c\n+++ b/hw/hppa/machine.c\n@@ -181,12 +181,12 @@ static uint64_t linux_kernel_virt_to_phys(void *opaque, uint64_t addr)\n \n static uint64_t translate_pa10(void *dummy, uint64_t addr)\n {\n- return hppa_abs_to_phys_pa1x(addr);\n+ return hppa_abs_to_phys_pa1x(cpu_env(first_cpu), addr);\n }\n \n static uint64_t translate_pa20(void *dummy, uint64_t addr)\n {\n- return hppa_abs_to_phys_pa2_w0(addr);\n+ return hppa_abs_to_phys_pa2_w0(cpu_env(first_cpu), addr);\n }\n \n static HPPACPU *cpu[HPPA_MAX_CPUS];\ndiff --git a/hw/pci-host/astro.c b/hw/pci-host/astro.c\nindex 00a904277c..d38f81e553 100644\n--- a/hw/pci-host/astro.c\n+++ b/hw/pci-host/astro.c\n@@ -303,7 +303,7 @@ static IOMMUTLBEntry astro_translate_iommu(IOMMUMemoryRegion *iommu,\n * language which not-coincidentally matches the PSW.W=0 mapping.\n */\n if (addr <= UINT32_MAX) {\n- entry = hppa_abs_to_phys_pa2_w0(addr);\n+ entry = hppa_abs_to_phys_pa2_w0(cpu_env(first_cpu), addr);\n } else {\n entry = addr;\n }\ndiff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c\nindex 9199d1e06a..4bd806a53f 100644\n--- a/target/hppa/mem_helper.c\n+++ b/target/hppa/mem_helper.c\n@@ -29,29 +29,12 @@\n #include \"hw/core/cpu.h\"\n #include \"trace.h\"\n \n-/*\n- * 64-bit (PA-RISC 2.0) machines are assumed to run PA-8700, and 32-bit\n- * machines 7300LC. This should give 44 and 32 bits of physical address\n- * space respectively.\n- *\n- * CPU model Physical address space bits\n- * PA-7000--7300LC 32\n- * PA-8000--8600 40\n- * PA-8700--8900 44\n- *\n- * FIXME: However, the SeaBIOS firmware that is that tested against\n- * uses 40-bit physical addresses, despite supposedly running a C3700\n- * with a PA-8700 cpu, so use 40-bits for 64-bit.\n- */\n-#define HPPA_PHYS_ADDR_SPACE_BITS_PA20 40\n-#define HPPA_PHYS_ADDR_SPACE_BITS_PA1X 32\n-\n-hwaddr hppa_abs_to_phys_pa1x(vaddr addr)\n+hwaddr hppa_abs_to_phys_pa1x(CPUHPPAState *env, vaddr addr)\n {\n- return extract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA1X);\n+ return extract64(addr, 0, hppa_phys_addr_bits(env));\n }\n \n-hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)\n+hwaddr hppa_abs_to_phys_pa2_w1(CPUHPPAState *env, vaddr addr)\n {\n /*\n * Figure H-8 \"62-bit Absolute Accesses when PSW W-bit is 1\" describes\n@@ -64,11 +47,12 @@ hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)\n * Since the supported physical address space is below 54 bits, the\n * H-8 algorithm is moot and all that is left is to truncate.\n */\n- QEMU_BUILD_BUG_ON(HPPA_PHYS_ADDR_SPACE_BITS_PA20 > 54);\n- return sextract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);\n+ const uint8_t pa = hppa_phys_addr_bits(env);\n+ g_assert(pa <= 54);\n+ return sextract64(addr, 0, pa);\n }\n \n-hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)\n+hwaddr hppa_abs_to_phys_pa2_w0(CPUHPPAState *env, vaddr addr)\n {\n /*\n * See Figure H-10, \"Absolute Accesses when PSW W-bit is 0\",\n@@ -89,7 +73,7 @@ hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)\n * is what can be seen on physical machines too.\n */\n addr = (uint32_t)addr;\n- addr |= -1ull << (HPPA_PHYS_ADDR_SPACE_BITS_PA20 - 4);\n+ addr |= -1ull << (hppa_phys_addr_bits(env) - 4);\n }\n return addr;\n }\n@@ -233,13 +217,13 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,\n if (MMU_IDX_MMU_DISABLED(mmu_idx)) {\n switch (mmu_idx) {\n case MMU_ABS_W_IDX:\n- phys = hppa_abs_to_phys_pa2_w1(addr);\n+ phys = hppa_abs_to_phys_pa2_w1(env, addr);\n break;\n case MMU_ABS_IDX:\n if (hppa_is_pa20(env)) {\n- phys = hppa_abs_to_phys_pa2_w0(addr);\n+ phys = hppa_abs_to_phys_pa2_w0(env, addr);\n } else {\n- phys = hppa_abs_to_phys_pa1x(addr);\n+ phys = hppa_abs_to_phys_pa1x(env, addr);\n }\n break;\n default:\n@@ -580,7 +564,7 @@ static void itlbt_pa20(CPUHPPAState *env, target_ulong r1,\n /* Align per the page size. */\n ent->pa &= TARGET_PAGE_MASK << mask_shift;\n /* Ignore the bits beyond physical address space. */\n- ent->pa = sextract64(ent->pa, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);\n+ ent->pa = sextract64(ent->pa, 0, hppa_phys_addr_bits(env));\n \n ent->t = extract64(r2, 61, 1);\n ent->d = extract64(r2, 60, 1);\n", "prefixes": [ "3/4" ] }