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GET /api/patches/2195019/?format=api
{ "id": 2195019, "url": "http://patchwork.ozlabs.org/api/patches/2195019/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260210113041.138430-16-john.madieu.xa@bp.renesas.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210113041.138430-16-john.madieu.xa@bp.renesas.com>", "list_archive_url": null, "date": "2026-02-10T11:30:39", "name": "[v5,15/16] arm64: dts: renesas: r9a09g047e57-smarc-som: Add PCIe reference clock", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "2a0c89a0896faa184def959e3df8ac07061e8a5b", "submitter": { "id": 89876, "url": "http://patchwork.ozlabs.org/api/people/89876/?format=api", "name": "John Madieu", "email": "john.madieu.xa@bp.renesas.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260210113041.138430-16-john.madieu.xa@bp.renesas.com/mbox/", "series": [ { "id": 491658, "url": "http://patchwork.ozlabs.org/api/series/491658/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=491658", "date": "2026-02-10T11:30:24", "name": "PCI: renesas: Add RZ/G3E PCIe controller support", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/491658/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195019/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195019/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-47082-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c04:e001:36c::12fc:5321; helo=tor.lore.kernel.org;\n envelope-from=linux-pci+bounces-47082-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=210.160.252.171", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=bp.renesas.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=bp.renesas.com" ], "Received": [ "from tor.lore.kernel.org (tor.lore.kernel.org\n [IPv6:2600:3c04:e001:36c::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f9KGN1Lrlz1xvb\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 10 Feb 2026 22:34:20 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby tor.lore.kernel.org (Postfix) with ESMTP id 2BAB43046DB8\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 10 Feb 2026 11:33:50 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6DC3D31A548;\n\tTue, 10 Feb 2026 11:33:44 +0000 (UTC)", "from relmlie5.idc.renesas.com (relmlor1.renesas.com\n [210.160.252.171])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id D0230319843;\n\tTue, 10 Feb 2026 11:33:42 +0000 (UTC)", "from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152])\n by relmlie5.idc.renesas.com with ESMTP; 10 Feb 2026 20:33:42 +0900", "from ubuntu.adwin.renesas.com (unknown [10.226.92.55])\n\tby relmlir6.idc.renesas.com (Postfix) with ESMTP id 2541F41A119E;\n\tTue, 10 Feb 2026 20:33:36 +0900 (JST)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1770723224; cv=none;\n b=eYOXTArdwI/mSJJez21wSyHgx/0GX5B7lx/y9fHZv9OtdMzAWVGFCbIEHcZ6P7cKgWTgtwtO4LgOh+2NbDUTgcyCyTF0XCO55R0Z/NIbZgvgO7lUj8r53w3Zu5gr48VF5GrL/9xgg8fhELZfixnvasYn9TT+dWhai06TNteUbAc=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1770723224; c=relaxed/simple;\n\tbh=pupGozhmS7JcGnZJmMzYO42frUbd4qs/aq/TtDiEPfU=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=ucwdfROQHVKYWaRg8F/VNKW3fnhu91UhSKMkGmUSsOK1AvFazvQAEPEql43Cz28ivszR6XdHeUX/SaMWzC7Gt3niOIOUIz05B45H0BAi56CvYcz0hoM/LJFyXj1jjznMtfh/A40rNGjBF2tPHZuqrjk6BoWEUJ2l6hyor6+9Tp8=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=bp.renesas.com;\n spf=pass smtp.mailfrom=bp.renesas.com;\n arc=none smtp.client-ip=210.160.252.171", "X-CSE-ConnectionGUID": "WizE+xq4SJ6LlnTZ1oXvJw==", "X-CSE-MsgGUID": "49kJA+EhTKS51bKof1tWKg==", "From": "John Madieu <john.madieu.xa@bp.renesas.com>", "To": "claudiu.beznea.uj@bp.renesas.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tgeert+renesas@glider.be,\n\tkrzk+dt@kernel.org", "Cc": "robh@kernel.org,\n\tbhelgaas@google.com,\n\tconor+dt@kernel.org,\n\tmagnus.damm@gmail.com,\n\tbiju.das.jz@bp.renesas.com,\n\tlinux-pci@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-clk@vger.kernel.org,\n\tjohn.madieu@gmail.com,\n\tJohn Madieu <john.madieu.xa@bp.renesas.com>", "Subject": "[PATCH v5 15/16] arm64: dts: renesas: r9a09g047e57-smarc-som: Add\n PCIe reference clock", "Date": "Tue, 10 Feb 2026 12:30:39 +0100", "Message-ID": "<20260210113041.138430-16-john.madieu.xa@bp.renesas.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260210113041.138430-1-john.madieu.xa@bp.renesas.com>", "References": "<20260210113041.138430-1-john.madieu.xa@bp.renesas.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "The RZ/G3E SMARC SoM has a fixed 100 MHz reference clock generator\nfor PCIe. Model it as a fixed-clock and assign it to the PCIe port.\n\nSigned-off-by: John Madieu <john.madieu.xa@bp.renesas.com>\n---\n\nChanges:\n\nv5: No changes\nv4: No changes\nv3: No changes\nv2: No changes\n\n arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi | 11 +++++++++++\n 1 file changed, 11 insertions(+)", "diff": "diff --git a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi\nindex eb0de21d6716..7e2345bb9918 100644\n--- a/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi\n+++ b/arch/arm64/boot/dts/renesas/rzg3e-smarc-som.dtsi\n@@ -43,6 +43,12 @@ memory@48000000 {\n \t\treg = <0x0 0x48000000 0x0 0xf8000000>;\n \t};\n \n+\tpcie_refclk: clock-pcie-ref {\n+\t\tcompatible = \"fixed-clock\";\n+\t\t#clock-cells = <0>;\n+\t\tclock-frequency = <100000000>;\n+\t};\n+\n \treg_1p8v: regulator-1p8v {\n \t\tcompatible = \"regulator-fixed\";\n \t\tregulator-name = \"fixed-1.8V\";\n@@ -168,6 +174,11 @@ phy1: ethernet-phy@7 {\n \t};\n };\n \n+&pcie_port0 {\n+\tclocks = <&pcie_refclk>;\n+\tclock-names = \"ref\";\n+};\n+\n &pinctrl {\n \teth0_pins: eth0 {\n \t\tclk {\n", "prefixes": [ "v5", "15/16" ] }