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GET /api/patches/2195018/?format=api
{ "id": 2195018, "url": "http://patchwork.ozlabs.org/api/patches/2195018/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260210113041.138430-17-john.madieu.xa@bp.renesas.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210113041.138430-17-john.madieu.xa@bp.renesas.com>", "list_archive_url": null, "date": "2026-02-10T11:30:40", "name": "[v5,16/16] arm64: dts: renesas: r9a09g047e57-smarc: Enable PCIe", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "5417de4f9e665ba748e21bc3fe9850355700305f", "submitter": { "id": 89876, "url": "http://patchwork.ozlabs.org/api/people/89876/?format=api", "name": "John Madieu", "email": "john.madieu.xa@bp.renesas.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260210113041.138430-17-john.madieu.xa@bp.renesas.com/mbox/", "series": [ { "id": 491658, "url": "http://patchwork.ozlabs.org/api/series/491658/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=491658", "date": "2026-02-10T11:30:24", "name": "PCI: renesas: Add RZ/G3E PCIe controller support", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/491658/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195018/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195018/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-47083-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c09:e001:a7::12fc:5321; helo=sto.lore.kernel.org;\n envelope-from=linux-pci+bounces-47083-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=210.160.252.172", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=bp.renesas.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=bp.renesas.com" ], "Received": [ "from sto.lore.kernel.org (sto.lore.kernel.org\n [IPv6:2600:3c09:e001:a7::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f9KG259SSz1xvb\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 10 Feb 2026 22:34:02 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sto.lore.kernel.org (Postfix) with ESMTP id DA5EC30175E6\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 10 Feb 2026 11:33:51 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 058D9318BAF;\n\tTue, 10 Feb 2026 11:33:51 +0000 (UTC)", "from relmlie6.idc.renesas.com (relmlor2.renesas.com\n [210.160.252.172])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 6A98D3195E8;\n\tTue, 10 Feb 2026 11:33:49 +0000 (UTC)", "from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152])\n by relmlie6.idc.renesas.com with ESMTP; 10 Feb 2026 20:33:48 +0900", "from ubuntu.adwin.renesas.com (unknown [10.226.92.55])\n\tby relmlir6.idc.renesas.com (Postfix) with ESMTP id 3A21B41A1194;\n\tTue, 10 Feb 2026 20:33:42 +0900 (JST)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1770723230; cv=none;\n b=LvztijHuJn1WtG7zWguGIGekt20bnc3mbkwwHK2cB2kbIi+ieXF1ZKVWOG+GzhC+rkxW1T4g/n+NJPGKWhQ3jV3VUTgy89uKaThmvq1sgwYV+RhfoHU3YrH9BzD1bM02naJLXAqWu/RjYhr9Iq320RUgPevjaETb8YfFxo0XFps=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1770723230; c=relaxed/simple;\n\tbh=0Pijy3AjfWRHwoPek5fAaMA6Yb3XEFz4lYFFEuXYVyE=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=E6pNd5Q0EqpWu1KLuvn5TnecM54jkC9aH0e2qrOYgObSpaKXcepOMtNySDqfLrrs+Wadq8/YZOAeAM4cli9qXmRJnwEYWerhDWonn9JcgoByMZvWSfnmE2CYVTiIQME5pBZEnOTsc5/7LCNsKG0hmb50gJaWO/c7v8pz2yltPLA=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=bp.renesas.com;\n spf=pass smtp.mailfrom=bp.renesas.com;\n arc=none smtp.client-ip=210.160.252.172", "X-CSE-ConnectionGUID": "TnT81CrjTqe2JXurf0KbhA==", "X-CSE-MsgGUID": "PJFd/ITYRnmINUs+3u+78A==", "From": "John Madieu <john.madieu.xa@bp.renesas.com>", "To": "claudiu.beznea.uj@bp.renesas.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tgeert+renesas@glider.be,\n\tkrzk+dt@kernel.org", "Cc": "robh@kernel.org,\n\tbhelgaas@google.com,\n\tconor+dt@kernel.org,\n\tmagnus.damm@gmail.com,\n\tbiju.das.jz@bp.renesas.com,\n\tlinux-pci@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-clk@vger.kernel.org,\n\tjohn.madieu@gmail.com,\n\tJohn Madieu <john.madieu.xa@bp.renesas.com>", "Subject": "[PATCH v5 16/16] arm64: dts: renesas: r9a09g047e57-smarc: Enable PCIe", "Date": "Tue, 10 Feb 2026 12:30:40 +0100", "Message-ID": "<20260210113041.138430-17-john.madieu.xa@bp.renesas.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260210113041.138430-1-john.madieu.xa@bp.renesas.com>", "References": "<20260210113041.138430-1-john.madieu.xa@bp.renesas.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "The RZ Smarc Crarrier-II board has PCIe slots mounted on it.\nEnable PCIe support.\n\nSigned-off-by: John Madieu <john.madieu.xa@bp.renesas.com>\n---\n\nChanges:\n\nv5: No changes\nv4: No changes\n\nv3:\n - Splitted enablement into common carrier dtsi and board dts\n\nv2:\n - Removed board-specific dma-ranges.\n - Merged enablement and pinmux assignment in same file\n\n .../boot/dts/renesas/r9a09g047e57-smarc.dts | 16 ++++++++++++++++\n arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi | 4 ++++\n 2 files changed, 20 insertions(+)", "diff": "diff --git a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts\nindex 696903dc7a63..1ba50512f4ef 100644\n--- a/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts\n+++ b/arch/arm64/boot/dts/renesas/r9a09g047e57-smarc.dts\n@@ -122,6 +122,11 @@ key-sleep {\n #endif\n };\n \n+&pcie {\n+\tpinctrl-0 = <&pcie_pins>;\n+\tpinctrl-names = \"default\";\n+};\n+\n &pinctrl {\n \tcanfd_pins: canfd {\n \t\tcan1_pins: can1 {\n@@ -167,6 +172,17 @@ rsci9_pins: rsci9 {\n \t\tbias-pull-up;\n \t};\n \n+\tpcie-clkreq-n {\n+\t\tgpio-hog;\n+\t\tgpios = <RZG3E_GPIO(4, 5) GPIO_ACTIVE_HIGH>;\n+\t\toutput-low;\n+\t\tline-name = \"pcie_clkreq_n\";\n+\t};\n+\n+\tpcie_pins: pcie {\n+\t\tpinmux = <RZG3E_PORT_PINMUX(G, 7, 1)>; /* PCIE_RST_OUT# */\n+\t};\n+\n \tscif_pins: scif {\n \t\tpins = \"SCIF_TXD\", \"SCIF_RXD\";\n \t\trenesas,output-impedance = <1>;\ndiff --git a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi\nindex b607b5d6c259..e2a34577a1a1 100644\n--- a/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi\n+++ b/arch/arm64/boot/dts/renesas/renesas-smarc2.dtsi\n@@ -96,6 +96,10 @@ &i2c0 {\n \tclock-frequency = <400000>;\n };\n \n+&pcie {\n+\tstatus = \"okay\";\n+};\n+\n &scif0 {\n \tstatus = \"okay\";\n };\n", "prefixes": [ "v5", "16/16" ] }