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GET /api/patches/2195006/?format=api
{ "id": 2195006, "url": "http://patchwork.ozlabs.org/api/patches/2195006/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260210113041.138430-7-john.madieu.xa@bp.renesas.com/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210113041.138430-7-john.madieu.xa@bp.renesas.com>", "list_archive_url": null, "date": "2026-02-10T11:30:30", "name": "[v5,06/16] dt-bindings: PCI: renesas,r9a08g045s33-pcie: Document RZ/G3E SoC", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "313156e6fcda4aec9980d4bbc02cbefdcbffcd29", "submitter": { "id": 89876, "url": "http://patchwork.ozlabs.org/api/people/89876/?format=api", "name": "John Madieu", "email": "john.madieu.xa@bp.renesas.com" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260210113041.138430-7-john.madieu.xa@bp.renesas.com/mbox/", "series": [ { "id": 491658, "url": "http://patchwork.ozlabs.org/api/series/491658/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=491658", "date": "2026-02-10T11:30:24", "name": "PCI: renesas: Add RZ/G3E PCIe controller support", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/491658/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2195006/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2195006/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-47073-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c15:e001:75::12fc:5321; helo=sin.lore.kernel.org;\n envelope-from=linux-pci+bounces-47073-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)", "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=210.160.252.172", "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=bp.renesas.com", "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=bp.renesas.com" ], "Received": [ "from sin.lore.kernel.org (sin.lore.kernel.org\n [IPv6:2600:3c15:e001:75::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519 server-signature ECDSA (secp384r1) server-digest SHA384)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f9KDk1dprz1xvb\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 10 Feb 2026 22:32:54 +1100 (AEDT)", "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sin.lore.kernel.org (Postfix) with ESMTP id D3BDE300D4CF\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 10 Feb 2026 11:32:49 +0000 (UTC)", "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 35F1B318B9F;\n\tTue, 10 Feb 2026 11:32:49 +0000 (UTC)", "from relmlie6.idc.renesas.com (relmlor2.renesas.com\n [210.160.252.172])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 160F6315D32;\n\tTue, 10 Feb 2026 11:32:46 +0000 (UTC)", "from unknown (HELO relmlir6.idc.renesas.com) ([10.200.68.152])\n by relmlie6.idc.renesas.com with ESMTP; 10 Feb 2026 20:32:46 +0900", "from ubuntu.adwin.renesas.com (unknown [10.226.92.55])\n\tby relmlir6.idc.renesas.com (Postfix) with ESMTP id 3151941A118C;\n\tTue, 10 Feb 2026 20:32:40 +0900 (JST)" ], "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1770723169; cv=none;\n b=WHZ+3F8CmPWItY1NtG4ahT5lY1pC7w/yYbz7qSwJIqz7x+w5sAjXnGxH5V/QIjpyTXWXrxzck12W6UQDi9C/654BQpwYGc9Fj10UxbKDgQw4hBxcZpRuJAdoaNwn7CDyWs2GKg8rEmpNGzMF2eBXVXU9X83Tzi/YT1MkRgzHSoc=", "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1770723169; c=relaxed/simple;\n\tbh=i+yzWuLKiludikn1zzS7QWumYEFDvjyZecvJx/dS9mE=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=FdVxzjYbYbz+/R8YeMH9xPTMJPsaqHAoS2hUMRZKG5+FfRmkhFsg2btYmgsJRFxKFv59uB1eAJZ+VyVDdoPFvEjsGQSa/RrBqSe/DjjnF1+DKYhupXQ+VyC6eBG1VZPVID/cTcH0/WWmUwiVhVuWA8HdhVXgruHXgM4irVyngvU=", "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=bp.renesas.com;\n spf=pass smtp.mailfrom=bp.renesas.com;\n arc=none smtp.client-ip=210.160.252.172", "X-CSE-ConnectionGUID": "/jbpoBYGQkWYtDa+/Rn31w==", "X-CSE-MsgGUID": "SM0t7LIQQQO+hGPHdl9XVw==", "From": "John Madieu <john.madieu.xa@bp.renesas.com>", "To": "claudiu.beznea.uj@bp.renesas.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\tmani@kernel.org,\n\tgeert+renesas@glider.be,\n\tkrzk+dt@kernel.org", "Cc": "robh@kernel.org,\n\tbhelgaas@google.com,\n\tconor+dt@kernel.org,\n\tmagnus.damm@gmail.com,\n\tbiju.das.jz@bp.renesas.com,\n\tlinux-pci@vger.kernel.org,\n\tlinux-renesas-soc@vger.kernel.org,\n\tdevicetree@vger.kernel.org,\n\tlinux-clk@vger.kernel.org,\n\tjohn.madieu@gmail.com,\n\tJohn Madieu <john.madieu.xa@bp.renesas.com>", "Subject": "[PATCH v5 06/16] dt-bindings: PCI: renesas,r9a08g045s33-pcie:\n Document RZ/G3E SoC", "Date": "Tue, 10 Feb 2026 12:30:30 +0100", "Message-ID": "<20260210113041.138430-7-john.madieu.xa@bp.renesas.com>", "X-Mailer": "git-send-email 2.43.0", "In-Reply-To": "<20260210113041.138430-1-john.madieu.xa@bp.renesas.com>", "References": "<20260210113041.138430-1-john.madieu.xa@bp.renesas.com>", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "Content-Transfer-Encoding": "8bit" }, "content": "Extend the existing device tree bindings for Renesas RZ/G3S PCIe\ncontroller to include support for the RZ/G3E (renesas,r9a09g047e57-pcie) PCIe\ncontroller. The RZ/G3E PCIe controller is similar to RZ/G3S but has some key\ndifferences:\n\n - Uses a different device ID\n - Supports PCIe Gen3 (8.0 GT/s) link speeds\n - Uses a different clock naming (clkpmu vs clkl1pm)\n - Has a different set of interrupts, interrupt ordering, and reset signals\n\nAdd device tree bindings for renesas,r9a09g047e57-pcie compatible IPs.\n\nReviewed-by: Rob Herring (Arm) <robh@kernel.org>\nSigned-off-by: John Madieu <john.madieu.xa@bp.renesas.com>\n---\n\nChanges:\n\nv5: Collected Rb tag from Rob\nv4: Fixed clock name constraint using enum\n\nv3:\n - Moved interrupt/clock description in distinct PATCH\n - Fixed clock name constraints\n - Updated clock descriptions\n\nv2: Reuse G3S names\n\n .../bindings/pci/renesas,r9a08g045-pcie.yaml | 73 +++++++++++++++++--\n 1 file changed, 67 insertions(+), 6 deletions(-)", "diff": "diff --git a/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml\nindex d1eb92995e2c..a67108c48feb 100644\n--- a/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml\n+++ b/Documentation/devicetree/bindings/pci/renesas,r9a08g045-pcie.yaml\n@@ -10,17 +10,21 @@ maintainers:\n - Claudiu Beznea <claudiu.beznea.uj@bp.renesas.com>\n \n description:\n- Renesas RZ/G3S PCIe host controller complies with PCIe Base Specification\n- 4.0 and supports up to 5 GT/s (Gen2).\n+ Renesas RZ/G3{E,S} PCIe host controllers comply with PCIe\n+ Base Specification 4.0 and support up to 5 GT/s (Gen2) for RZ/G3S and\n+ up to 8 GT/s (Gen3) for RZ/G3E.\n \n properties:\n compatible:\n- const: renesas,r9a08g045-pcie # RZ/G3S\n+ enum:\n+ - renesas,r9a08g045-pcie # RZ/G3S\n+ - renesas,r9a09g047-pcie # RZ/G3E\n \n reg:\n maxItems: 1\n \n interrupts:\n+ minItems: 16\n items:\n - description: System error interrupt\n - description: System error on correctable error interrupt\n@@ -38,8 +42,16 @@ properties:\n - description: PCIe event interrupt\n - description: Message interrupt\n - description: All interrupts\n+ - description: Link equalization request interrupt\n+ - description: Turn off event interrupt\n+ - description: PMU power off interrupt\n+ - description: D3 event function 0 interrupt\n+ - description: D3 event function 1 interrupt\n+ - description: Configuration PMCSR write clear function 0 interrupt\n+ - description: Configuration PMCSR write clear function 1 interrupt\n \n interrupt-names:\n+ minItems: 16\n items:\n - const: serr\n - const: serr_cor\n@@ -57,20 +69,28 @@ properties:\n - const: pcie_evt\n - const: msg\n - const: all\n+ - const: link_equalization_request\n+ - const: turn_off_event\n+ - const: pmu_poweroff\n+ - const: d3_event_f0\n+ - const: d3_event_f1\n+ - const: cfg_pmcsr_writeclear_f0\n+ - const: cfg_pmcsr_writeclear_f1\n \n interrupt-controller: true\n \n clocks:\n items:\n - description: System clock\n- - description: PM control clock\n+ - description: PM control clock or clock for L1 substate handling\n \n clock-names:\n items:\n - const: aclk\n- - const: pm\n+ - enum: [pm, pmu]\n \n resets:\n+ minItems: 1\n items:\n - description: AXI2PCIe Bridge reset\n - description: Data link layer/transaction layer reset\n@@ -81,6 +101,7 @@ properties:\n - description: Configuration register reset\n \n reset-names:\n+ minItems: 1\n items:\n - const: aresetn\n - const: rst_b\n@@ -128,7 +149,9 @@ patternProperties:\n const: 0x1912\n \n device-id:\n- const: 0x0033\n+ enum:\n+ - 0x0033\n+ - 0x0039\n \n clocks:\n items:\n@@ -167,6 +190,44 @@ required:\n \n allOf:\n - $ref: /schemas/pci/pci-host-bridge.yaml#\n+ - if:\n+ properties:\n+ compatible:\n+ contains:\n+ const: renesas,r9a08g045-pcie\n+ then:\n+ properties:\n+ interrupts:\n+ maxItems: 16\n+ interrupt-names:\n+ maxItems: 16\n+ clock-names:\n+ items:\n+ - const: aclk\n+ - const: pm\n+ resets:\n+ minItems: 7\n+ reset-names:\n+ minItems: 7\n+ - if:\n+ properties:\n+ compatible:\n+ contains:\n+ const: renesas,r9a09g047-pcie\n+ then:\n+ properties:\n+ interrupts:\n+ minItems: 23\n+ interrupt-names:\n+ minItems: 23\n+ clock-names:\n+ items:\n+ - const: aclk\n+ - const: pmu\n+ resets:\n+ maxItems: 1\n+ reset-names:\n+ maxItems: 1\n \n unevaluatedProperties: false\n \n", "prefixes": [ "v5", "06/16" ] }