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GET /api/patches/2194994/?format=api
{ "id": 2194994, "url": "http://patchwork.ozlabs.org/api/patches/2194994/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210-phys_addr-v4-2-725a589e83c8@rev.ng/", "project": { "id": 14, "url": "http://patchwork.ozlabs.org/api/projects/14/?format=api", "name": "QEMU Development", "link_name": "qemu-devel", "list_id": "qemu-devel.nongnu.org", "list_email": "qemu-devel@nongnu.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210-phys_addr-v4-2-725a589e83c8@rev.ng>", "list_archive_url": null, "date": "2026-02-10T11:33:13", "name": "[v4,2/8] target/hppa: Define PA[20|1X] physical address space size", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "471665cb99b29d3b6aa58ead7cbd99f0c460bd34", "submitter": { "id": 92408, "url": "http://patchwork.ozlabs.org/api/people/92408/?format=api", "name": "Anton Johansson", "email": "anjo@rev.ng" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/qemu-devel/patch/20260210-phys_addr-v4-2-725a589e83c8@rev.ng/mbox/", "series": [ { "id": 491656, "url": "http://patchwork.ozlabs.org/api/series/491656/?format=api", "web_url": "http://patchwork.ozlabs.org/project/qemu-devel/list/?series=491656", "date": "2026-02-10T11:33:12", "name": "single-binary: Drop TARGET_PHYS_ADDR_SPACE_BITS", "version": 4, "mbox": "http://patchwork.ozlabs.org/series/491656/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2194994/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2194994/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org>", "X-Original-To": "incoming@patchwork.ozlabs.org", "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=fail reason=\"signature verification failed\" (1024-bit key;\n unprotected) header.d=rev.ng header.i=@rev.ng header.a=rsa-sha256\n header.s=dkim header.b=a1E+kMWj;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=nongnu.org\n (client-ip=209.51.188.17; helo=lists.gnu.org;\n envelope-from=qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org;\n receiver=patchwork.ozlabs.org)" ], "Received": [ "from lists.gnu.org (lists.gnu.org [209.51.188.17])\n\t(using TLSv1.2 with cipher ECDHE-ECDSA-AES256-GCM-SHA384 (256/256 bits))\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f9KBN2Zwyz1xvb\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 10 Feb 2026 22:30:52 +1100 (AEDT)", "from localhost ([::1] helo=lists1p.gnu.org)\n\tby lists.gnu.org with esmtp (Exim 4.90_1)\n\t(envelope-from <qemu-devel-bounces@nongnu.org>)\n\tid 1vplwk-0005KA-I9; Tue, 10 Feb 2026 06:30:22 -0500", "from eggs.gnu.org ([2001:470:142:3::10])\n by lists.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <anjo@rev.ng>) id 1vplwi-0005Hu-9n\n for qemu-devel@nongnu.org; Tue, 10 Feb 2026 06:30:20 -0500", "from rev.ng ([94.130.142.21])\n by eggs.gnu.org with esmtps (TLS1.2:ECDHE_RSA_AES_256_GCM_SHA384:256)\n (Exim 4.90_1) (envelope-from <anjo@rev.ng>) id 1vplwg-0008IJ-C7\n for qemu-devel@nongnu.org; Tue, 10 Feb 2026 06:30:19 -0500" ], "DKIM-Signature": "v=1; a=rsa-sha256; q=dns/txt; c=relaxed/relaxed; d=rev.ng;\n s=dkim; h=Cc:To:In-Reply-To:References:Message-Id:Content-Transfer-Encoding:\n Content-Type:MIME-Version:Subject:Date:From:Sender:Reply-To:Content-ID:\n Content-Description:Resent-Date:Resent-From:Resent-Sender:Resent-To:Resent-Cc\n :Resent-Message-ID:List-Id:List-Help:List-Unsubscribe:List-Subscribe:\n List-Post:List-Owner:List-Archive:List-Unsubscribe:List-Unsubscribe-Post:\n List-Help; bh=PbZj+MJ7ZvB1UDK3MKfN9VG/9j0a+ZXm8vyyR4l7ieE=; b=a1E+kMWjrTLs1pY\n GSgpMZ+ScVT+bP64qmH5g1NDmVGELGCxBkLXnPHs1McW068+T5aY0e6e1Jso/h+CdBmHf11kNSflb\n EkjFeTkZWCbs5ceYeOPq8BtvNSRSvRlyo7Mrp2BAYEDNxQDjWjmcVKkGmhIHz8w1PuFOaxJHHvQIs\n gU=;", "Date": "Tue, 10 Feb 2026 12:33:13 +0100", "Subject": "[PATCH v4 2/8] target/hppa: Define PA[20|1X] physical address\n space size", "MIME-Version": "1.0", "Content-Type": "text/plain; charset=\"utf-8\"", "Content-Transfer-Encoding": "7bit", "Message-Id": "<20260210-phys_addr-v4-2-725a589e83c8@rev.ng>", "References": "<20260210-phys_addr-v4-0-725a589e83c8@rev.ng>", "In-Reply-To": "<20260210-phys_addr-v4-0-725a589e83c8@rev.ng>", "To": "qemu-devel@nongnu.org", "Cc": "=?utf-8?q?Philippe_Mathieu-Daud=C3=A9?= <philmd@linaro.org>,\n Richard Henderson <richard.henderson@linaro.org>,\n Anton Johansson <anjo@rev.ng>, palmer@dabbelt.com, alistair.francis@wdc.com,\n pbonzini@redhat.com, gaosong@loongson.cn, maobibo@loongson.cn,\n deller@gmx.de", "Received-SPF": "pass client-ip=94.130.142.21; envelope-from=anjo@rev.ng;\n helo=rev.ng", "X-Spam_score_int": "-20", "X-Spam_score": "-2.1", "X-Spam_bar": "--", "X-Spam_report": "(-2.1 / 5.0 requ) BAYES_00=-1.9, DKIM_SIGNED=0.1,\n DKIM_VALID=-0.1, DKIM_VALID_AU=-0.1, DKIM_VALID_EF=-0.1,\n RCVD_IN_VALIDITY_RPBL_BLOCKED=0.001, RCVD_IN_VALIDITY_SAFE_BLOCKED=0.001,\n SPF_HELO_PASS=-0.001, SPF_PASS=-0.001 autolearn=ham autolearn_force=no", "X-Spam_action": "no action", "X-BeenThere": "qemu-devel@nongnu.org", "X-Mailman-Version": "2.1.29", "Precedence": "list", "List-Id": "qemu development <qemu-devel.nongnu.org>", "List-Unsubscribe": "<https://lists.nongnu.org/mailman/options/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=unsubscribe>", "List-Archive": "<https://lists.nongnu.org/archive/html/qemu-devel>", "List-Post": "<mailto:qemu-devel@nongnu.org>", "List-Help": "<mailto:qemu-devel-request@nongnu.org?subject=help>", "List-Subscribe": "<https://lists.nongnu.org/mailman/listinfo/qemu-devel>,\n <mailto:qemu-devel-request@nongnu.org?subject=subscribe>", "Reply-to": "Anton Johansson <anjo@rev.ng>", "From": "Anton Johansson via qemu development <qemu-devel@nongnu.org>", "Errors-To": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org", "Sender": "qemu-devel-bounces+incoming=patchwork.ozlabs.org@nongnu.org" }, "content": "When converting virtual to physical addresses,\nTARGET_PHYS_ADDR_SPACE_BITS is used under PA-RISC 2.0, and an explicit\ncast to uint32_t is used under PA-RISC 1.X. Replace the former with a\nmore specific macro limited to mem_helper.c, and make the latter\nconversion explicit by defining the size of the physical address space\nfor PA-RISC 1.X.\n\nNote: while 44 bits should be used for the 64-bit address space running\na C3700, 40 bits is still chosen as this is expected by the SeaBIOS\nfunctional test.\n\nReviewed-by: Richard Henderson <richard.henderson@linaro.org>\nSigned-off-by: Anton Johansson <anjo@rev.ng>\n---\n target/hppa/cpu.h | 1 +\n target/hppa/mem_helper.c | 32 +++++++++++++++++++++++++++-----\n 2 files changed, 28 insertions(+), 5 deletions(-)", "diff": "diff --git a/target/hppa/cpu.h b/target/hppa/cpu.h\nindex 012e54f8f6..092e647ccf 100644\n--- a/target/hppa/cpu.h\n+++ b/target/hppa/cpu.h\n@@ -336,6 +336,7 @@ static inline vaddr hppa_form_gva(CPUHPPAState *env, uint64_t spc,\n return hppa_form_gva_mask(env->gva_offset_mask, spc, off);\n }\n \n+hwaddr hppa_abs_to_phys_pa1x(vaddr addr);\n hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr);\n hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr);\n \ndiff --git a/target/hppa/mem_helper.c b/target/hppa/mem_helper.c\nindex cce82e6599..9199d1e06a 100644\n--- a/target/hppa/mem_helper.c\n+++ b/target/hppa/mem_helper.c\n@@ -29,6 +29,28 @@\n #include \"hw/core/cpu.h\"\n #include \"trace.h\"\n \n+/*\n+ * 64-bit (PA-RISC 2.0) machines are assumed to run PA-8700, and 32-bit\n+ * machines 7300LC. This should give 44 and 32 bits of physical address\n+ * space respectively.\n+ *\n+ * CPU model Physical address space bits\n+ * PA-7000--7300LC 32\n+ * PA-8000--8600 40\n+ * PA-8700--8900 44\n+ *\n+ * FIXME: However, the SeaBIOS firmware that is that tested against\n+ * uses 40-bit physical addresses, despite supposedly running a C3700\n+ * with a PA-8700 cpu, so use 40-bits for 64-bit.\n+ */\n+#define HPPA_PHYS_ADDR_SPACE_BITS_PA20 40\n+#define HPPA_PHYS_ADDR_SPACE_BITS_PA1X 32\n+\n+hwaddr hppa_abs_to_phys_pa1x(vaddr addr)\n+{\n+ return extract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA1X);\n+}\n+\n hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)\n {\n /*\n@@ -42,8 +64,8 @@ hwaddr hppa_abs_to_phys_pa2_w1(vaddr addr)\n * Since the supported physical address space is below 54 bits, the\n * H-8 algorithm is moot and all that is left is to truncate.\n */\n- QEMU_BUILD_BUG_ON(TARGET_PHYS_ADDR_SPACE_BITS > 54);\n- return sextract64(addr, 0, TARGET_PHYS_ADDR_SPACE_BITS);\n+ QEMU_BUILD_BUG_ON(HPPA_PHYS_ADDR_SPACE_BITS_PA20 > 54);\n+ return sextract64(addr, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);\n }\n \n hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)\n@@ -67,7 +89,7 @@ hwaddr hppa_abs_to_phys_pa2_w0(vaddr addr)\n * is what can be seen on physical machines too.\n */\n addr = (uint32_t)addr;\n- addr |= -1ull << (TARGET_PHYS_ADDR_SPACE_BITS - 4);\n+ addr |= -1ull << (HPPA_PHYS_ADDR_SPACE_BITS_PA20 - 4);\n }\n return addr;\n }\n@@ -217,7 +239,7 @@ int hppa_get_physical_address(CPUHPPAState *env, vaddr addr, int mmu_idx,\n if (hppa_is_pa20(env)) {\n phys = hppa_abs_to_phys_pa2_w0(addr);\n } else {\n- phys = (uint32_t)addr;\n+ phys = hppa_abs_to_phys_pa1x(addr);\n }\n break;\n default:\n@@ -558,7 +580,7 @@ static void itlbt_pa20(CPUHPPAState *env, target_ulong r1,\n /* Align per the page size. */\n ent->pa &= TARGET_PAGE_MASK << mask_shift;\n /* Ignore the bits beyond physical address space. */\n- ent->pa = sextract64(ent->pa, 0, TARGET_PHYS_ADDR_SPACE_BITS);\n+ ent->pa = sextract64(ent->pa, 0, HPPA_PHYS_ADDR_SPACE_BITS_PA20);\n \n ent->t = extract64(r2, 61, 1);\n ent->d = extract64(r2, 60, 1);\n", "prefixes": [ "v4", "2/8" ] }