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GET /api/patches/2194978/?format=api
{ "id": 2194978, "url": "http://patchwork.ozlabs.org/api/patches/2194978/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260210104259.121729-1-ivecera@redhat.com/", "project": { "id": 46, "url": "http://patchwork.ozlabs.org/api/projects/46/?format=api", "name": "Intel Wired Ethernet development", "link_name": "intel-wired-lan", "list_id": "intel-wired-lan.osuosl.org", "list_email": "intel-wired-lan@osuosl.org", "web_url": "", "scm_url": "", "webscm_url": "", "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260210104259.121729-1-ivecera@redhat.com>", "list_archive_url": null, "date": "2026-02-10T10:42:59", "name": "[net-next] ice: dpll: fix rclk pin state get and misplaced header macros", "commit_ref": null, "pull_url": null, "state": "under-review", "archived": false, "hash": "0c99006387f17cf4cbbacb41259deb81c43e45f7", "submitter": { "id": 262, "url": "http://patchwork.ozlabs.org/api/people/262/?format=api", "name": "Ivan Vecera", "email": "ivecera@redhat.com" }, "delegate": { "id": 109701, "url": "http://patchwork.ozlabs.org/api/users/109701/?format=api", "username": "anguy11", "first_name": "Anthony", "last_name": "Nguyen", "email": "anthony.l.nguyen@intel.com" }, "mbox": "http://patchwork.ozlabs.org/project/intel-wired-lan/patch/20260210104259.121729-1-ivecera@redhat.com/mbox/", "series": [ { "id": 491648, "url": "http://patchwork.ozlabs.org/api/series/491648/?format=api", "web_url": "http://patchwork.ozlabs.org/project/intel-wired-lan/list/?series=491648", "date": "2026-02-10T10:42:59", "name": "[net-next] ice: dpll: fix rclk pin state get and misplaced header macros", "version": 1, "mbox": "http://patchwork.ozlabs.org/series/491648/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2194978/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2194978/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "<intel-wired-lan-bounces@osuosl.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Delivered-To": [ "patchwork-incoming@legolas.ozlabs.org", "intel-wired-lan@lists.osuosl.org" ], "Authentication-Results": [ "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=osuosl.org header.i=@osuosl.org header.a=rsa-sha256\n header.s=default header.b=v936oAKq;\n\tdkim-atps=neutral", "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=osuosl.org\n (client-ip=140.211.166.138; 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client-ip=170.10.133.124;\n helo=us-smtp-delivery-124.mimecast.com; envelope-from=ivecera@redhat.com;\n receiver=<UNKNOWN>", "DMARC-Filter": "OpenDMARC Filter v1.4.2 smtp1.osuosl.org 6645983D04", "X-MC-Unique": "yf8Vy9SiOuGcMdPRGTLIiw-1", "X-Mimecast-MFC-AGG-ID": "yf8Vy9SiOuGcMdPRGTLIiw_1770720192", "From": "Ivan Vecera <ivecera@redhat.com>", "To": "netdev@vger.kernel.org", "Date": "Tue, 10 Feb 2026 11:42:59 +0100", "Message-ID": "<20260210104259.121729-1-ivecera@redhat.com>", "MIME-Version": "1.0", "X-Scanned-By": "MIMEDefang 3.4.1 on 10.30.177.93", "X-Mimecast-MFC-PROC-ID": "SddLWIRW38hGh47q8jNi33CE2eykVKek_t7ZGJVHb5Q_1770720192", "X-Mimecast-Originator": "redhat.com", "Content-Transfer-Encoding": "8bit", "content-type": "text/plain; charset=\"US-ASCII\"; x-default=true", "X-Mailman-Original-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n d=redhat.com;\n s=mimecast20190719; t=1770720200;\n h=from:from:reply-to:subject:subject:date:date:message-id:message-id:\n to:to:cc:cc:mime-version:mime-version:content-type:content-type:\n content-transfer-encoding:content-transfer-encoding;\n bh=nfR/OF7oQxX+S9y8bWGeGsU+wME2509CjFgofV0CQpM=;\n b=IgWO87yrYGIczueFiezImBq3mzbzl6JySp7szJnbkvdgxRMCNbxFTOC0yq5MOpBCiXK0bs\n ULEMf1ypLgJane+4IS2pAjTBMk9NZTkVSMjka6jA0kdH/GB/xil01mM4XR80NCBkQ1qi34\n Ud+CkUqE/veMU0ZE6n8kH5CwMHe9+WA=", "X-Mailman-Original-Authentication-Results": [ "smtp1.osuosl.org;\n dmarc=pass (p=quarantine dis=none)\n header.from=redhat.com", "smtp1.osuosl.org;\n dkim=pass (1024-bit key,\n unprotected) header.d=redhat.com header.i=@redhat.com header.a=rsa-sha256\n header.s=mimecast20190719 header.b=IgWO87yr" ], "Subject": "[Intel-wired-lan] [PATCH net-next] ice: dpll: fix rclk pin state\n get and misplaced header macros", "X-BeenThere": "intel-wired-lan@osuosl.org", "X-Mailman-Version": "2.1.30", "Precedence": "list", "List-Id": "Intel Wired Ethernet Linux Kernel Driver Development\n <intel-wired-lan.osuosl.org>", "List-Unsubscribe": "<https://lists.osuosl.org/mailman/options/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=unsubscribe>", "List-Archive": "<http://lists.osuosl.org/pipermail/intel-wired-lan/>", "List-Post": "<mailto:intel-wired-lan@osuosl.org>", "List-Help": "<mailto:intel-wired-lan-request@osuosl.org?subject=help>", "List-Subscribe": "<https://lists.osuosl.org/mailman/listinfo/intel-wired-lan>,\n <mailto:intel-wired-lan-request@osuosl.org?subject=subscribe>", "Cc": "Przemek Kitszel <przemyslaw.kitszel@intel.com>,\n open list <linux-kernel@vger.kernel.org>,\n Arkadiusz Kubalewski <arkadiusz.kubalewski@intel.com>,\n Aleksandr Loktionov <aleksandr.loktionov@intel.com>,\n Andrew Lunn <andrew+netdev@lunn.ch>, Eric Dumazet <edumazet@google.com>,\n Tony Nguyen <anthony.l.nguyen@intel.com>,\n \"moderated list:INTEL ETHERNET DRIVERS\" <intel-wired-lan@lists.osuosl.org>,\n Jakub Kicinski <kuba@kernel.org>, Paolo Abeni <pabeni@redhat.com>,\n \"David S. Miller\" <davem@davemloft.net>", "Errors-To": "intel-wired-lan-bounces@osuosl.org", "Sender": "\"Intel-wired-lan\" <intel-wired-lan-bounces@osuosl.org>" }, "content": "Fix two issues introduced in commit ad1df4f2d591 (\"ice: dpll: Support\nE825-C SyncE and dynamic pin discovery\"):\n\n* The refactoring of ice_dpll_rclk_state_on_pin_get() to use\n ice_dpll_pin_get_parent_idx() omitted the base_rclk_idx adjustment\n that was correctly added in the ice_dpll_rclk_state_on_pin_set() path.\n This breaks E810 devices where base_rclk_idx is non-zero, causing\n the wrong hardware index to be used for pin state lookup and incorrect\n recovered clock state to be reported via the DPLL subsystem. E825C is\n unaffected as its base_rclk_idx is 0.\n\n* Add bounds check against ICE_DPLL_RCLK_NUM_MAX on hw_idx after the\n base_rclk_idx subtraction in both ice_dpll_rclk_state_on_pin_{get,set}()\n to prevent out-of-bounds access on the pin state array.\n\n* The CGU register definitions (ICE_CGU_R10, ICE_CGU_R11 and related field\n masks) were placed after the #endif of the _ICE_DPLL_H_ include guard,\n leaving them unprotected. Move them inside the guard.\n\nFixes: ad1df4f2d591 (\"ice: dpll: Support E825-C SyncE and dynamic pin discovery\")\nSigned-off-by: Ivan Vecera <ivecera@redhat.com>\n---\n drivers/net/ethernet/intel/ice/ice_dpll.c | 5 ++++\n drivers/net/ethernet/intel/ice/ice_dpll.h | 32 +++++++++++------------\n 2 files changed, 21 insertions(+), 16 deletions(-)", "diff": "diff --git a/drivers/net/ethernet/intel/ice/ice_dpll.c b/drivers/net/ethernet/intel/ice/ice_dpll.c\nindex baf02512d041a..73a4e28ed75fc 100644\n--- a/drivers/net/ethernet/intel/ice/ice_dpll.c\n+++ b/drivers/net/ethernet/intel/ice/ice_dpll.c\n@@ -2440,6 +2440,8 @@ ice_dpll_rclk_state_on_pin_set(const struct dpll_pin *pin, void *pin_priv,\n \tif (hw_idx < 0)\n \t\tgoto unlock;\n \thw_idx -= pf->dplls.base_rclk_idx;\n+\tif (hw_idx >= ICE_DPLL_RCLK_NUM_MAX)\n+\t\tgoto unlock;\n \n \tif ((enable && p->state[hw_idx] == DPLL_PIN_STATE_CONNECTED) ||\n \t (!enable && p->state[hw_idx] == DPLL_PIN_STATE_DISCONNECTED)) {\n@@ -2503,6 +2505,9 @@ ice_dpll_rclk_state_on_pin_get(const struct dpll_pin *pin, void *pin_priv,\n \thw_idx = ice_dpll_pin_get_parent_idx(p, parent_pin);\n \tif (hw_idx < 0)\n \t\tgoto unlock;\n+\thw_idx -= pf->dplls.base_rclk_idx;\n+\tif (hw_idx >= ICE_DPLL_RCLK_NUM_MAX)\n+\t\tgoto unlock;\n \n \tret = ice_dpll_pin_state_update(pf, p, ICE_DPLL_PIN_TYPE_RCLK_INPUT,\n \t\t\t\t\textack);\ndiff --git a/drivers/net/ethernet/intel/ice/ice_dpll.h b/drivers/net/ethernet/intel/ice/ice_dpll.h\nindex ae42cdea0ee14..8678575359b92 100644\n--- a/drivers/net/ethernet/intel/ice/ice_dpll.h\n+++ b/drivers/net/ethernet/intel/ice/ice_dpll.h\n@@ -8,6 +8,22 @@\n \n #define ICE_DPLL_RCLK_NUM_MAX\t4\n \n+#define ICE_CGU_R10\t\t\t0x28\n+#define ICE_CGU_R10_SYNCE_CLKO_SEL\tGENMASK(8, 5)\n+#define ICE_CGU_R10_SYNCE_CLKODIV_M1\tGENMASK(13, 9)\n+#define ICE_CGU_R10_SYNCE_CLKODIV_LOAD\tBIT(14)\n+#define ICE_CGU_R10_SYNCE_DCK_RST\tBIT(15)\n+#define ICE_CGU_R10_SYNCE_ETHCLKO_SEL\tGENMASK(18, 16)\n+#define ICE_CGU_R10_SYNCE_ETHDIV_M1\tGENMASK(23, 19)\n+#define ICE_CGU_R10_SYNCE_ETHDIV_LOAD\tBIT(24)\n+#define ICE_CGU_R10_SYNCE_DCK2_RST\tBIT(25)\n+#define ICE_CGU_R10_SYNCE_S_REF_CLK\tGENMASK(31, 27)\n+\n+#define ICE_CGU_R11\t\t\t0x2C\n+#define ICE_CGU_R11_SYNCE_S_BYP_CLK\tGENMASK(6, 1)\n+\n+#define ICE_CGU_BYPASS_MUX_OFFSET_E825C\t3\n+\n /**\n * enum ice_dpll_pin_sw - enumerate ice software pin indices:\n * @ICE_DPLL_PIN_SW_1_IDX: index of first SW pin\n@@ -157,19 +173,3 @@ static inline void ice_dpll_deinit(struct ice_pf *pf) { }\n #endif\n \n #endif\n-\n-#define ICE_CGU_R10\t\t\t\t0x28\n-#define ICE_CGU_R10_SYNCE_CLKO_SEL\t\tGENMASK(8, 5)\n-#define ICE_CGU_R10_SYNCE_CLKODIV_M1\t\tGENMASK(13, 9)\n-#define ICE_CGU_R10_SYNCE_CLKODIV_LOAD\t\tBIT(14)\n-#define ICE_CGU_R10_SYNCE_DCK_RST\t\tBIT(15)\n-#define ICE_CGU_R10_SYNCE_ETHCLKO_SEL\t\tGENMASK(18, 16)\n-#define ICE_CGU_R10_SYNCE_ETHDIV_M1\t\tGENMASK(23, 19)\n-#define ICE_CGU_R10_SYNCE_ETHDIV_LOAD\t\tBIT(24)\n-#define ICE_CGU_R10_SYNCE_DCK2_RST\t\tBIT(25)\n-#define ICE_CGU_R10_SYNCE_S_REF_CLK\t\tGENMASK(31, 27)\n-\n-#define ICE_CGU_R11\t\t\t\t0x2C\n-#define ICE_CGU_R11_SYNCE_S_BYP_CLK\t\tGENMASK(6, 1)\n-\n-#define ICE_CGU_BYPASS_MUX_OFFSET_E825C\t\t3\n", "prefixes": [ "net-next" ] }