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GET /api/patches/2194955/?format=api
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{
    "id": 2194955,
    "url": "http://patchwork.ozlabs.org/api/patches/2194955/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/opensbi/patch/20260210094044.72591-2-ganboing@gmail.com/",
    "project": {
        "id": 67,
        "url": "http://patchwork.ozlabs.org/api/projects/67/?format=api",
        "name": "OpenSBI development",
        "link_name": "opensbi",
        "list_id": "opensbi.lists.infradead.org",
        "list_email": "opensbi@lists.infradead.org",
        "web_url": "https://github.com/riscv/opensbi",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": "https://github.com/riscv/opensbi/commit/{}"
    },
    "msgid": "<20260210094044.72591-2-ganboing@gmail.com>",
    "list_archive_url": null,
    "date": "2026-02-10T09:40:38",
    "name": "[1/7] include: sbi: Add more mstatus and instruction encoding",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "793bf278f4b8c1bac975a83f27f6094872755ada",
    "submitter": {
        "id": 86401,
        "url": "http://patchwork.ozlabs.org/api/people/86401/?format=api",
        "name": "Bo Gan",
        "email": "ganboing@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/opensbi/patch/20260210094044.72591-2-ganboing@gmail.com/mbox/",
    "series": [
        {
            "id": 491635,
            "url": "http://patchwork.ozlabs.org/api/series/491635/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/opensbi/list/?series=491635",
            "date": "2026-02-10T09:40:41",
            "name": "Fixes for load/store misaligned and access faults",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/491635/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2194955/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2194955/checks/",
    "tags": {},
    "related": [],
    "headers": {
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        "From": "Bo Gan <ganboing@gmail.com>",
        "To": "opensbi@lists.infradead.org,\n\tdramforever@live.com,\n\tanup.patel@oss.qualcomm.com",
        "Cc": "anup@brainfault.org,\n\tcleger@rivosinc.com,\n\tsamuel.holland@sifive.com",
        "Subject": "[PATCH 1/7] include: sbi: Add more mstatus and instruction encoding",
        "Date": "Tue, 10 Feb 2026 01:40:38 -0800",
        "Message-Id": "<20260210094044.72591-2-ganboing@gmail.com>",
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        "In-Reply-To": "<20260210094044.72591-1-ganboing@gmail.com>",
        "References": "<20260210094044.72591-1-ganboing@gmail.com>",
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        "X-CRM114-Version": "20100106-BlameMichelson ( TRE 0.8.0 (BSD) ) MR-646709E3 ",
        "X-CRM114-CacheID": "sfid-20260210_014248_726318_5634CC73 ",
        "X-CRM114-Status": "UNSURE (   9.03  )",
        "X-CRM114-Notice": "Please train this message.",
        "X-Spam-Score": "-2.1 (--)",
        "X-Spam-Report": "Spam detection software,\n running on the system \"bombadil.infradead.org\",\n has NOT identified this incoming email as spam.  The original\n message has been attached to this so you can view it or label\n similar future email.  If you have any questions, see\n the administrator of that system for details.\n Content preview:  - Add MXL encoding for calculating XLEN. - Add instruction\n    encoding for c.lbu/c.sb,\n and imm encoding for multiple RVC insn. Signed-off-by:\n    Bo Gan --- include/sbi/riscv_encoding.h | 20 ++++++++++++++++++-- 1 file\n   changed, 18 insertions(+), 2 deletions(-)\n Content analysis details:   (-2.1 points, 5.0 required)\n  pts rule name              description\n ---- ----------------------\n --------------------------------------------------\n -0.0 RCVD_IN_DNSWL_NONE     RBL: Sender listed at https://www.dnswl.org/, no\n                             trust\n                             [2607:f8b0:4864:20:0:0:0:631 listed in]\n                             [list.dnswl.org]\n  0.0 SPF_HELO_NONE          SPF: HELO does not publish an SPF Record\n -0.0 SPF_PASS               SPF: sender matches SPF record\n -0.1 DKIM_VALID_AU          Message has a valid DKIM or DK signature from\n author's\n                             domain\n -0.1 DKIM_VALID             Message has at least one valid DKIM or DK\n signature\n  0.1 DKIM_SIGNED            Message has a DKIM or DK signature,\n not necessarily valid\n -0.1 DKIM_VALID_EF          Message has a valid DKIM or DK signature from\n                             envelope-from domain\n -1.9 BAYES_00               BODY: Bayes spam probability is 0 to 1%\n                             [score: 0.0000]\n  0.0 FREEMAIL_FROM          Sender email is commonly abused enduser mail\n provider\n                             [ganboing(at)gmail.com]",
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        "Errors-To": "opensbi-bounces+incoming=patchwork.ozlabs.org@lists.infradead.org"
    },
    "content": "- Add MXL encoding for calculating XLEN.\n- Add instruction encoding for c.lbu/c.sb,\n  and imm encoding for multiple RVC insn.\n\nSigned-off-by: Bo Gan <ganboing@gmail.com>\n---\n include/sbi/riscv_encoding.h | 20 ++++++++++++++++++--\n 1 file changed, 18 insertions(+), 2 deletions(-)",
    "diff": "diff --git a/include/sbi/riscv_encoding.h b/include/sbi/riscv_encoding.h\nindex b5a4ce81..8ab59abe 100644\n--- a/include/sbi/riscv_encoding.h\n+++ b/include/sbi/riscv_encoding.h\n@@ -36,8 +36,10 @@\n #define MSTATUS_SDT\t\t\t_UL(0x01000000)\n #define MSTATUS32_SD\t\t\t_UL(0x80000000)\n #if __riscv_xlen == 64\n-#define MSTATUS_UXL\t\t\t_ULL(0x0000000300000000)\n-#define MSTATUS_SXL\t\t\t_ULL(0x0000000C00000000)\n+#define MSTATUS_UXL_SHIFT\t\t32\n+#define MSTATUS_UXL\t\t\t(_ULL(3) << MSTATUS_UXL_SHIFT)\n+#define MSTATUS_SXL_SHIFT\t\t34\n+#define MSTATUS_SXL\t\t\t(_ULL(3) << MSTATUS_SXL_SHIFT)\n #define MSTATUS_SBE\t\t\t_ULL(0x0000001000000000)\n #define MSTATUS_MBE\t\t\t_ULL(0x0000002000000000)\n #define MSTATUS_GVA\t\t\t_ULL(0x0000004000000000)\n@@ -56,6 +58,9 @@\n #endif\n #define MSTATUS32_SD\t\t\t_UL(0x80000000)\n #define MSTATUS64_SD\t\t\t_ULL(0x8000000000000000)\n+#define MXL_XLEN_32\t\t\t1\n+#define MXL_XLEN_64\t\t\t2\n+#define MXL_TO_XLEN(x)\t\t\t(1U << (x + 4))\n \n #define SSTATUS_SIE\t\t\tMSTATUS_SIE\n #define SSTATUS_SPIE_SHIFT\t\tMSTATUS_SPIE_SHIFT\n@@ -939,6 +944,10 @@\n #define INSN_MATCH_C_FSWSP\t\t0xe002\n #define INSN_MASK_C_FSWSP\t\t0xe003\n \n+#define INSN_MATCH_C_LBU\t\t0x8000\n+#define INSN_MASK_C_LBU\t\t\t0xfc03\n+#define INSN_MATCH_C_SB\t\t\t0x8800\n+#define INSN_MASK_C_SB\t\t\t0xfc03\n #define INSN_MATCH_C_LHU\t\t0x8400\n #define INSN_MASK_C_LHU\t\t\t0xfc43\n #define INSN_MATCH_C_LH\t\t\t0x8440\n@@ -1368,6 +1377,9 @@\n #define SH_RS2C\t\t\t\t2\n \n #define RV_X(x, s, n)\t\t\t(((x) >> (s)) & ((1 << (n)) - 1))\n+#define RVC_LB_IMM(x)\t\t\t((RV_X(x, 6, 1) << 0) | \\\n+\t\t\t\t\t (RV_X(x, 5, 1) << 1))\n+#define RVC_LH_IMM(x)\t\t\t (RV_X(x, 5, 1) << 1)\n #define RVC_LW_IMM(x)\t\t\t((RV_X(x, 6, 1) << 2) | \\\n \t\t\t\t\t (RV_X(x, 10, 3) << 3) | \\\n \t\t\t\t\t (RV_X(x, 5, 1) << 6))\n@@ -1379,6 +1391,10 @@\n #define RVC_LDSP_IMM(x)\t\t\t((RV_X(x, 5, 2) << 3) | \\\n \t\t\t\t\t (RV_X(x, 12, 1) << 5) | \\\n \t\t\t\t\t (RV_X(x, 2, 3) << 6))\n+#define RVC_SB_IMM(x)\t\t\tRVC_LB_IMM(x)\n+#define RVC_SH_IMM(x)\t\t\tRVC_LH_IMM(x)\n+#define RVC_SW_IMM(x)\t\t\tRVC_LW_IMM(x)\n+#define RVC_SD_IMM(x)\t\t\tRVC_LD_IMM(x)\n #define RVC_SWSP_IMM(x)\t\t\t((RV_X(x, 9, 4) << 2) | \\\n \t\t\t\t\t (RV_X(x, 7, 2) << 6))\n #define RVC_SDSP_IMM(x)\t\t\t((RV_X(x, 10, 3) << 3) | \\\n",
    "prefixes": [
        "1/7"
    ]
}