get:
Show a patch.

patch:
Update a patch.

put:
Update a patch.

GET /api/patches/2194819/?format=api
HTTP 200 OK
Allow: GET, PUT, PATCH, HEAD, OPTIONS
Content-Type: application/json
Vary: Accept

{
    "id": 2194819,
    "url": "http://patchwork.ozlabs.org/api/patches/2194819/?format=api",
    "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260210021109.11906-4-mailingradian@gmail.com/",
    "project": {
        "id": 42,
        "url": "http://patchwork.ozlabs.org/api/projects/42/?format=api",
        "name": "Linux GPIO development",
        "link_name": "linux-gpio",
        "list_id": "linux-gpio.vger.kernel.org",
        "list_email": "linux-gpio@vger.kernel.org",
        "web_url": "",
        "scm_url": "",
        "webscm_url": "",
        "list_archive_url": "",
        "list_archive_url_format": "",
        "commit_url_format": ""
    },
    "msgid": "<20260210021109.11906-4-mailingradian@gmail.com>",
    "list_archive_url": null,
    "date": "2026-02-10T02:11:09",
    "name": "[3/3] arm64: dts: qcom: sdm670: add lpi pinctrl",
    "commit_ref": null,
    "pull_url": null,
    "state": "new",
    "archived": false,
    "hash": "8d6dd84850116edae6381cf83e7b452fd6f34e37",
    "submitter": {
        "id": 84825,
        "url": "http://patchwork.ozlabs.org/api/people/84825/?format=api",
        "name": "Richard Acayan",
        "email": "mailingradian@gmail.com"
    },
    "delegate": null,
    "mbox": "http://patchwork.ozlabs.org/project/linux-gpio/patch/20260210021109.11906-4-mailingradian@gmail.com/mbox/",
    "series": [
        {
            "id": 491590,
            "url": "http://patchwork.ozlabs.org/api/series/491590/?format=api",
            "web_url": "http://patchwork.ozlabs.org/project/linux-gpio/list/?series=491590",
            "date": "2026-02-10T02:11:07",
            "name": "SDM670 LPASS LPI pin controller support",
            "version": 1,
            "mbox": "http://patchwork.ozlabs.org/series/491590/mbox/"
        }
    ],
    "comments": "http://patchwork.ozlabs.org/api/patches/2194819/comments/",
    "check": "pending",
    "checks": "http://patchwork.ozlabs.org/api/patches/2194819/checks/",
    "tags": {},
    "related": [],
    "headers": {
        "Return-Path": "\n <linux-gpio+bounces-31541-incoming=patchwork.ozlabs.org@vger.kernel.org>",
        "X-Original-To": [
            "incoming@patchwork.ozlabs.org",
            "linux-gpio@vger.kernel.org"
        ],
        "Delivered-To": "patchwork-incoming@legolas.ozlabs.org",
        "Authentication-Results": [
            "legolas.ozlabs.org;\n\tdkim=pass (2048-bit key;\n unprotected) header.d=gmail.com header.i=@gmail.com header.a=rsa-sha256\n header.s=20230601 header.b=QGsNGt4y;\n\tdkim-atps=neutral",
            "legolas.ozlabs.org;\n spf=pass (sender SPF authorized) smtp.mailfrom=vger.kernel.org\n (client-ip=2600:3c0a:e001:db::12fc:5321; helo=sea.lore.kernel.org;\n envelope-from=linux-gpio+bounces-31541-incoming=patchwork.ozlabs.org@vger.kernel.org;\n receiver=patchwork.ozlabs.org)",
            "smtp.subspace.kernel.org;\n\tdkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=\"QGsNGt4y\"",
            "smtp.subspace.kernel.org;\n arc=none smtp.client-ip=209.85.222.170",
            "smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com",
            "smtp.subspace.kernel.org;\n spf=pass smtp.mailfrom=gmail.com"
        ],
        "Received": [
            "from sea.lore.kernel.org (sea.lore.kernel.org\n [IPv6:2600:3c0a:e001:db::12fc:5321])\n\t(using TLSv1.3 with cipher TLS_AES_256_GCM_SHA384 (256/256 bits)\n\t key-exchange x25519)\n\t(No client certificate requested)\n\tby legolas.ozlabs.org (Postfix) with ESMTPS id 4f94mM1QyYz1xwG\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 10 Feb 2026 13:10:59 +1100 (AEDT)",
            "from smtp.subspace.kernel.org (conduit.subspace.kernel.org\n [100.90.174.1])\n\tby sea.lore.kernel.org (Postfix) with ESMTP id A1F1F3026A89\n\tfor <incoming@patchwork.ozlabs.org>; Tue, 10 Feb 2026 02:10:51 +0000 (UTC)",
            "from localhost.localdomain (localhost.localdomain [127.0.0.1])\n\tby smtp.subspace.kernel.org (Postfix) with ESMTP id 5F1BB2D3EE5;\n\tTue, 10 Feb 2026 02:10:51 +0000 (UTC)",
            "from mail-qk1-f170.google.com (mail-qk1-f170.google.com\n [209.85.222.170])\n\t(using TLSv1.2 with cipher ECDHE-RSA-AES128-GCM-SHA256 (128/128 bits))\n\t(No client certificate requested)\n\tby smtp.subspace.kernel.org (Postfix) with ESMTPS id 015942C2ABF\n\tfor <linux-gpio@vger.kernel.org>; Tue, 10 Feb 2026 02:10:49 +0000 (UTC)",
            "by mail-qk1-f170.google.com with SMTP id\n af79cd13be357-8c6a822068eso474514485a.3\n        for <linux-gpio@vger.kernel.org>;\n Mon, 09 Feb 2026 18:10:49 -0800 (PST)",
            "from localhost\n (bras-base-toroon21-grc-75-184-144-58-243.dsl.bell.ca. [184.144.58.243])\n        by smtp.gmail.com with ESMTPSA id\n af79cd13be357-8caf7be4257sm924100685a.19.2026.02.09.18.10.48\n        (version=TLS1_3 cipher=TLS_AES_256_GCM_SHA384 bits=256/256);\n        Mon, 09 Feb 2026 18:10:48 -0800 (PST)"
        ],
        "ARC-Seal": "i=1; a=rsa-sha256; d=subspace.kernel.org; s=arc-20240116;\n\tt=1770689451; cv=none;\n b=PAoj6v0RQ3/hiAS75Vqz52A4MaX6Ufcyk03fBzpN9ak8NXvn48RahVq6uFQuEjbMKhVOH5vlidkiPNya5I20wEwm/54uDNsBGM829mf4w4VAnBPfJJIWLiseE7tLEdEckeaXMfd+twl1lM0RgyMGVU1vKDUqYXu5E4kVuk4oTFo=",
        "ARC-Message-Signature": "i=1; a=rsa-sha256; d=subspace.kernel.org;\n\ts=arc-20240116; t=1770689451; c=relaxed/simple;\n\tbh=VLMiJ30Zh4FSBl/lJzi0hCV62oZODen57vCk75vfrQc=;\n\th=From:To:Cc:Subject:Date:Message-ID:In-Reply-To:References:\n\t MIME-Version;\n b=dHPJ5aMEw9TenRz/SkFwGUS7XJH1UIVb12has59d+vkJJaaSg2hyfanE/nihFhbh4lkWDA44EmK8eugwz3/x1/ZzTLVYPgOaM8dnEZEjEyM8u4XvLbMYcW5ui4C2vVDJU3+QX70oC3e7HBiOgUg6ASz/K+LnPy+3euyzh4ILHLo=",
        "ARC-Authentication-Results": "i=1; smtp.subspace.kernel.org;\n dmarc=pass (p=none dis=none) header.from=gmail.com;\n spf=pass smtp.mailfrom=gmail.com;\n dkim=pass (2048-bit key) header.d=gmail.com header.i=@gmail.com\n header.b=QGsNGt4y; arc=none smtp.client-ip=209.85.222.170",
        "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=gmail.com; s=20230601; t=1770689449; x=1771294249;\n darn=vger.kernel.org;\n        h=content-transfer-encoding:mime-version:references:in-reply-to\n         :message-id:date:subject:cc:to:from:from:to:cc:subject:date\n         :message-id:reply-to;\n        bh=bc2eBmVrRFfTIHMv2W/jMPK1Ew70fk81SksbXNihTds=;\n        b=QGsNGt4yn1DDNlGXzdIDU8ltBTFs4SB1nHxyH/X5+XGdXZUcQlU8l+j+RfUqbVgVx9\n         Gcn+fH13TuSRxzEiXUL0/GWTc/pBZfg4L/UFl5O6i2/8fDDgmqAnN2iXGIUwLlLUwaDU\n         Lt15vKPqF/JTbkTRK+xf6aRoigs06q2e4lcLEZkb1vdYpO/mUlSpz1pmOW4vQUmdwNak\n         2QwXqPReZ1ZNgQIqk22cZ1hZXsrzsA8vYMhEqi/tOXXTp2cWMaUM6UwVL6U1L31anuS5\n         ofUG6AdeXthe0xoXhyQqK/cLJJBJ4s3xoI31Q+3CjcuZT7D7wY/dX6ksp+nBvIc4z1h1\n         YJOw==",
        "X-Google-DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed;\n        d=1e100.net; s=20230601; t=1770689449; x=1771294249;\n        h=content-transfer-encoding:mime-version:references:in-reply-to\n         :message-id:date:subject:cc:to:from:x-gm-gg:x-gm-message-state:from\n         :to:cc:subject:date:message-id:reply-to;\n        bh=bc2eBmVrRFfTIHMv2W/jMPK1Ew70fk81SksbXNihTds=;\n        b=qeOeeM18I2GnC+gj+NAHWuj5Rnna5XpH5p2eIKormH/2VqRXrBzwq4PV6Gg9/ENY3f\n         6hiivN35VDS9xL6OWwIkePt50GpEhKrfdsbPjBWVhttzck7lYkgbBY4L6jSItv7SLV5Y\n         5semPSNAn7e8MGU4T6Rv+RGTGvHVecZ1iEYVTW8u+M29K6XIMblBEjMQyNC/1FnHBIrC\n         b1mi2dBem3cVGgdAxsL34xfGRoIkM/pTbm187hhV0h1pbplujPYnRV8s4iVx3umAIsXJ\n         I/2nD4qeoJk8vRBPvK8jHQJfm6/j8AkbR1HgZFOmlu/XyObkCWqRXUKEv5KqUJOKJBsx\n         1pNQ==",
        "X-Forwarded-Encrypted": "i=1;\n AJvYcCWBkVMV0ZT3btkGUoow3qqKug/A6cLN8irR38zYcEDGfKzs0gpQ7EEc+zoeR6JfROEyjXdzx2TDTSNr@vger.kernel.org",
        "X-Gm-Message-State": "AOJu0YxOP6/zCZLH7rsyEcH/e+6Al6DBu7OVMEg/d+WtodtYs5QAdV78\n\tQMDJc/Sn3OFf8nn4kBL9XEOnkuBLgHL/qSLTcCvS+knMvYXCvz035MIM",
        "X-Gm-Gg": "AZuq6aLla1HALEIGwztRJKTC4UTfPoF4d1A31KCjCimbW6iwYDc4MLDr4GVo3eyja29\n\tmjla44wbaHZxY/DcnXh2mIpKe/zFOgvKy3yPLdPWhSKEfI+U9yzQSabl/bJN35NllGSy1Nr6p/R\n\tKTkivX7+lX9QF51SI60pJWBH+D58oNV2wGlvElkQ+1jzO4A1TYbwklVkKM+ExHUqpBezOw55BxA\n\tttGpWtCWkpTWGgfH8/9zQoVp+wm9AZgwZ817Gnwd+5ooRQnJlJaPd5bjrzxWUycU6UkSGuwSdG+\n\tFucTXodDsYT5c94cIOXl+TtFyMCISqpI5Y1lLWlws2AJI342yTVxQbELj/JAEwpZqKnxhMw4H3z\n\t6UGm35T332lc7xt6qxL9BEiJUkSaxBBXM+jeG85JAeTDEOGIMXQ5GvAjE/vWRKW6t7wsBQ+hLZW\n\tTQHypfPRgp6KwxGwsqfMXpVjspvHPQeRIMpntfVQqYc8u198WcajrJsOYtC1PKpswsGJnsffCUA\n\t4R8DAqHw/e2kfo=",
        "X-Received": "by 2002:a05:620a:1992:b0:8ca:1107:1214 with SMTP id\n af79cd13be357-8caeef2f94fmr1843871385a.7.1770689449025;\n        Mon, 09 Feb 2026 18:10:49 -0800 (PST)",
        "From": "Richard Acayan <mailingradian@gmail.com>",
        "To": "Bjorn Andersson <andersson@kernel.org>,\n\tLinus Walleij <linusw@kernel.org>,\n\tRob Herring <robh@kernel.org>,\n\tKrzysztof Kozlowski <krzk+dt@kernel.org>,\n\tConor Dooley <conor+dt@kernel.org>,\n\tKonrad Dybcio <konradybcio@kernel.org>,\n\tlinux-arm-msm@vger.kernel.org,\n\tlinux-gpio@vger.kernel.org,\n\tdevicetree@vger.kernel.org",
        "Cc": "Richard Acayan <mailingradian@gmail.com>",
        "Subject": "[PATCH 3/3] arm64: dts: qcom: sdm670: add lpi pinctrl",
        "Date": "Mon,  9 Feb 2026 21:11:09 -0500",
        "Message-ID": "<20260210021109.11906-4-mailingradian@gmail.com>",
        "X-Mailer": "git-send-email 2.53.0",
        "In-Reply-To": "<20260210021109.11906-1-mailingradian@gmail.com>",
        "References": "<20260210021109.11906-1-mailingradian@gmail.com>",
        "Precedence": "bulk",
        "X-Mailing-List": "linux-gpio@vger.kernel.org",
        "List-Id": "<linux-gpio.vger.kernel.org>",
        "List-Subscribe": "<mailto:linux-gpio+subscribe@vger.kernel.org>",
        "List-Unsubscribe": "<mailto:linux-gpio+unsubscribe@vger.kernel.org>",
        "MIME-Version": "1.0",
        "Content-Transfer-Encoding": "8bit"
    },
    "content": "The Snapdragon 670 has a separate TLMM for audio pins. Add the device\nnode for it.\n\nSigned-off-by: Richard Acayan <mailingradian@gmail.com>\n---\n arch/arm64/boot/dts/qcom/sdm670.dtsi | 74 ++++++++++++++++++++++++++++\n 1 file changed, 74 insertions(+)",
    "diff": "diff --git a/arch/arm64/boot/dts/qcom/sdm670.dtsi b/arch/arm64/boot/dts/qcom/sdm670.dtsi\nindex b8a8dcbdfbe3..0da3e22ce402 100644\n--- a/arch/arm64/boot/dts/qcom/sdm670.dtsi\n+++ b/arch/arm64/boot/dts/qcom/sdm670.dtsi\n@@ -2273,5 +2273,79 @@ cpufreq_hw: cpufreq@17d43000 {\n \n \t\t\t#freq-domain-cells = <1>;\n \t\t};\n+\n+\t\tlpi_tlmm: pinctrl@62b40000 {\n+\t\t\tcompatible = \"qcom,sdm670-lpass-lpi-pinctrl\";\n+\t\t\treg = <0 0x62b40000 0 0x20000>;\n+\t\t\tgpio-controller;\n+\t\t\t#gpio-cells = <2>;\n+\t\t\tgpio-ranges = <&lpi_tlmm 0 0 32>;\n+\t\t\tstatus = \"disabled\";\n+\n+\t\t\tcdc_pdm_default: cdc-pdm-default-state {\n+\t\t\t\tclk-pins {\n+\t\t\t\t\tpins = \"gpio18\";\n+\t\t\t\t\tfunction = \"pdm_clk\";\n+\t\t\t\t\tdrive-strength = <4>;\n+\t\t\t\t\toutput-low;\n+\t\t\t\t};\n+\n+\t\t\t\tsync-pins {\n+\t\t\t\t\tpins = \"gpio19\";\n+\t\t\t\t\tfunction = \"pdm_sync\";\n+\t\t\t\t\tdrive-strength = <4>;\n+\t\t\t\t\toutput-low;\n+\t\t\t\t};\n+\n+\t\t\t\ttx-pins {\n+\t\t\t\t\tpins = \"gpio20\";\n+\t\t\t\t\tfunction = \"pdm_tx\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t};\n+\n+\t\t\t\trx-pins {\n+\t\t\t\t\tpins = \"gpio21\", \"gpio23\", \"gpio25\";\n+\t\t\t\t\tfunction = \"pdm_rx\";\n+\t\t\t\t\tdrive-strength = <4>;\n+\t\t\t\t\toutput-low;\n+\t\t\t\t};\n+\t\t\t};\n+\n+\t\t\tcdc_comp_default: cdc-comp-default-state {\n+\t\t\t\tpins = \"gpio22\", \"gpio24\";\n+\t\t\t\tfunction = \"comp_rx\";\n+\t\t\t\tdrive-strength = <4>;\n+\t\t\t};\n+\n+\t\t\tcdc_dmic_default: cdc-dmic-default-state {\n+\t\t\t\tclk1-pins {\n+\t\t\t\t\tpins = \"gpio26\";\n+\t\t\t\t\tfunction = \"dmic1_clk\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\toutput-high;\n+\t\t\t\t};\n+\n+\t\t\t\tclk2-pins {\n+\t\t\t\t\tpins = \"gpio28\";\n+\t\t\t\t\tfunction = \"dmic2_clk\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\toutput-high;\n+\t\t\t\t};\n+\n+\t\t\t\tdata1-pins {\n+\t\t\t\t\tpins = \"gpio27\";\n+\t\t\t\t\tfunction = \"dmic1_data\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\tinput-enable;\n+\t\t\t\t};\n+\n+\t\t\t\tdata2-pins {\n+\t\t\t\t\tpins = \"gpio29\";\n+\t\t\t\t\tfunction = \"dmic2_data\";\n+\t\t\t\t\tdrive-strength = <8>;\n+\t\t\t\t\tinput-enable;\n+\t\t\t\t};\n+\t\t\t};\n+\t\t};\n \t};\n };\n",
    "prefixes": [
        "3/3"
    ]
}