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GET /api/patches/2194473/?format=api
{ "id": 2194473, "url": "http://patchwork.ozlabs.org/api/patches/2194473/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260209062952.2049053-5-den@valinux.co.jp/", "project": { "id": 28, "url": "http://patchwork.ozlabs.org/api/projects/28/?format=api", "name": "Linux PCI development", "link_name": "linux-pci", "list_id": "linux-pci.vger.kernel.org", "list_email": "linux-pci@vger.kernel.org", "web_url": null, "scm_url": null, "webscm_url": null, "list_archive_url": "", "list_archive_url_format": "", "commit_url_format": "" }, "msgid": "<20260209062952.2049053-5-den@valinux.co.jp>", "list_archive_url": null, "date": "2026-02-09T06:29:47", "name": "[v5,4/8] PCI: dwc: Record integrated eDMA register window", "commit_ref": null, "pull_url": null, "state": "new", "archived": false, "hash": "981bb241d0180d4809748f98c919e4076d16bb26", "submitter": { "id": 91573, "url": "http://patchwork.ozlabs.org/api/people/91573/?format=api", "name": "Koichiro Den", "email": "den@valinux.co.jp" }, "delegate": null, "mbox": "http://patchwork.ozlabs.org/project/linux-pci/patch/20260209062952.2049053-5-den@valinux.co.jp/mbox/", "series": [ { "id": 491464, "url": "http://patchwork.ozlabs.org/api/series/491464/?format=api", "web_url": "http://patchwork.ozlabs.org/project/linux-pci/list/?series=491464", "date": "2026-02-09T06:29:44", "name": "PCI: endpoint: pci-ep-msi: Add embedded doorbell fallback", "version": 5, "mbox": "http://patchwork.ozlabs.org/series/491464/mbox/" } ], "comments": "http://patchwork.ozlabs.org/api/patches/2194473/comments/", "check": "pending", "checks": "http://patchwork.ozlabs.org/api/patches/2194473/checks/", "tags": {}, "related": [], "headers": { "Return-Path": "\n <linux-pci+bounces-46977-incoming=patchwork.ozlabs.org@vger.kernel.org>", "X-Original-To": [ "incoming@patchwork.ozlabs.org", "linux-pci@vger.kernel.org" ], "Delivered-To": "patchwork-incoming@legolas.ozlabs.org", "Authentication-Results": [ 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dkim=pass header.d=valinux.co.jp; arc=none" ], "DKIM-Signature": "v=1; a=rsa-sha256; c=relaxed/relaxed; d=valinux.co.jp;\n s=selector1;\n h=From:Date:Subject:Message-ID:Content-Type:MIME-Version:X-MS-Exchange-SenderADCheck;\n bh=v8yWAfV8AJ5pPwl+Js3pT03l2aqXPjl9XVUFCNdR+xA=;\n b=BPcRcIRmZcA0f7b+EsGDGPJhvlqjmJpl0yCmjQo2eInJ/8SR3SXOPeC4WKhxCMhNHDa9Zk5DpqRsamrNUr7D8twodeMn9nveITdl/M/aSmYNDNOjgp/tOXZfaRSeCtBRl4ZVmjeI2VdaNpWzVpfbNeMbthhyRH+aGNoBY3ERKDg=", "From": "Koichiro Den <den@valinux.co.jp>", "To": "vkoul@kernel.org,\n\tmani@kernel.org,\n\tFrank.Li@nxp.com,\n\tcassel@kernel.org,\n\tjingoohan1@gmail.com,\n\tlpieralisi@kernel.org,\n\tkwilczynski@kernel.org,\n\trobh@kernel.org,\n\tbhelgaas@google.com,\n\tkishon@kernel.org,\n\tjdmason@kudzu.us,\n\tallenbh@gmail.com", "Cc": "dmaengine@vger.kernel.org,\n\tlinux-pci@vger.kernel.org,\n\tntb@lists.linux.dev,\n\tlinux-kselftest@vger.kernel.org,\n\tlinux-kernel@vger.kernel.org", "Subject": "[PATCH v5 4/8] PCI: dwc: Record integrated eDMA register window", "Date": "Mon, 9 Feb 2026 15:29:47 +0900", "Message-ID": "<20260209062952.2049053-5-den@valinux.co.jp>", "X-Mailer": "git-send-email 2.51.0", "In-Reply-To": "<20260209062952.2049053-1-den@valinux.co.jp>", "References": "<20260209062952.2049053-1-den@valinux.co.jp>", "Content-Transfer-Encoding": "8bit", "Content-Type": "text/plain", "X-ClientProxiedBy": "TY4PR01CA0117.jpnprd01.prod.outlook.com\n (2603:1096:405:379::18) To TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM\n (2603:1096:405:38f::10)", "Precedence": "bulk", "X-Mailing-List": "linux-pci@vger.kernel.org", "List-Id": "<linux-pci.vger.kernel.org>", "List-Subscribe": "<mailto:linux-pci+subscribe@vger.kernel.org>", "List-Unsubscribe": "<mailto:linux-pci+unsubscribe@vger.kernel.org>", "MIME-Version": "1.0", "X-MS-PublicTrafficType": "Email", "X-MS-TrafficTypeDiagnostic": "TY7P286MB7722:EE_|TYYP286MB4425:EE_", "X-MS-Office365-Filtering-Correlation-Id": "9f920666-3448-4842-956b-08de67a4a811", "X-MS-Exchange-SenderADCheck": "1", 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09DRxBnLFLyyDwsLh534ikocIbyg2PnVkjVdtpPH7T/QGNH3ngy7chrYt1+v4Rg+62POu5n4S1oMwdhcCZFbd/lwFQaf3VHcwTvFFWsHtqhGFAjDKyJ0ns83uuUvgSnTkyd5c0NhQJ92uQ8AhoxAPXUqPezNMVGy1DNgRrvlp1sw35oDh1Q1k/U5sd8Y6sj1mUHdZCKAM6KwnIdt06Mp6cPbK0BGkq+AqvPdocbq2O9OJBkMk9CB8B7fcW8wh8fdUUDXqxfFXqzwF41PEFmrQWg0wNFbn7eXYg8NKOzb6uMBrI4Tm2b3qXuQXtGaFVyxcOcSi6FxzwbsLQimvrTs5J8tRtU+y7KZxbNF3pC9oB8rumpbCvPms4tcT5sfIJ5tDmmuD6xFkwr55seMY5tWoSg5pVbs4dUpPcbhv3Q82c5NN2cnsS7elTKbP6dlzeCtMQWOi7Ho8j8LdtXEgSQl5zBnCUsOGlpGfJTTKjExdwgUmAhQN5/tRg/Y5HJCFKSQtixZWqEVihZdFd6iLDeK3/+ov199neiUWu9AETC2x8jbpvaK1lK0JuROR22m1+AiOHkvMh9qHXnxJFPzhNJDTahOH9pBtNNM12TjoqJnMIsjRINeB+UCCS1LByoMeKXuV+2WO5jZFgCLQ/gP5rS5WLxSYc/9pUUvfuBJfq6wlOZ2fE1b3bS34lnV6n5qVTP9fPQiF6CeV8PRRqT5TyvjCrMbeVbFoqW26nVlOZZLwrOP+w2u6tCgj/z8h0W7cOpq+NKXsMtjCwrccdBJAO20EebI1c0zm3u8dMl/wv5IA7uF8vHG1aCI+3BymGQ2Ll4k4ywlh9sqBQZxRC4Y5XafLNatwFlV4NJVF7hLfGwiC2+PHe7ztyxPmN3AX0UErelv6dqiLKrV40/sxskqFq7OgEfCtlDkNbitlfiMjbxTO5G+tnhzN6luTFJfj9nKy/XHQqx4sB7PIEUrfhRPcTELlF4mP4JM5MKyKzcBnnKu14ZNHm9BRtKcAIJXQwV73z71EOAwU04pHByC1I0lxIFssWzmC7icEv+ubfjbBLl1S3MVU/I+YTyeLMYSeZtZ/f0aZznFZPV4yLW7K2p8sIkpFkCYxeVLqhvKm6/+ohv1dLKbarorMdqUUzF2eet1xFTVmu3S1xnDBZOuFYS0iGDEomsiwdcCCPSD8ZU0BCpsKcuOW57Y20JSIyQN6vl0gFDD/Nm5F4GbI5lTEeNzTBmeLlkjGTaW5Gd7TSAjci9cyezC22ynzqWKROnN5N3SLgTeOvaMI1h6ISWZY506KxBlB3LzXF+pYedC2dPHunw9YAjYxYd9phs5tZxKLwDYO+oGCSziWWxHfQxcJlxPdCxQhbHsHY6b63DjsEmZ6QG0Usj/vhPgdphB5+AcRl8hBTlWqcImxanUFiVmwmwL3ABArZfcwPupAB9FoHG3nh6P2584LAKY7TuyRgZjF5+npGiG0PnV86yrMlGSyjkfrubQRNmh/WrSCX22tvrVEQQMnLfvr4GsQuc2WKfku68ty82+k2bcPzSQihpRUaunNJb7apviVoz2Hgjh7DTqaNZY67IhYjYgnXTXZyvp0lUDdOuduKPuta9HlN0nKuqKA10nrrx/zIQEiNiHyBeNGhumQeumkWHDi5Qdi0uzt3ELlRzfifI080nfOdNVxaRxGp7qaMxguI1cyrj9BlOiHTA7/8pt+FyAXtJ0yF/2cBogh4e6b2gi51LNU5Dp33zxmFlI8lciQig0aaNy2sW34hICA3Id1PlRvbVoKMGIEUTj+1Jr", "X-OriginatorOrg": "valinux.co.jp", "X-MS-Exchange-CrossTenant-Network-Message-Id": "\n 9f920666-3448-4842-956b-08de67a4a811", "X-MS-Exchange-CrossTenant-AuthSource": "TY7P286MB7722.JPNP286.PROD.OUTLOOK.COM", "X-MS-Exchange-CrossTenant-AuthAs": "Internal", "X-MS-Exchange-CrossTenant-OriginalArrivalTime": "09 Feb 2026 06:30:02.5686\n (UTC)", "X-MS-Exchange-CrossTenant-FromEntityHeader": "Hosted", "X-MS-Exchange-CrossTenant-Id": "7a57bee8-f73d-4c5f-a4f7-d72c91c8c111", "X-MS-Exchange-CrossTenant-MailboxType": "HOSTED", "X-MS-Exchange-CrossTenant-UserPrincipalName": "\n 3oKEYZYvOIojwpdSX3KcPLVsH4xLzf+MmjTMdSr6AM7gYEbMDhbE4j0h/WXhPfKj03dSvPlKsKDIUzD+OoCFQQ==", "X-MS-Exchange-Transport-CrossTenantHeadersStamped": "TYYP286MB4425" }, "content": "Some DesignWare PCIe controllers integrate an eDMA block whose registers\nare located in a dedicated register window. Endpoint function drivers\nmay need the physical base and size of this window to map/expose it to a\npeer.\n\nRecord the physical base and size of the integrated eDMA register window\nin struct dw_pcie.\n\nReviewed-by: Frank Li <Frank.Li@nxp.com>\nSigned-off-by: Koichiro Den <den@valinux.co.jp>\n---\n drivers/pci/controller/dwc/pcie-designware.c | 4 ++++\n drivers/pci/controller/dwc/pcie-designware.h | 2 ++\n 2 files changed, 6 insertions(+)", "diff": "diff --git a/drivers/pci/controller/dwc/pcie-designware.c b/drivers/pci/controller/dwc/pcie-designware.c\nindex 5741c09dde7f..f82ed189f6ae 100644\n--- a/drivers/pci/controller/dwc/pcie-designware.c\n+++ b/drivers/pci/controller/dwc/pcie-designware.c\n@@ -162,8 +162,12 @@ int dw_pcie_get_resources(struct dw_pcie *pci)\n \t\t\tpci->edma.reg_base = devm_ioremap_resource(pci->dev, res);\n \t\t\tif (IS_ERR(pci->edma.reg_base))\n \t\t\t\treturn PTR_ERR(pci->edma.reg_base);\n+\t\t\tpci->edma_reg_phys = res->start;\n+\t\t\tpci->edma_reg_size = resource_size(res);\n \t\t} else if (pci->atu_size >= 2 * DEFAULT_DBI_DMA_OFFSET) {\n \t\t\tpci->edma.reg_base = pci->atu_base + DEFAULT_DBI_DMA_OFFSET;\n+\t\t\tpci->edma_reg_phys = pci->atu_phys_addr + DEFAULT_DBI_DMA_OFFSET;\n+\t\t\tpci->edma_reg_size = pci->atu_size - DEFAULT_DBI_DMA_OFFSET;\n \t\t}\n \t}\n \ndiff --git a/drivers/pci/controller/dwc/pcie-designware.h b/drivers/pci/controller/dwc/pcie-designware.h\nindex 43d7606bc987..88e4a9e514e8 100644\n--- a/drivers/pci/controller/dwc/pcie-designware.h\n+++ b/drivers/pci/controller/dwc/pcie-designware.h\n@@ -542,6 +542,8 @@ struct dw_pcie {\n \tint\t\t\tmax_link_speed;\n \tu8\t\t\tn_fts[2];\n \tstruct dw_edma_chip\tedma;\n+\tphys_addr_t\t\tedma_reg_phys;\n+\tresource_size_t\t\tedma_reg_size;\n \tbool\t\t\tl1ss_support;\t/* L1 PM Substates support */\n \tstruct clk_bulk_data\tapp_clks[DW_PCIE_NUM_APP_CLKS];\n \tstruct clk_bulk_data\tcore_clks[DW_PCIE_NUM_CORE_CLKS];\n", "prefixes": [ "v5", "4/8" ] }